Re: PATCH: 3/6 [2nd try]: Add AVX support (i386 changes)

["H.J. Lu" <hjl.tools@gmail.com>]

On Sat, Mar 27, 2010 at 8:47 AM, Mark Kettenis <mark.kettenis@xs4all.nl> wrote:
>> Date: Sat, 6 Mar 2010 14:20:37 -0800
>> From: "H.J. Lu" <hongjiu.lu@intel.com>
>>
>> Hi,
>>
>> Here are i386 changes to support AVX. OK to install?
>
> OK, here's a review of the remainder of this part of the diff.  I'll
> wait with reviewing the amd64 bits until we've got the i386 part
> right, since a lot of what I'll say about i386 will also apply to
> amd64.  OK?

That is fine.

>> diff --git a/gdb/i386-linux-tdep.c b/gdb/i386-linux-tdep.c
>> index b23c109..66ecf84 100644
>> --- a/gdb/i386-linux-tdep.c
>> +++ b/gdb/i386-linux-tdep.c
>> +#include "i387-tdep.h"
>> +#include "i386-xstate.h"
>> +
>>  /* The syscall's XML filename for i386.  */
>>  #define XML_SYSCALL_FILENAME_I386 "syscalls/i386-linux.xml"
>>
>> @@ -47,13 +50,15 @@
>>  #include <stdint.h>
>>
>>  #include "features/i386/i386-linux.c"
>> +#include "features/i386/i386-avx-linux.c"
>>
>>  /* Supported register note sections.  */
>> -static struct core_regset_section i386_linux_regset_sections[] =
>> +struct core_regset_section i386_linux_regset_sections[] =
>
> Why do you make this non-static?

I need to change size of .reg-xstate section from i386-linux-nat.c.

>>  {
>>    { ".reg", 144, "general-purpose" },
>>    { ".reg2", 108, "floating-point" },
>>    { ".reg-xfp", 512, "extended floating-point" },
>> +  { ".reg-xstate", 0, "XSAVE extended state" },
>>    { NULL, 0 }
>>  };
>> @@ -560,6 +566,66 @@ static int i386_linux_sc_reg_offset[] =
>>    0 * 4                              /* %gs */
>>  };
>>
>> +/* Update XSAVE extended state register note section.  */
>> +
>> +void
>> +i386_linux_update_xstateregset
>> +  (struct core_regset_section *regset_sections, unsigned int xstate_size)
>> +{
>> +  int i;
>> +
>> +  /* Update the XSAVE extended state register note section for "gcore".
>> +     Disable it if its size is 0.  */
>> +  for (i = 0; regset_sections[i].sect_name != NULL; i++)
>> +    if (strcmp (regset_sections[i].sect_name, ".reg-xstate") == 0)
>> +      {
>> +     if (xstate_size)
>> +       regset_sections[i].size = xstate_size;
>> +     else
>> +       regset_sections[i].sect_name = NULL;
>> +     break;
>> +      }
>> +}
>
> What will happen if you have a single GDB connected to two different
> remote targets, one with AVX support and one without?

The size of .reg-xstate section is used only for native gcore and
won't be used for remote targets.

>> +/* Get XSAVE extended state xcr0 from core dump.  */
>> +
>> +unsigned long long
>> +i386_linux_core_read_xcr0 (struct gdbarch *gdbarch,
>> +                        struct target_ops *target, bfd *abfd)
>
> If you follow my advice about using uint64_t for xr0, the return value
> will have to be adjusted.

I will make the change.

>> +{
>> +  asection *xstate = bfd_get_section_by_name (abfd, ".reg-xstate");
>> +  unsigned long long xcr0;
>> +
>> +  if (xstate)
>> +    {
>> +      size_t size = bfd_section_size (abfd, xstate);
>> +
>> +      gdb_assert (size >= I386_XSTATE_SSE_SIZE);
>
> Isn't a gdb_assert() here a bit harsh?  What happens if you simply return 0?

I will remove it. If the size < I386_XSTATE_SSE_SIZE, a warning will be issued
and 0 will be returned.

>> +      /* Check extended state size.  */
>> +      if (size < I386_XSTATE_AVX_SIZE)
>> +     xcr0 = I386_XSTATE_SSE_MASK;
>> +      else
>> +     {
>> +       char contents[8];
>> +
>> +       if (! bfd_get_section_contents (abfd, xstate, contents,
>> +                                       (file_ptr) I386_LINUX_XSAVE_XCR0_OFFSET,
>> +                                       8))
>
> Is that cast really necessary?

I just follow the tradition. Most of bfd_get_section_contents calls have
(file_ptr) cast. It may be used to avoid 32bit vs 64bit VMA warning.

>> +  Same memory layout will be used for the coredump NT_X86_XSTATE
>> +  representing the XSAVE extended state registers.
>> +
>> +  The first 8 bytes of the sw_usable_bytes[464..467] is set to OS enabled
>> +  enabled state mask,  which is same as the 64bit mask returned by the
>> +  xgetbv's XCR0). We can use this mask as well as the mask saved in the
>> +  xstate_hdr bytes to interpret what states the processor/OS supports and
>> +  what state is in, used/initialized conditions, for the particular
>> +  process/thread.  */
>
> Can you ask a native english speaker to look at this comment?

I will see what I can do.

>> diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c
>> index 05afa56..8ced34a 100644
>> --- a/gdb/i386-tdep.c
>> +++ b/gdb/i386-tdep.c
>> @@ -2183,6 +2241,59 @@ i387_ext_type (struct gdbarch *gdbarch)
>>    return tdep->i387_ext_type;
>>  }
>>
>> +/* Construct vector type for pseudo XMM registers.  We can't use
>> +   tdesc_find_type since XMM isn't described in target description.  */
>
> I'm confused here.  If you have a non-AVX target, why do you need a 256-bit vector type?

i386_ymm_type is only called from

  else if (i386_ymm_regnum_p (gdbarch, regnum))
    return i386_ymm_type (gdbarch);

It won't be called if you have a non-AVX target.

>> +static struct type *
>> +i386_ymm_type (struct gdbarch *gdbarch)
>> +{
..
>>    if (i386_mmx_regnum_p (gdbarch, regnum))
>>      return i386_mmx_type (gdbarch);
>> +  else if (i386_ymm_regnum_p (gdbarch, regnum))
>> +    return i386_ymm_type (gdbarch);
>>    else
...
>> +       /* ... Write lower 16byte.  */
>> +       regcache_raw_write (regcache,
>> +                          I387_XMM0_REGNUM (tdep) + regnum,
>> +                          buf);
>> +       /* ... Write upper 16byte.  */
>> +       regcache_raw_write (regcache,
>> +                          tdep->ymm0h_regnum + regnum,
>> +                          buf + 16);
>
> Culd you change the comments here to say 128-bit instead of 16byte?

I will make the change.

>> @@ -5649,7 +5836,8 @@ i386_validate_tdesc_p (struct gdbarch_tdep *tdep,
>>                      struct tdesc_arch_data *tdesc_data)
>>  {
>>    const struct target_desc *tdesc = tdep->tdesc;
>> -  const struct tdesc_feature *feature_core, *feature_vector;
>> +  const struct tdesc_feature *feature_core;
>> +  const struct tdesc_feature *feature_sse, *feature_avx;
>>    int i, num_regs, valid_p;
>>
>>    if (! tdesc_has_registers (tdesc))
>> @@ -5659,13 +5847,37 @@ i386_validate_tdesc_p (struct gdbarch_tdep *tdep,
>>    feature_core = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.core");
>>
>>    /* Get SSE registers.  */
>> -  feature_vector = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.sse");
>> +  feature_sse = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.sse");
>>
>> -  if (feature_core == NULL || feature_vector == NULL)
>> +  if (feature_core == NULL || feature_sse == NULL)
>>      return 0;
>>
>> +  /* Try AVX registers.  */
>> +  feature_avx = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx");
>> +
>>    valid_p = 1;
>>
>> +  /* The XCR0 bits.  */
>> +  if (feature_avx)
>> +    {
>> +      tdep->xcr0 = I386_XSTATE_AVX_MASK;
>> +
>> +      /* It may be set by ABI-specific.  */
>
> Sorry, but does comment makes no sense to me.

I will update it.

>> @@ -5854,9 +6071,13 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
>>    set_tdesc_pseudo_register_type (gdbarch, i386_pseudo_register_type);
>>    set_tdesc_pseudo_register_name (gdbarch, i386_pseudo_register_name);
>>
>> -  /* The default ABI includes general-purpose registers,
>> -     floating-point registers, and the SSE registers.  */
>> -  set_gdbarch_num_regs (gdbarch, I386_SSE_NUM_REGS);
>> +  /* Override the normal target description method to make the AVX
>> +     upper halves anonymous.  */
>> +  set_gdbarch_register_name (gdbarch, i386_register_name);
>> +
>> +  /* The default ABI includes general-purpose registers, floating-point
>> +     registers, the SSE registers and the upper AVX registers.  */
>> +  set_gdbarch_num_regs (gdbarch, I386_AVX_NUM_REGS);
>
> Isn't it better to leave the AVX registers out of the default target,
> and only provide them if we're talking to a target (native or remote)
> that indicates it supports them?

That is set  to a value higher enough to support AVX. The actual number
of registers will be set properly later. See:

http://sourceware.org/ml/gdb-patches/2010-02/msg00709.html

>> @@ -5940,6 +6177,9 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
>>    set_gdbarch_fast_tracepoint_valid_at (gdbarch,
>>                                       i386_fast_tracepoint_valid_at);
>>
>> +  /* Tell remote stub that we support XML target description.  */
>> +  set_gdbarch_qsupported (gdbarch, "x86=xml");
>
>> @@ -146,9 +156,24 @@ struct gdbarch_tdep
>>    /* Number of SSE registers.  */
>>    int num_xmm_regs;
>>
>> +  /* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
>> +     register), excluding the x87 bit, which are supported by this gdb.
>> +   */
>> +  unsigned long long xcr0;
>
> GDB should be capitalized.
>

I will make the change.

Thanks.

-- 
H.J.