Re: [PATCH v2] gdb/gdbserver: LoongArch: Improve implementation of fcc registers

[Tiezhu Yang <yangtiezhu@loongson.cn>]

On 8/2/22 17:16, Feiyang Chen wrote:
> The current implementation of the fcc register is referenced to the
> user_fp_state structure of the kernel uapi [1]. But it is mistakenly
> defined as a 64-bit fputype register, resulting in in a confusing
> output of "info register".
> 
> (gdb) info register
> ...
> fcc            {f = 0x0, d = 0x0}  {f = 0, d = 0}
> ...
> 
> According to "Condition Flag Register" in "LoongArch Reference Manual"
> [2], there are 8 condition flag registers of size 1. Use 8 registers of
> uint8 to make it easier for users to view the fcc register groups.
> 
> (gdb) info register
> ...
> fcc0           0x1                 1
> fcc1           0x0                 0
> fcc2           0x0                 0
> fcc3           0x0                 0
> fcc4           0x0                 0
> fcc5           0x0                 0
> fcc6           0x0                 0
> fcc7           0x0                 0
> ...
> 
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/loongarch/include/uapi/asm/ptrace.h
> [2] https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#_condition_flag_register
> 
> Signed-off-by: Feiyang Chen <chenfeiyang@loongson.cn>
> ---
>   gdb/arch/loongarch.h             |  7 ++--
>   gdb/features/loongarch/fpu.c     |  9 +++++-
>   gdb/features/loongarch/fpu.xml   |  9 +++++-
>   gdb/loongarch-linux-tdep.c       | 55 +++++++++++++++++++++++++++++---
>   gdb/loongarch-tdep.c             |  6 ++--
>   gdbserver/linux-loongarch-low.cc | 24 ++++++++++++++
>   6 files changed, 99 insertions(+), 11 deletions(-)

Thanks for the detailed commit message in this version.
Looks good to me, tested on LoongArch, pushed.

Thanks,
Tiezhu