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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Aug 2023 10:28:26.6727 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 64893794-de79-4f77-680b-08dba943d8b5 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT057.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB4PR08MB8126 X-Spam-Status: No, score=-6.4 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,KAM_DMARC_NONE,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 8/26/23 00:33, Thiago Jung Bauermann wrote: > > Hello Luis, > > Just one minor comment: > > Luis Machado writes: > >> +/* Collect an inactive SVE register set state. This is equivalent to a >> + fpsimd layout. >> + >> + Collect the data from REGCACHE to BUF, using the register >> + map in REGSET. */ >> + >> +static void >> +collect_inactive_sve_regset (const struct regcache *regcache, >> + void *buf, size_t size, int vg_regnum) >> +{ >> + gdb_byte *header = (gdb_byte *) buf; >> + struct gdbarch *gdbarch = regcache->arch (); >> + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); >> + >> + gdb_assert (buf != nullptr); >> + gdb_assert (size >= SVE_CORE_DUMMY_SIZE); >> + >> + /* Zero out everything first. */ >> + memset ((gdb_byte *) buf, 0, SVE_CORE_DUMMY_SIZE); >> + >> + /* BUF starts with a SVE header prior to the register dump. */ >> + >> + /* Dump the default size of an empty SVE payload. */ >> + uint32_t real_size = SVE_CORE_DUMMY_SIZE; >> + store_unsigned_integer (header + SVE_HEADER_SIZE_OFFSET, >> + SVE_HEADER_SIZE_LENGTH, byte_order, real_size); >> + >> + /* Dump a dummy max size. */ >> + uint32_t max_size = SVE_CORE_DUMMY_MAX_SIZE; >> + store_unsigned_integer (header + SVE_HEADER_MAX_SIZE_OFFSET, >> + SVE_HEADER_MAX_SIZE_LENGTH, byte_order, max_size); >> + >> + /* Dump the vector length. */ >> + ULONGEST vg = 0; >> + regcache->raw_collect (vg_regnum, &vg); >> + uint16_t vl = sve_vl_from_vg (vg); >> + store_unsigned_integer (header + SVE_HEADER_VL_OFFSET, SVE_HEADER_VL_LENGTH, >> + byte_order, vl); >> + >> + /* Dump the standard maximum vector length. */ >> + uint16_t max_vl = SVE_CORE_DUMMY_MAX_VL; >> + store_unsigned_integer (header + SVE_HEADER_MAX_VL_OFFSET, >> + SVE_HEADER_MAX_VL_LENGTH, byte_order, >> + max_vl); >> + >> + /* The rest of the fields are zero. */ >> + uint16_t flags = SVE_CORE_DUMMY_FLAGS; >> + store_unsigned_integer (header + SVE_HEADER_FLAGS_OFFSET, >> + SVE_HEADER_FLAGS_LENGTH, byte_order, >> + flags); >> + uint16_t reserved = SVE_CORE_DUMMY_RESERVED; >> + store_unsigned_integer (header + SVE_HEADER_RESERVED_OFFSET, >> + SVE_HEADER_RESERVED_LENGTH, byte_order, reserved); >> + >> + /* We are done with the header part of it. Now dump the register state >> + in the FPSIMD format. */ >> + >> + /* Dump the first 128 bits of each of the Z registers. */ >> + header += AARCH64_SVE_CONTEXT_REGS_OFFSET; >> + for (int i = 0; i < AARCH64_SVE_Z_REGS_NUM; i++) >> + regcache->raw_collect_part (AARCH64_SVE_Z0_REGNUM + i, 0, V_REGISTER_SIZE, >> + header + V_REGISTER_SIZE * i); >> + >> + /* Dump FPSR and FPCR. */ >> + header += 32 * V_REGISTER_SIZE; >> + regcache->raw_collect (AARCH64_FPSR_REGNUM, header); >> + header += 4; >> + regcache->raw_collect (AARCH64_FPCR_REGNUM, header); >> + >> + /* Dump two reserved empty fields of 4 bytes. */ >> + header += 8; > > Sorry, I missed this on my previous review: the header adjustment > position above looks a bit strange. Shouldn't the two reserved fields > come right after FPCR, instead of having a 4-byte gap? > Yes indeed. I think I changed the code around and eventually added the 4 byte increment to the header pointer. Fixed now by passing header + offset when collecting FPCR and then incrementing 8 bytes correctly. >> + memset (header, 0, 8); >> + >> + /* We should have a FPSIMD-formatted register dump now. */ >> +} >