From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from eggs.gnu.org (eggs.gnu.org [IPv6:2001:470:142:3::10]) by sourceware.org (Postfix) with ESMTPS id 133C03858404 for ; Thu, 23 Feb 2023 11:04:06 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 133C03858404 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gnu.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gnu.org Received: from fencepost.gnu.org ([2001:470:142:3::e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pV9OP-0007xD-6m; Thu, 23 Feb 2023 06:04:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=gnu.org; s=fencepost-gnu-org; h=References:Subject:In-Reply-To:To:From:Date: mime-version; bh=Noyugf0+gSUqnh7VuysSlZQ1+5F7F3X4bBqZhJ80/5I=; b=A7tS+d8Txli7 Nl+m4X9fW8cNKWmmqKWf2CWRcUSRdNFdUDVo3K5C8xIQ8hmpFUs1njL9ZXAW00EwVppaqtIwQYd4j owp+SADEUeKqtqe8Zv7g+3ZQkvJ4mSQjTBeaDlYjHvif2BnqD4EUEmRPlRFTUYcYf2TUGcM7Grtbh 8li9il/QxTiMc1c56fy9QoiaeuMZTrw6stQLNYOw440LjDuWxmVQbxCg2YEvUdFGAcknWiXW6cA11 hbupeGz5OnO+DOt5aR0YRGoUFLeIruCKicpIBVuDBRdwEZJhz15sdG/3PWh31yfHy3joiq9unZDYZ ENdtE7GqMhfW/d6mZgXlnQ==; Received: from [87.69.77.57] (helo=home-c4e4a596f7) by fencepost.gnu.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pV9OM-0007e2-VW; Thu, 23 Feb 2023 06:04:04 -0500 Date: Thu, 23 Feb 2023 13:04:00 +0200 Message-Id: <837cw8r6cf.fsf@gnu.org> From: Eli Zaretskii To: Luis Machado Cc: gdb-patches@sourceware.org In-Reply-To: <20230223095244.1813332-1-luis.machado@arm.com> (message from Luis Machado on Thu, 23 Feb 2023 09:52:44 +0000) Subject: Re: [PATCH] [gdb/doc] aarch64: Expand documentation of XML features References: <20230223095244.1813332-1-luis.machado@arm.com> X-Spam-Status: No, score=1.8 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_BARRACUDACENTRAL,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Level: * X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > From: Luis Machado > CC: > Date: Thu, 23 Feb 2023 09:52:44 +0000 > > Similar to the arm target documentation situation, the documentation of the > XML features for AArch64 targets is rather brief. I have received the same > feedback that what gdb carries in the documentation is quite unclear from the > perspective of what debugging servers should define in the XML features, how and > what the outcome is in gdb. > > This patch attempts to clarify a bit more what all the possible features are. Thanks. > The @samp{org.gnu.gdb.aarch64.core} feature is required for AArch64 > -targets. It should contain registers @samp{x0} through @samp{x30}, > -@samp{sp}, @samp{pc}, and @samp{cpsr}. > +targets. It must contain the following: > + > +@itemize @minus > +@item > +@samp{x0} through @samp{x30}, with size of 64-bit. Register @samp{x30} is This doesn't say these are registers, please add that. > +also known as the link register @samp{lr}. The "link register" part should probably be in @dfn, and "@samp{lr}" should probably be ", or @samp{lr}", as it's an alternative name AFAIU. > +@item > +@samp{pc}, the program counter register. It is 64-bit in size and has a type > +of @samp{code_ptr}. ^^ Two spaces there, please. > +The @samp{cpsr} flags type gets updated based on new architectural > +features. "flags type gets updated" sounds awkward and confusing. What did you mean by that? what is updated? > +@item > +@samp{v0} through @samp{v31}, the vector registers with size of 128-bit. The ^^^^^^^ The dash is redundant there and should be dropped. > +@samp{z0} through @samp{z31}, the scalable vector registers. Their sizes are > +variable and a multiple of 128-bit up to a maximum of 2048-bit. Their type is Same here. > +@samp{p0} through @samp{p15}, the predicate registers. Their sizes are > +variable, based on the current vector length, and a multiple of 16-bit. Their And here. > +@item > +@samp{ffr}, the First Fault register. It has a variable size based on the > +current vector length and is a multiple of 16-bit. The type is the same as And here. Also, "and is" is ambiguous: you mean the size is a multiple, but the text can be interpreted as alluding to the register, not its size. Reviewed-By: Eli Zaretskii