From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 106872 invoked by alias); 27 Feb 2018 18:23:37 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 106861 invoked by uid 89); 27 Feb 2018 18:23:37 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-6.8 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_1,SPF_PASS,T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=our X-HELO: eggs.gnu.org Received: from eggs.gnu.org (HELO eggs.gnu.org) (208.118.235.92) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 27 Feb 2018 18:23:35 +0000 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eqjuU-0002Er-FJ for gdb-patches@sourceware.org; Tue, 27 Feb 2018 13:23:34 -0500 Received: from fencepost.gnu.org ([2001:4830:134:3::e]:42998) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eqjuU-0002Ei-AO; Tue, 27 Feb 2018 13:23:30 -0500 Received: from [176.228.60.248] (port=2505 helo=home-c4e4a596f7) by fencepost.gnu.org with esmtpsa (TLS1.2:RSA_AES_256_CBC_SHA1:256) (Exim 4.82) (envelope-from ) id 1eqjuT-0001fl-PG; Tue, 27 Feb 2018 13:23:30 -0500 Date: Tue, 27 Feb 2018 18:23:00 -0000 Message-Id: <83y3jez3yw.fsf@gnu.org> From: Eli Zaretskii To: "Metzger\, Markus T" CC: gdb-patches@sourceware.org In-reply-to: (markus.t.metzger@intel.com) Subject: Re: [PATCH 2/2] btrace: set/show record btrace cpu Reply-to: Eli Zaretskii References: <1519379570-16643-1-git-send-email-markus.t.metzger@intel.com> <1519379570-16643-2-git-send-email-markus.t.metzger@intel.com> <83woz34xuj.fsf@gnu.org> <83lgff1s4n.fsf@gnu.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:4830:134:3::e X-IsSubscribed: yes X-SW-Source: 2018-02/txt/msg00431.txt.bz2 > From: "Metzger, Markus T" > CC: "gdb-patches@sourceware.org" > Date: Tue, 27 Feb 2018 11:41:43 +0000 > > > I rephrased this to "... for enabling workarounds for processor errata > > > when decoding the trace". > > > > It's better, but still not clear enough. What kind of "errata" are we talking about? > > The kind described in https://community.amd.com/thread/186609, for example? > > And what do the workarounds do? > > > > If you can explain that to me or give an example, I will try to propose some text to > > describe that in the manual. > > Processor errata are bugs that, in our case, may cause the trace to not match the spec. > This typically causes unaware decoders to fail with some error. > > An erratum workaround will try to detect an erroneous trace packet sequence and > correct it. > > In our case, each workaround needs to be enabled separately. The decoder determines > the workarounds to be enabled based on the processor on which the trace was recorded. Thanks. Then I suggest to have this text in the manual: @item set record btrace cpu @var{identifier} Set the processor to be used for enabling workarounds for processor errata when decoding the trace. @cindex processor errata @dfn{Processor errata} are bugs in processor firmware that can cause a trace not to match the specification. Trace decoders that are unaware of these errata might fail to decode such a trace. @value{GDBN} can detect erroneous trace packets and correct them, thus avoiding the decoding failures. These corrections are known as @dfn{errata workarounds}, and are enabled based on the processor on which the trace was recorded. By default, @value{GDBN} attempts to detect the processor automatically, and apply the necessary workarounds for it. However, you may need to specify the processor if @value{GDBN} does not yet support it. This command allows you to do that, and also allows to disable the workarounds. The argument @var{identifier} identifies the @sc{cpu} and is of the form: [...] How does that sound?