From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 12951 invoked by alias); 30 Mar 2016 14:14:44 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 12752 invoked by uid 89); 30 Mar 2016 14:14:42 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 spammy=sk:arm_get, arm-tdep.c, UD:arm-tdep.c, armtdepc X-HELO: mail-pf0-f173.google.com Received: from mail-pf0-f173.google.com (HELO mail-pf0-f173.google.com) (209.85.192.173) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Wed, 30 Mar 2016 14:14:31 +0000 Received: by mail-pf0-f173.google.com with SMTP id n5so44371603pfn.2 for ; Wed, 30 Mar 2016 07:14:31 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:references:date:in-reply-to :message-id:user-agent:mime-version:content-transfer-encoding; bh=jCOM3lTlXjNE+mrybi3HzaL8RfyGRv7we4EG77mIV7w=; b=VOPETHa8q610e5/pNwRKkzrCk3tXfSpFhBUK1r6u8g2hv9+HhIh5t/tE9XEFrD73X1 cG2LJehtk8a77WO1boWXvR2XvzidLylZ2iLNtv5rerFYtQrrOgVD38YXhse3G3fidUTX FP4hfB4eZ2Qpzg+eK6O52TftLXp79xqT8LiEcEJGo0waa6R1/ZrB0ZYyhT/VQv64UO3/ PlSQHkE98d1zm8uwyvaQVW9Wj4UHE8M5AjTStypB/Wb77KeGvbbrlaQCy1Q6XYfEwm9s wq82UkE1dwdt7c3w0m1vOFs8uWAM8AhKPh8sXzCtXI3gpWTvta7Ia4papNj7Ej8Jn2I+ qiVw== X-Gm-Message-State: AD7BkJKEMidRJZGAsiKZ5XwOla/6diX+wgzW3hfQBOud2VOoX94EFgBhm3JeXzqcCVeMQw== X-Received: by 10.98.33.74 with SMTP id h71mr13404644pfh.157.1459347270087; Wed, 30 Mar 2016 07:14:30 -0700 (PDT) Received: from E107787-LIN (power-aix.osuosl.org. [140.211.15.154]) by smtp.gmail.com with ESMTPSA id m89sm6434378pfi.12.2016.03.30.07.14.24 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Wed, 30 Mar 2016 07:14:29 -0700 (PDT) From: Yao Qi To: Pedro Alves Cc: Yao Qi , gdb-patches@sourceware.org Subject: Re: [PATCH 1/2] gdbarch software_single_step returns VEC (CORE_ADDR) * References: <1458742206-622-1-git-send-email-yao.qi@linaro.org> <1458742206-622-2-git-send-email-yao.qi@linaro.org> <56F2D1A2.80103@redhat.com> Date: Wed, 30 Mar 2016 14:14:00 -0000 In-Reply-To: <56F2D1A2.80103@redhat.com> (Pedro Alves's message of "Wed, 23 Mar 2016 17:25:54 +0000") Message-ID: <86egasrr2a.fsf@gmail.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes X-SW-Source: 2016-03/txt/msg00561.txt.bz2 Pedro Alves writes: > I think the problem is the ambiguity in arm_breakpoint_from_pc, > and to the fact that we don't "normalize" breakpoint addresses > before passing them down to target_insert_breakpoint.=20 We don't pass address to target_insert_breakpoint, instead, we pass bp_target_info. If we do what you suggested, we need to set "normalized" address into bl->target_info.reqstd_address. This is the only way to pass normalized address down to target_insert_breakpoint. This means we propagate the ISA specific bits of address to breakpoint system, I don't see anything harmful so far, but I feel risky to do so. > > Some callers start with an address coming from the user and want > to consult symbol tables / mapping symbols. Other caller really > want to trust the thumb bit as set in the address. Right. If we want to fully trust on the bit of address, in some cases, we need to consult symbols to normalize the address. The question is "in what cases do we do so?". In my experimental patch, address is normalized for breakpoints except single step breakpoint. > > Note that arm_breakpoint_from_pc uses arm_pc_is_thumb, which is > what consults symbol tables / mapping symbols. > > I think the fix would to make arm_breakpoint_from_pc always trust > that the address bit is already encoded correctly, and trust > IS_THUMB_ADDR, similarly to how the gdbserver version does, in > arm_breakpoint_kind_from_pc. If so, we need to normalize addresses before calling gdbarch_breakpoint_from_pc. Moreover, we need to normalize address before calling insert_single_step_breakpoint out side of gdbarch_software_single_step. > > Then, we'd still need to consult the mapping symbols > consultation, or IOW, do something based on arm_pc_is_thumb _before_ > target_insert_breakpoint is reached. That is, call something like > arm_pc_is_thumb and use the result to encode the thumb bit correctly in > the address passed to target_insert_breakpoint. IOW, "normalize" the > target address, using some gdbarch method, _before_ that address is passed > to the target routines in the first place. > > Along the way, several other functions would stop using arm_pc_is_thumb, > but use IS_THUMB_ADDR directly. E.g., arm_remote_breakpoint_from_pc. > > WDYT? > I wrote a patch as you suggested, and attach it below. I am not very happy on this one, but I am open to thoughts from you and others. > >> -# A return value of 1 means that the software_single_step breakpoints >> -# were inserted; 0 means they were not. >> -F:int:software_single_step:struct frame_info *frame:frame >> +# Return a vector of addresses on which the software single step >> +# breakpoints are inserted. NULL means software single step is not use= d. > > s/are inserted/should be inserted/ > I'll fix it. >> +F:VEC (CORE_ADDR) *:software_single_step:struct frame_info *frame:frame >> + >> +m:void:insert_single_step_breakpoint:struct address_space *aspace, CORE= _ADDR pc:aspace, pc::insert_single_step_breakpoint::0 >>=20=20=20 >> # Return non-zero if the processor is executing a delay slot and a >> # further single-step is needed before the instruction finishes. >> diff --git a/gdb/infrun.c b/gdb/infrun.c >> index 696105d..5dbcf7a 100644 >> --- a/gdb/infrun.c >> +++ b/gdb/infrun.c >> @@ -2248,11 +2248,28 @@ maybe_software_singlestep (struct gdbarch *gdbar= ch, CORE_ADDR pc) >> int hw_step =3D 1; >>=20=20=20 >> if (execution_direction =3D=3D EXEC_FORWARD >> - && gdbarch_software_single_step_p (gdbarch) >> - && gdbarch_software_single_step (gdbarch, get_current_frame ())) >> + && gdbarch_software_single_step_p (gdbarch)) >> { >> - hw_step =3D 0; >> + struct frame_info *frame =3D get_current_frame (); >> + VEC (CORE_ADDR) * next_pcs; >> + >> + next_pcs =3D gdbarch_software_single_step (gdbarch, frame); >> + >> + if (next_pcs !=3D NULL) >> + { >> + int i; >> + CORE_ADDR pc; >> + struct address_space *aspace =3D get_frame_address_space (frame); >> + >> + hw_step =3D 0; >> + >> + for (i =3D 0; VEC_iterate (CORE_ADDR, next_pcs, i, pc); i++) >> + gdbarch_insert_single_step_breakpoint (gdbarch, aspace, pc); >> + >> + VEC_free (CORE_ADDR, next_pcs); >> + } > > This pattern of starting from a VEC of addresses, and a frame and > calling gdbarch_insert_single_step_breakpoint on each address > appears multiple times. Can we put it in a convenience function? Sure, I'll do. > > Though the other calls in record-full.c didn't go through > gdbarch_insert_single_step_breakpoint -- why's that? Oh, gdbarch_insert_single_step_breakpoint should be called. I'll fix it. --=20 Yao (=E9=BD=90=E5=B0=A7) =46rom c2472962d9a7eed8dbfd9a1536cf84128bbb3ce6 Mon Sep 17 00:00:00 2001 From: Yao Qi Date: Thu, 24 Mar 2016 13:58:21 +0000 Subject: [PATCH] Remove arm_override_mode This patch removes global variable arm_override_mode. The reason we need this global variable is that some callers of arm_pc_is_thumb want to know the arm/thumb mode by consulting symbols, but some callers want to know the arm/thumb mode by checking LSB of address only. In order to remove this global variable, we switch arm backend to rely on LSB of address for arm/thumb mode checking, so the address should be properly "encoded" before going to gdbarch_breakpoint_from_pc. A new gdbarch method addr_bits_encode is added and in arm, we consult arm_pc_is_thumb and adjust address properly. gdb: 2016-03-30 Yao Qi * arch-utils.c (displaced_step_at_entry_point): Call gdbarch_addr_bits_encode. (default_remote_breakpoint_from_pc): Likewise. * arm-linux-tdep.c (arm_linux_software_single_step): Call insert_single_step_breakpoint. * arm-tdep.c (arm_override_mode): Remove. (arm_pc_is_thumb): Don't check arm_override_mode. (arm_addr_bits_encode): New function. (arm_insert_single_step_breakpoint): Remove. (arm_breakpoint_from_pc): Use IS_THUMB_ADDR rather than (arm_remote_breakpoint_from_pc): Likewise. (arm_gdbarch_init): Call set_gdbarch_addr_bits_encode. * arm-tdep.h (arm_insert_single_step_breakpoint): Remove declaration. * breakpoint.c (insert_bp_location): Call gdbarch_addr_bits_encode. (program_breakpoint_here_p): Likewise. * gdbarch.c, gdbarch.h: Regenerated. * gdbarch.sh (addr_bits_encode): New. * infcall.c (call_function_by_hand_dummy): Call gdbarch_addr_bits_encode. * infrun.c (resume): Likewise. (keep_going_stepped_thread): Likewise. * linux-tdep.c (linux_displaced_step_location): Likewise. --- gdb/arch-utils.c | 3 +++ gdb/arm-linux-tdep.c | 2 +- gdb/arm-tdep.c | 51 +++++++++++++++++-------------------------------= --- gdb/arm-tdep.h | 2 -- gdb/breakpoint.c | 18 ++++++++++++++++-- gdb/gdbarch.c | 23 +++++++++++++++++++++++ gdb/gdbarch.h | 6 ++++++ gdb/gdbarch.sh | 3 +++ gdb/infcall.c | 2 +- gdb/infrun.c | 2 ++ gdb/linux-tdep.c | 1 + 11 files changed, 73 insertions(+), 40 deletions(-) diff --git a/gdb/arch-utils.c b/gdb/arch-utils.c index c3d7802..bd185da 100644 --- a/gdb/arch-utils.c +++ b/gdb/arch-utils.c @@ -85,6 +85,7 @@ displaced_step_at_entry_point (struct gdbarch *gdbarch) /* Inferior calls also use the entry point as a breakpoint location. We don't want displaced stepping to interfere with those breakpoints, so leave space. */ + addr =3D gdbarch_addr_bits_encode (gdbarch, addr); gdbarch_breakpoint_from_pc (gdbarch, &addr, &bp_len); addr +=3D bp_len * 2; =20 @@ -809,6 +810,7 @@ void default_remote_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcp= tr, int *kindptr) { + *pcptr =3D gdbarch_addr_bits_encode (gdbarch, *pcptr); gdbarch_breakpoint_from_pc (gdbarch, pcptr, kindptr); } =20 @@ -853,6 +855,7 @@ default_skip_permanent_breakpoint (struct regcache *reg= cache) const gdb_byte *bp_insn; int bp_len; =20 + current_pc =3D gdbarch_addr_bits_encode (gdbarch, current_pc); bp_insn =3D gdbarch_breakpoint_from_pc (gdbarch, ¤t_pc, &bp_len); current_pc +=3D bp_len; regcache_write_pc (regcache, current_pc); diff --git a/gdb/arm-linux-tdep.c b/gdb/arm-linux-tdep.c index 9b68315..89e1ec7 100644 --- a/gdb/arm-linux-tdep.c +++ b/gdb/arm-linux-tdep.c @@ -952,7 +952,7 @@ arm_linux_software_single_step (struct frame_info *fram= e) next_pcs =3D arm_get_next_pcs (&next_pcs_ctx); =20 for (i =3D 0; VEC_iterate (CORE_ADDR, next_pcs, i, pc); i++) - arm_insert_single_step_breakpoint (gdbarch, aspace, pc); + insert_single_step_breakpoint (gdbarch, aspace, pc); =20 do_cleanups (old_chain); =20 diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index ad69834..74a94ed 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -143,13 +143,6 @@ static const char *const arm_mode_strings[] =3D static const char *arm_fallback_mode_string =3D "auto"; static const char *arm_force_mode_string =3D "auto"; =20 -/* Internal override of the execution mode. -1 means no override, - 0 means override to ARM mode, 1 means override to Thumb mode. - The effect is the same as if arm_force_mode has been set by the - user (except the internal override has precedence over a user's - arm_force_mode override). */ -static int arm_override_mode =3D -1; - /* Number of different reg name sets (options). */ static int num_disassembly_options; =20 @@ -422,10 +415,6 @@ arm_pc_is_thumb (struct gdbarch *gdbarch, CORE_ADDR me= maddr) if (IS_THUMB_ADDR (memaddr)) return 1; =20 - /* Respect internal mode override if active. */ - if (arm_override_mode !=3D -1) - return arm_override_mode; - /* If the user wants to override the symbol table, let him. */ if (strcmp (arm_force_mode_string, "arm") =3D=3D 0) return 0; @@ -480,6 +469,17 @@ arm_addr_bits_remove (struct gdbarch *gdbarch, CORE_AD= DR val) return (val & 0x03fffffc); } =20 +/* Implement the addr_bits_encode gdbarch method. */ + +static CORE_ADDR +arm_addr_bits_encode (struct gdbarch *gdbarch, CORE_ADDR val) +{ + if (arm_pc_is_thumb (gdbarch, val)) + return MAKE_THUMB_ADDR (val); + else + return UNMAKE_THUMB_ADDR (val); +} + /* Return 1 if PC is the start of a compiler helper function which can be safely ignored during prologue skipping. IS_THUMB is true if the function is known to be a Thumb function due to the way it @@ -4085,26 +4085,6 @@ convert_to_extended (const struct floatformat *fmt, = void *dbl, const void *ptr, &d, dbl); } =20 -/* Like insert_single_step_breakpoint, but make sure we use a breakpoint - of the appropriate mode (as encoded in the PC value), even if this - differs from what would be expected according to the symbol tables. */ - -void -arm_insert_single_step_breakpoint (struct gdbarch *gdbarch, - struct address_space *aspace, - CORE_ADDR pc) -{ - struct cleanup *old_chain - =3D make_cleanup_restore_integer (&arm_override_mode); - - arm_override_mode =3D IS_THUMB_ADDR (pc); - pc =3D gdbarch_addr_bits_remove (gdbarch, pc); - - insert_single_step_breakpoint (gdbarch, aspace, pc); - - do_cleanups (old_chain); -} - /* Given BUF, which is OLD_LEN bytes ending at ENDADDR, expand the buffer to be NEW_LEN bytes ending at ENDADDR. Return NULL if an error occurs. BUF is freed. */ @@ -6178,7 +6158,7 @@ arm_software_single_step (struct frame_info *frame) next_pcs =3D arm_get_next_pcs (&next_pcs_ctx); =20 for (i =3D 0; VEC_iterate (CORE_ADDR, next_pcs, i, pc); i++) - arm_insert_single_step_breakpoint (gdbarch, aspace, pc); + insert_single_step_breakpoint (gdbarch, aspace, pc); =20 do_cleanups (old_chain); =20 @@ -7699,7 +7679,7 @@ arm_breakpoint_from_pc (struct gdbarch *gdbarch, CORE= _ADDR *pcptr, int *lenptr) struct gdbarch_tdep *tdep =3D gdbarch_tdep (gdbarch); enum bfd_endian byte_order_for_code =3D gdbarch_byte_order_for_code (gdb= arch); =20 - if (arm_pc_is_thumb (gdbarch, *pcptr)) + if (IS_THUMB_ADDR (*pcptr)) { *pcptr =3D UNMAKE_THUMB_ADDR (*pcptr); =20 @@ -7734,9 +7714,11 @@ static void arm_remote_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *kindptr) { + CORE_ADDR pc =3D *pcptr; + arm_breakpoint_from_pc (gdbarch, pcptr, kindptr); =20 - if (arm_pc_is_thumb (gdbarch, *pcptr) && *kindptr =3D=3D 4) + if (IS_THUMB_ADDR (pc) && *kindptr =3D=3D 4) /* The documented magic value for a 32-bit Thumb-2 breakpoint, so that this is not confused with a 32-bit ARM breakpoint. */ *kindptr =3D 3; @@ -9214,6 +9196,7 @@ arm_gdbarch_init (struct gdbarch_info info, struct gd= barch_list *arches) =20 /* Address manipulation. */ set_gdbarch_addr_bits_remove (gdbarch, arm_addr_bits_remove); + set_gdbarch_addr_bits_encode (gdbarch, arm_addr_bits_encode); =20 /* Advance PC across function entry code. */ set_gdbarch_skip_prologue (gdbarch, arm_skip_prologue); diff --git a/gdb/arm-tdep.h b/gdb/arm-tdep.h index e5d13bb..2eecfed 100644 --- a/gdb/arm-tdep.h +++ b/gdb/arm-tdep.h @@ -259,8 +259,6 @@ CORE_ADDR arm_get_next_pcs_addr_bits_remove (struct arm= _get_next_pcs *self, =20 int arm_get_next_pcs_is_thumb (struct arm_get_next_pcs *self); =20 -void arm_insert_single_step_breakpoint (struct gdbarch *, - struct address_space *, CORE_ADDR); int arm_software_single_step (struct frame_info *); int arm_is_thumb (struct regcache *regcache); int arm_frame_is_thumb (struct frame_info *frame); diff --git a/gdb/breakpoint.c b/gdb/breakpoint.c index f99a7ab..6da8339 100644 --- a/gdb/breakpoint.c +++ b/gdb/breakpoint.c @@ -2602,6 +2602,8 @@ build_target_command_list (struct bp_location *bl) bl->target_info.persist =3D 1; } =20 +static int breakpoint_address_is_meaningful (struct breakpoint *bpt); + /* Insert a low-level "breakpoint" of some type. BL is the breakpoint location. Any error messages are printed to TMP_ERROR_STREAM; and DISABLED_BREAKS, and HW_BREAKPOINT_ERROR are used to report problems. @@ -2632,7 +2634,19 @@ insert_bp_location (struct bp_location *bl, we have a breakpoint inserted at that address and thus read the breakpoint instead of returning the data saved in the breakpoint location's shadow contents. */ - bl->target_info.reqstd_address =3D bl->address; + if (bl->owner->type =3D=3D bp_single_step + || !breakpoint_address_is_meaningful (bl->owner)) + bl->target_info.reqstd_address =3D bl->address; + else + { + /* Encode ISA specific bits into reqstd_address for breakpoints + except single step breakpoint, because the target address of + single step breakpoint has already encoded with ISA specific + bits. */ + bl->target_info.reqstd_address =3D gdbarch_addr_bits_encode (bl->gdb= arch, + bl->address); + } + bl->target_info.placed_address_space =3D bl->pspace->aspace; bl->target_info.length =3D bl->length; =20 @@ -9084,7 +9098,7 @@ program_breakpoint_here_p (struct gdbarch *gdbarch, C= ORE_ADDR address) struct cleanup *cleanup; int retval =3D 0; =20 - addr =3D address; + addr =3D gdbarch_addr_bits_encode (gdbarch, address); bpoint =3D gdbarch_breakpoint_from_pc (gdbarch, &addr, &len); =20 /* Software breakpoints unsupported? */ diff --git a/gdb/gdbarch.c b/gdb/gdbarch.c index bd0b48c..52aedb0 100644 --- a/gdb/gdbarch.c +++ b/gdb/gdbarch.c @@ -244,6 +244,7 @@ struct gdbarch int frame_red_zone_size; gdbarch_convert_from_func_ptr_addr_ftype *convert_from_func_ptr_addr; gdbarch_addr_bits_remove_ftype *addr_bits_remove; + gdbarch_addr_bits_encode_ftype *addr_bits_encode; gdbarch_software_single_step_ftype *software_single_step; gdbarch_single_step_through_delay_ftype *single_step_through_delay; gdbarch_print_insn_ftype *print_insn; @@ -404,6 +405,7 @@ gdbarch_alloc (const struct gdbarch_info *info, gdbarch->stabs_argument_has_addr =3D default_stabs_argument_has_addr; gdbarch->convert_from_func_ptr_addr =3D convert_from_func_ptr_addr_ident= ity; gdbarch->addr_bits_remove =3D core_addr_identity; + gdbarch->addr_bits_encode =3D core_addr_identity; gdbarch->skip_trampoline_code =3D generic_skip_trampoline_code; gdbarch->skip_solib_resolver =3D generic_skip_solib_resolver; gdbarch->in_solib_return_trampoline =3D generic_in_solib_return_trampoli= ne; @@ -590,6 +592,7 @@ verify_gdbarch (struct gdbarch *gdbarch) /* Skip verify of stabs_argument_has_addr, invalid_p =3D=3D 0 */ /* Skip verify of convert_from_func_ptr_addr, invalid_p =3D=3D 0 */ /* Skip verify of addr_bits_remove, invalid_p =3D=3D 0 */ + /* Skip verify of addr_bits_encode, invalid_p =3D=3D 0 */ /* Skip verify of software_single_step, has predicate. */ /* Skip verify of single_step_through_delay, has predicate. */ if (gdbarch->print_insn =3D=3D 0) @@ -708,6 +711,9 @@ gdbarch_dump (struct gdbarch *gdbarch, struct ui_file *= file) "gdbarch_dump: addr_bit =3D %s\n", plongest (gdbarch->addr_bit)); fprintf_unfiltered (file, + "gdbarch_dump: addr_bits_encode =3D <%s>\n", + host_address_to_string (gdbarch->addr_bits_encode)); + fprintf_unfiltered (file, "gdbarch_dump: addr_bits_remove =3D <%s>\n", host_address_to_string (gdbarch->addr_bits_remove)); fprintf_unfiltered (file, @@ -3059,6 +3065,23 @@ set_gdbarch_addr_bits_remove (struct gdbarch *gdbarc= h, gdbarch->addr_bits_remove =3D addr_bits_remove; } =20 +CORE_ADDR +gdbarch_addr_bits_encode (struct gdbarch *gdbarch, CORE_ADDR addr) +{ + gdb_assert (gdbarch !=3D NULL); + gdb_assert (gdbarch->addr_bits_encode !=3D NULL); + if (gdbarch_debug >=3D 2) + fprintf_unfiltered (gdb_stdlog, "gdbarch_addr_bits_encode called\n"); + return gdbarch->addr_bits_encode (gdbarch, addr); +} + +void +set_gdbarch_addr_bits_encode (struct gdbarch *gdbarch, + gdbarch_addr_bits_encode_ftype addr_bits_enc= ode) +{ + gdbarch->addr_bits_encode =3D addr_bits_encode; +} + int gdbarch_software_single_step_p (struct gdbarch *gdbarch) { diff --git a/gdb/gdbarch.h b/gdb/gdbarch.h index 252fc4b..cba7bb0 100644 --- a/gdb/gdbarch.h +++ b/gdb/gdbarch.h @@ -642,6 +642,12 @@ typedef CORE_ADDR (gdbarch_addr_bits_remove_ftype) (st= ruct gdbarch *gdbarch, COR extern CORE_ADDR gdbarch_addr_bits_remove (struct gdbarch *gdbarch, CORE_A= DDR addr); extern void set_gdbarch_addr_bits_remove (struct gdbarch *gdbarch, gdbarch= _addr_bits_remove_ftype *addr_bits_remove); =20 +/* Encode the ISA specific bits into address. */ + +typedef CORE_ADDR (gdbarch_addr_bits_encode_ftype) (struct gdbarch *gdbarc= h, CORE_ADDR addr); +extern CORE_ADDR gdbarch_addr_bits_encode (struct gdbarch *gdbarch, CORE_A= DDR addr); +extern void set_gdbarch_addr_bits_encode (struct gdbarch *gdbarch, gdbarch= _addr_bits_encode_ftype *addr_bits_encode); + /* FIXME/cagney/2001-01-18: This should be split in two. A target method = that indicates if the target needs software single step. An ISA method to implement it. diff --git a/gdb/gdbarch.sh b/gdb/gdbarch.sh index 37f59b7..8c937b3 100755 --- a/gdb/gdbarch.sh +++ b/gdb/gdbarch.sh @@ -601,6 +601,9 @@ m:CORE_ADDR:convert_from_func_ptr_addr:CORE_ADDR addr, = struct target_ops *targ:a # possible it should be in TARGET_READ_PC instead). m:CORE_ADDR:addr_bits_remove:CORE_ADDR addr:addr::core_addr_identity::0 =20 +# Encode the ISA specific bits into address. +m:CORE_ADDR:addr_bits_encode:CORE_ADDR addr:addr::core_addr_identity::0 + # FIXME/cagney/2001-01-18: This should be split in two. A target method t= hat # indicates if the target needs software single step. An ISA method to # implement it. diff --git a/gdb/infcall.c b/gdb/infcall.c index 77cd931..4809457 100644 --- a/gdb/infcall.c +++ b/gdb/infcall.c @@ -897,7 +897,7 @@ call_function_by_hand_dummy (struct value *function, If software breakpoints are unsupported for this target we leave the user visible memory content uninitialized. */ =20 - bp_addr_as_address =3D bp_addr; + bp_addr_as_address =3D gdbarch_addr_bits_encode (gdbarch, bp_addr); bp_bytes =3D gdbarch_breakpoint_from_pc (gdbarch, &bp_addr_as_address, &bp_size); if (bp_bytes !=3D NULL) diff --git a/gdb/infrun.c b/gdb/infrun.c index 696105d..feee63d 100644 --- a/gdb/infrun.c +++ b/gdb/infrun.c @@ -2525,6 +2525,7 @@ resume (enum gdb_signal sig) don't want this thread to step further from PC (overstep). */ gdb_assert (!step_over_info_valid_p ()); + pc =3D gdbarch_addr_bits_encode (gdbarch, pc); insert_single_step_breakpoint (gdbarch, aspace, pc); insert_breakpoints (); =20 @@ -7217,6 +7218,7 @@ keep_going_stepped_thread (struct thread_info *tp) clear_step_over_info (); tp->control.trap_expected =3D 0; =20 + stop_pc =3D gdbarch_addr_bits_encode (gdbarch, stop_pc); insert_single_step_breakpoint (get_frame_arch (frame), get_frame_address_space (frame), stop_pc); diff --git a/gdb/linux-tdep.c b/gdb/linux-tdep.c index f197aa7..94faedd 100644 --- a/gdb/linux-tdep.c +++ b/gdb/linux-tdep.c @@ -2437,6 +2437,7 @@ linux_displaced_step_location (struct gdbarch *gdbarc= h) /* Inferior calls also use the entry point as a breakpoint location. We don't want displaced stepping to interfere with those breakpoints, so leave space. */ + addr =3D gdbarch_addr_bits_encode (gdbarch, addr); gdbarch_breakpoint_from_pc (gdbarch, &addr, &bp_len); addr +=3D bp_len * 2; =20 --=20 1.9.1