From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by sourceware.org (Postfix) with ESMTPS id 7173C3AA982C for ; Tue, 6 Dec 2022 10:21:15 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 7173C3AA982C Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=redhat.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1670322075; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=6FRJZosHol7cNfudrKmM9v9vCSVjBdAKVaVJs1PQV8c=; b=i4m9hNJxEmnEdTvN/z2rPLvDHCvynajxatb3EkLkuu9E3ZjZZATaLchHS4N4tZ/cSooq8P klsTIiV2XeHu23IQq1DXGWPFTD8S0RrSlZ4xT5R14hf9tI9vAHNBdV2uXlzDHnbOHT5e2E zY+LR/czHXbIxHks82JLBbapkKRArVw= Received: from mail-wr1-f72.google.com (mail-wr1-f72.google.com [209.85.221.72]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_128_GCM_SHA256) id us-mta-376--_-qlObdNBGBP3jrXUWlxw-1; Tue, 06 Dec 2022 05:21:14 -0500 X-MC-Unique: -_-qlObdNBGBP3jrXUWlxw-1 Received: by mail-wr1-f72.google.com with SMTP id d8-20020adf9b88000000b0024207f09827so3084727wrc.20 for ; Tue, 06 Dec 2022 02:21:13 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=mime-version:message-id:date:references:in-reply-to:subject:cc:to :from:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=6FRJZosHol7cNfudrKmM9v9vCSVjBdAKVaVJs1PQV8c=; b=d5ZxiP23eGsXM86PxecPbRPrA31UMV0LEy2uWY5qhnVifmIbAywt30jkmMKG/T+kOA 6AAC4ZNBjtzQVJXcePS1x4Isx6SBXfvtS8k3m4qDGkhJObMwVSJHM5gZvEQXA4cEat5b 1o7EU7hwyuacH0XwRUBQAJhPbcQ5TKfWyffHlHBfKGWZjqfYDvfODJEkJGy/WBBpTCv/ PD78HdGAzcq1q3c6Y/vBSdBfBieTNkQF4MAO2RPSw13ZK3a1tFXNVpuf8Qg+T9iBLrGz RTl4fyAUyA+pniOohM1g75/8UzpHqh5QwjvDtlx1iL6sWcwK9o77AS+dce2EGjiCt+9m 60Jg== X-Gm-Message-State: ANoB5pmRB2Kpuj1zeZ0Qh5kEUNzcwecKpV61aO/KN7jXVvU8GkAhzE44 +IQcqB87TGvt0raNWsbXQDd8h2VOE3/4ccyjA/zmbZr0XGyQQThW9agFFN44z+685sq99PAPq/P UHw8HvwwpDXUxoDkK88qcdg== X-Received: by 2002:adf:eccf:0:b0:242:72fe:b6e with SMTP id s15-20020adfeccf000000b0024272fe0b6emr2435278wro.673.1670322072658; Tue, 06 Dec 2022 02:21:12 -0800 (PST) X-Google-Smtp-Source: AA0mqf43ALzTm2k5X9E0A7R2DA6fyt/6UM28HFloIUSahLdnl0VqUyo2gX8NSwt972vc8Jq+uJVw6Q== X-Received: by 2002:adf:eccf:0:b0:242:72fe:b6e with SMTP id s15-20020adfeccf000000b0024272fe0b6emr2435267wro.673.1670322072462; Tue, 06 Dec 2022 02:21:12 -0800 (PST) Received: from localhost ([31.111.84.238]) by smtp.gmail.com with ESMTPSA id q13-20020a05600c46cd00b003c6f1732f65sm26581233wmo.38.2022.12.06.02.21.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Dec 2022 02:21:12 -0800 (PST) From: Andrew Burgess To: Nelson Chu , gdb-patches@sourceware.org Cc: Xiao Zeng Subject: Re: Fwd: [PATCH] RISC-V: Correction of machine registers mapping to dwarf registers In-Reply-To: References: <20221206053947.821648-1-zengxiao@eswincomputing.com> Date: Tue, 06 Dec 2022 10:21:10 +0000 Message-ID: <87a6404yuh.fsf@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain X-Spam-Status: No, score=-11.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Nelson Chu writes: > Forward to gdb mailing list and cc Andrew since it seems under the gdb folder. > > Thanks > Nelson > > ---------- Forwarded message --------- > From: Xiao Zeng > Date: Tue, Dec 6, 2022 at 1:39 PM > Subject: [PATCH] RISC-V: Correction of machine registers mapping to > dwarf registers > To: > Cc: , , > , Xiao Zeng > > > According to the riscv psabi, the mapping relationship between the > dwarf registers and the machine registers are as follows: > > DWARF Number | Register Name | Description > 0 - 31 | x0 - x31 | Integer Registers > 32 - 63 | f0 - f31 | Floating-point Registers > > * gdb/riscv-tdep.c (riscv_dwarf_reg_to_regnum): Correct mapping > boundary register. Thanks for catching this. I went ahead and merged this patch. Thanks, Andrew > --- > gdb/riscv-tdep.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c > index 0a050b272ff..a298623b449 100644 > --- a/gdb/riscv-tdep.c > +++ b/gdb/riscv-tdep.c > @@ -3623,10 +3623,10 @@ riscv_add_reggroups (struct gdbarch *gdbarch) > static int > riscv_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) > { > - if (reg < RISCV_DWARF_REGNUM_X31) > + if (reg <= RISCV_DWARF_REGNUM_X31) > return RISCV_ZERO_REGNUM + (reg - RISCV_DWARF_REGNUM_X0); > > - else if (reg < RISCV_DWARF_REGNUM_F31) > + else if (reg <= RISCV_DWARF_REGNUM_F31) > return RISCV_FIRST_FP_REGNUM + (reg - RISCV_DWARF_REGNUM_F0); > > else if (reg >= RISCV_DWARF_FIRST_CSR && reg <= RISCV_DWARF_LAST_CSR) > -- > 2.34.1