From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by sourceware.org (Postfix) with ESMTPS id 4E099383B2D4 for ; Fri, 18 Nov 2022 11:32:57 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 4E099383B2D4 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=redhat.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1668771177; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=ZFWbWnV4JMnwfVJDlimN/TqTB7rEwceVVMs25Ni8H3E=; b=U3mckqTN2lZeqqN9PmXZTNpEZD+897tr4SkMr982YIc8vi7LAbLvA1o/Z+Zp0mwZ8gvLHW bchkRGzalB1vKisKR0+F94xEWiSF0qYS86ZqcKh2tOJF08bRaoqSZaWaAtNmxre+d7uF40 obTzXub7yzfRXV8toy8uBINiCW95MkE= Received: from mail-wm1-f69.google.com (mail-wm1-f69.google.com [209.85.128.69]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_128_GCM_SHA256) id us-mta-636-89hYP6E5PSSKAJqahGgZTg-1; Fri, 18 Nov 2022 06:32:55 -0500 X-MC-Unique: 89hYP6E5PSSKAJqahGgZTg-1 Received: by mail-wm1-f69.google.com with SMTP id f1-20020a1cc901000000b003cf703a4f08so1111432wmb.2 for ; Fri, 18 Nov 2022 03:32:55 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=mime-version:message-id:date:references:in-reply-to:subject:cc:to :from:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=ZFWbWnV4JMnwfVJDlimN/TqTB7rEwceVVMs25Ni8H3E=; b=dnNvLI1o/AO0F5bkGGyxvS4/Ti1xLcvcFJV4XW0kypnFcIKFRcmvG9rQVV1bL+urB3 G+3MXP4qFJZHC2KyYhOUUdddUI1HZBFN96Yp4Ed8l+VXBDY255dRd0BYVAlyz980EUqt cj8wBjEgDxg9HTNuBGcO64jgQC/lhIqmMWE7QyBtx/jasKdCQZn5cgxTcfUDRcWVc3Hd 9q+lzppFsvasqbqC++aJ0TQTZqEE7xcRpNgLNslTe34fQNhAd4eyPBe+UUr1F3DYWdpc wjW9W9fgeQnWXnq2Tvj9SRZ7wo/wTxPs6gXr6HwZRODUjVDOOVB51JBXu0ML6SamWbqd o1fg== X-Gm-Message-State: ANoB5pmS2YywLnA9AgfUZxDlJWO+l452DFtwMkCDEajnx7iWCaQ5JWNI VH4vU1/zc5c4l+/xKYJ+caBzATk/kG51awaEobxWNNhfb+KsJlvqbDOLUNy6GAgbzmjnu3tdx4Y YLkVr6atH7fxA1iairuVVZkjdYz2sXzFkwpHeKmv8/WXAvEvZpVpCRxBUoJ5t0S3B8MZQmCyVlg == X-Received: by 2002:adf:d219:0:b0:236:599b:d09c with SMTP id j25-20020adfd219000000b00236599bd09cmr4082534wrh.433.1668771174581; Fri, 18 Nov 2022 03:32:54 -0800 (PST) X-Google-Smtp-Source: AA0mqf4yvt45wvbxw86tVFW1h96hI2fcao5W7tCuPC/TnasZIxvISZHvs1PbtFEqp/j9fDaFYPDejg== X-Received: by 2002:adf:d219:0:b0:236:599b:d09c with SMTP id j25-20020adfd219000000b00236599bd09cmr4082521wrh.433.1668771174308; Fri, 18 Nov 2022 03:32:54 -0800 (PST) Received: from localhost ([31.111.84.238]) by smtp.gmail.com with ESMTPSA id m17-20020adfdc51000000b0023677e1157fsm3359639wrj.56.2022.11.18.03.32.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Nov 2022 03:32:53 -0800 (PST) From: Andrew Burgess To: Simon Marchi via Gdb-patches , gdb-patches@sourceware.org Cc: Simon Marchi Subject: Re: [PATCH 5/8] gdbserver/linux-x86: make is_64bit_tdesc accept thread as a parameter In-Reply-To: <20221117194241.1776125-6-simon.marchi@efficios.com> References: <20221117194241.1776125-1-simon.marchi@efficios.com> <20221117194241.1776125-6-simon.marchi@efficios.com> Date: Fri, 18 Nov 2022 11:32:53 +0000 Message-ID: <87edu08plm.fsf@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain X-Spam-Status: No, score=-11.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Simon Marchi via Gdb-patches writes: > ps_get_thread_area receives as a parameter the lwpid it must work on. > It then calls is_64bit_tdesc, which uses the current_thread as the > thread to work on. However, it is not said that both are the same. > > This became a problem when working in a following patch that pmakes s/pmakes/makes/ > find_one_thread switch to a process but to no thread (current_thread == > nullptr). When libthread_db needed to get the thread area, > is_64bit_tdesc would try to get the regcache of a nullptr thread. > > Fix that by making is_64bit_tdesc accept the thread to work on as a > parameter. Find the right thread from the context, when possible (when > we know the lwpid to work on). Otherwise, pass "current_thread", to > retain the existing behavior. > > Change-Id: I44394d6be92392fa28de71982fd04517ce8a3007 > --- > gdbserver/linux-x86-low.cc | 27 +++++++++++++++------------ > 1 file changed, 15 insertions(+), 12 deletions(-) > > diff --git a/gdbserver/linux-x86-low.cc b/gdbserver/linux-x86-low.cc > index d2b55f6f0d2..c98a7a461fe 100644 > --- a/gdbserver/linux-x86-low.cc > +++ b/gdbserver/linux-x86-low.cc > @@ -275,9 +275,9 @@ static /*const*/ int i386_regmap[] = > per the tdesc. */ > > static int > -is_64bit_tdesc (void) > +is_64bit_tdesc (thread_info *thread) I think the comment for this function needs updating, the reference to "current inferior" probably needs to be replaced with THREAD. With those changes, LGTM. Reviewed-By: Andrew Burgess Thanks, Andrew > { > - struct regcache *regcache = get_thread_regcache (current_thread, 0); > + struct regcache *regcache = get_thread_regcache (thread, 0); > > return register_size (regcache->tdesc, 0) == 8; > } > @@ -292,7 +292,9 @@ ps_get_thread_area (struct ps_prochandle *ph, > lwpid_t lwpid, int idx, void **base) > { > #ifdef __x86_64__ > - int use_64bit = is_64bit_tdesc (); > + lwp_info *lwp = find_lwp_pid (ptid_t (lwpid)); > + gdb_assert (lwp != nullptr); > + int use_64bit = is_64bit_tdesc (get_lwp_thread (lwp)); > > if (use_64bit) > { > @@ -335,7 +337,9 @@ int > x86_target::low_get_thread_area (int lwpid, CORE_ADDR *addr) > { > #ifdef __x86_64__ > - int use_64bit = is_64bit_tdesc (); > + lwp_info *lwp = find_lwp_pid (ptid_t (lwpid)); > + gdb_assert (lwp != nullptr); > + int use_64bit = is_64bit_tdesc (get_lwp_thread (lwp)); > > if (use_64bit) > { > @@ -351,7 +355,6 @@ x86_target::low_get_thread_area (int lwpid, CORE_ADDR *addr) > #endif > > { > - struct lwp_info *lwp = find_lwp_pid (ptid_t (lwpid)); > struct thread_info *thr = get_lwp_thread (lwp); > struct regcache *regcache = get_thread_regcache (thr, 1); > unsigned int desc[4]; > @@ -379,7 +382,7 @@ bool > x86_target::low_cannot_store_register (int regno) > { > #ifdef __x86_64__ > - if (is_64bit_tdesc ()) > + if (is_64bit_tdesc (current_thread)) > return false; > #endif > > @@ -390,7 +393,7 @@ bool > x86_target::low_cannot_fetch_register (int regno) > { > #ifdef __x86_64__ > - if (is_64bit_tdesc ()) > + if (is_64bit_tdesc (current_thread)) > return false; > #endif > > @@ -815,7 +818,7 @@ x86_target::low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction) > int is_elf64 = linux_pid_exe_is_elf_64_file (tid, &machine); > > /* Is the inferior 32-bit? If so, then fixup the siginfo object. */ > - if (!is_64bit_tdesc ()) > + if (!is_64bit_tdesc (current_thread)) > return amd64_linux_siginfo_fixup_common (ptrace, inf, direction, > FIXUP_32); > /* No fixup for native x32 GDB. */ > @@ -1078,7 +1081,7 @@ const regs_info * > x86_target::get_regs_info () > { > #ifdef __x86_64__ > - if (is_64bit_tdesc ()) > + if (is_64bit_tdesc (current_thread)) > return &amd64_linux_regs_info; > else > #endif > @@ -1553,7 +1556,7 @@ x86_target::install_fast_tracepoint_jump_pad (CORE_ADDR tpoint, > char *err) > { > #ifdef __x86_64__ > - if (is_64bit_tdesc ()) > + if (is_64bit_tdesc (current_thread)) > return amd64_install_fast_tracepoint_jump_pad (tpoint, tpaddr, > collector, lockaddr, > orig_size, jump_entry, > @@ -1587,7 +1590,7 @@ x86_target::get_min_fast_tracepoint_insn_len () > #ifdef __x86_64__ > /* On x86-64, 5-byte jump instructions with a 4-byte offset are always > used for fast tracepoints. */ > - if (is_64bit_tdesc ()) > + if (is_64bit_tdesc (current_thread)) > return 5; > #endif > > @@ -2931,7 +2934,7 @@ emit_ops * > x86_target::emit_ops () > { > #ifdef __x86_64__ > - if (is_64bit_tdesc ()) > + if (is_64bit_tdesc (current_thread)) > return &amd64_emit_ops; > else > #endif > -- > 2.37.3