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[143.159.223.185]) by smtp.gmail.com with ESMTPSA id h5-20020adff4c5000000b003437a76565asm3851361wrp.25.2024.04.12.02.44.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Apr 2024 02:44:33 -0700 (PDT) From: Andrew Burgess To: Bernd Edlinger , "gdb-patches@sourceware.org" Subject: Re: [PATCH] sim: riscv: Fix PC at gdb breakpoints In-Reply-To: References: Date: Fri, 12 Apr 2024 10:44:32 +0100 Message-ID: <87h6g66hkv.fsf@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Bernd Edlinger writes: > The uncompressed EBREAK instruction does not work > correctly this way, and the comment saying that > GDB expects us to step over EBREAK is just wrong. > The PC was always 4 bytes too high, which skips one > instruction at break and step over commands, and > causes complete chaos. The compressed EBREAK was > already implemented correctly. > > Tested by using gdb's "target sim" and single-stepping. Thanks for fixing this. For the record, in v1.12 of the RISC-V privileged architecture specification, section 3.3.1: Environment Call and Breakpoint documents that the $pc value should be the address of the EBREAK instruction, not the address of the following instruction. Approved-By: Andrew Burgess Thanks, Andrew > --- > sim/riscv/sim-main.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c > index 0876d455570..66b99e40314 100644 > --- a/sim/riscv/sim-main.c > +++ b/sim/riscv/sim-main.c > @@ -624,9 +624,7 @@ execute_i (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op) > break; > case MATCH_EBREAK: > TRACE_INSN (cpu, "ebreak;"); > - /* GDB expects us to step over EBREAK. */ > - sim_engine_halt (sd, cpu, NULL, riscv_cpu->pc + 4, sim_stopped, > - SIM_SIGTRAP); > + sim_engine_halt (sd, cpu, NULL, riscv_cpu->pc, sim_stopped, SIM_SIGTRAP); > break; > case MATCH_ECALL: > TRACE_INSN (cpu, "ecall;"); > -- > 2.25.1