From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 19530 invoked by alias); 4 Jan 2015 08:42:21 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 19513 invoked by uid 89); 4 Jan 2015 08:42:19 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.7 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 X-HELO: relay1.mentorg.com Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Sun, 04 Jan 2015 08:42:16 +0000 Received: from svr-orw-fem-04.mgc.mentorg.com ([147.34.97.41]) by relay1.mentorg.com with esmtp id 1Y7glI-0003Zb-Rl from Yao_Qi@mentor.com for gdb-patches@sourceware.org; Sun, 04 Jan 2015 00:42:12 -0800 Received: from GreenOnly (147.34.91.1) by svr-orw-fem-04.mgc.mentorg.com (147.34.97.41) with Microsoft SMTP Server id 14.3.224.2; Sun, 4 Jan 2015 00:42:11 -0800 From: Yao Qi To: "Maciej W. Rozycki" CC: Subject: Re: [PATCH] Recognize branch instruction on MIPS in gdb.trace/entry-values.exp References: <1419840861-10723-1-git-send-email-yao@codesourcery.com> <87zja5uxjk.fsf@codesourcery.com> Date: Sun, 04 Jan 2015 08:42:00 -0000 In-Reply-To: (Maciej W. Rozycki's message of "Tue, 30 Dec 2014 14:17:17 +0000") Message-ID: <87r3vbuecf.fsf@codesourcery.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes X-SW-Source: 2015-01/txt/msg00031.txt.bz2 "Maciej W. Rozycki" writes: >> I'll update the pattern to {jalrc|(?:jal|bal)[^\r\n]+\r\n} > > I think {jalrc|[jb]al[^\r\n]+\r\n} will be a little bit more efficient,= =20 > but please make sure too that the right-hand side branch does not swallow= =20 > `jalrc' with its following instruction by greedy matching: > > "An RE consisting of two or more branches connected by the | operator=20 > prefers longest match." > > (from the TCL Reference Manual) -- so I think you'll have to modify your= =20 > regexp further yet. OK, I'll update the pattern to avoid this... > >> >> All tests in entry-values.exp are PASS. >> > >> > Which target and ABI(s) did you ran your testing on? Please try at l= east=20 >> > these: o32/MIPS, o32/MIPS16, o32/microMIPS, n64 on a Linux and a=20 >> > bare-metal target each; testing o32/MIPS16 with the `-mflip-mips16' GC= C=20 >> > option too will be appreciated. These combinations should trigger som= e=20 >> > (although not all) of the other possible instructions. >>=20 >> To avoid of misunderstanding, let me map them to the following concrete = gcc >> options (I don't find -mabi=3Do32 nor -mabi=3Dn64 in >> https://gcc.gnu.org/onlinedocs/gcc/MIPS-Options.html), >>=20 >> -mabi=3D32=20 >> -mabi=3D32 -mips16 >> -mabi=3D32 -mips16 -mflip-mips16 >> -mabi=3D32 -mmicromips >> -mabi=3D64 on both linux and bare-metal target >>=20 >> are they what you want? > > Yes, except I meant both Linux and bare-metal across all the variations,= =20 > not n64 only (missing comma after `n64' in my original sentence). Here=20 > n64 matters as it covers PIC calling sequences. I did the tests with the following options on both bare metal and linux tar= gets, -mabi=3D64 -mabi=3D32 -mabi=3D32 -mips16 -mabi=3D32 -mmicromips and test this on bare metal target only, -mabi=3D32 -mips16 -mflip-mips16 instructions bal jal jals and jalx are generated in these combinations. --=20 Yao (=E9=BD=90=E5=B0=A7) gdb/testsuite: 2015-01-04 Yao Qi * gdb.trace/entry-values.exp: Set call_insn for MIPS target. --- gdb/testsuite/gdb.trace/entry-values.exp | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/gdb/testsuite/gdb.trace/entry-values.exp b/gdb/testsuite/gdb.t= race/entry-values.exp index 6bb0514..50e9636 100644 --- a/gdb/testsuite/gdb.trace/entry-values.exp +++ b/gdb/testsuite/gdb.trace/entry-values.exp @@ -43,6 +43,19 @@ if { [istarget "arm*-*-*"] || [istarget "aarch64*-*-*"] = } { set call_insn "brasl" } elseif { [istarget "powerpc*-*-*"] } { set call_insn "bl" +} elseif { [istarget "mips*-*-*"] } { + # Skip the delay slot after jump or branch instruction if it has. + # + # JUMP (or BRANCH) foo + # insn1 + # insn2 + # + # All the jump or branch instructions except jalrc (jal, jals, jalx, + # jalr, jalrs, bal, bals) have the delay slot, so program goes to + # insn2 when it returns from foo. If it is jalrc, set + # RETURNED_FROM_FOO to insn1, otherwise set RETURNED_FROM_FOO to + # insn2. + set call_insn {jalrc|[jb]al[sxr]*[ \t][^\r\n]+\r\n} } else { set call_insn "call" } --=20 1.9.3