From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by sourceware.org (Postfix) with ESMTPS id DA7FC3BF90DE for ; Tue, 28 Jun 2022 14:29:07 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org DA7FC3BF90DE Received: from mail-wm1-f72.google.com (mail-wm1-f72.google.com [209.85.128.72]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-497-ZjKU5RY7MaiPdERDLmcIig-1; Tue, 28 Jun 2022 10:29:06 -0400 X-MC-Unique: ZjKU5RY7MaiPdERDLmcIig-1 Received: by mail-wm1-f72.google.com with SMTP id m17-20020a05600c3b1100b003a04a2f4936so3156637wms.6 for ; Tue, 28 Jun 2022 07:29:06 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KQddXJXBPHWrPdXFE79HrzmhWcw0YLUt5MRBoUT7wqo=; b=Kf8/+0+hwW/whbAJi+KW7dq4UkArJV8UGVHnqyGXrqtgd25d9ocpPcL9r0cbXWH7o2 cr+e1kYGozVD2emVMB5TLYpW/Ptt6hyS+lxG7U1ZvSZ7grYCGO2ShIB5RbfZHyGSsREB OL08F6Qpi3PXSil/KcH88SF+mhXcUHHPhBnMkUgKtnvnYOokQ2nSny/u7/FuN+K/qmbt l3UBtxP5DAymmBvyAt2DyhyzD99HOU+yRGtOGMHyCVqBozzJKm1xzepXJHUt/bboaJIl 6KUbwhZ97KWy/x1GU2LorLx9o+WryLhJ/jsY/5INrBTi25JxF/UnafmQJKy7LOvu3pHG 3u5Q== X-Gm-Message-State: AJIora8I4o1lOSbx0f1rY0VqwtNom0jfkPqLD9Ah20xTbL261juClZyx rQxeQSCtgIQqFA+OmU5bpJabOsChPDp3sAsAUtDyg2AmK5jp5MVhD++hyg7IRP/xbLkooiZVR+E tvojsNtmQVxr85Krt03mDy+N3Yv93cQAWv2Rsv6a7mZ8A1ozANqC0lsD3Oxk6e/c/vNBuU8nmkg == X-Received: by 2002:a05:6000:15c1:b0:21b:ad5d:64dd with SMTP id y1-20020a05600015c100b0021bad5d64ddmr17898550wry.642.1656426545046; Tue, 28 Jun 2022 07:29:05 -0700 (PDT) X-Google-Smtp-Source: AGRyM1u4nS+dtkpn7ITCIrt69x/vXxCd5y5ynahR7U2ywkkjrZBvheC7+9RkBr+TnNsjjhOdIQ3Ozw== X-Received: by 2002:a05:6000:15c1:b0:21b:ad5d:64dd with SMTP id y1-20020a05600015c100b0021bad5d64ddmr17898532wry.642.1656426544809; Tue, 28 Jun 2022 07:29:04 -0700 (PDT) Received: from localhost (15.72.115.87.dyn.plus.net. [87.115.72.15]) by smtp.gmail.com with ESMTPSA id t18-20020a05600c199200b003a032c88877sm23412972wmq.15.2022.06.28.07.29.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Jun 2022 07:29:04 -0700 (PDT) From: Andrew Burgess To: gdb-patches@sourceware.org Cc: Andrew Burgess Subject: [PATCHv4 2/6] gdb/mips: rewrite show_mask_address Date: Tue, 28 Jun 2022 15:28:53 +0100 Message-Id: <92163d5a8331a622a9cbd470e2a5d4cd670e9639.1656426157.git.aburgess@redhat.com> X-Mailer: git-send-email 2.25.4 In-Reply-To: References: MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset="US-ASCII"; x-default=true X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_BARRACUDACENTRAL, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 28 Jun 2022 14:29:09 -0000 This commit is similar to the previous commit, but in this case GDB is actually relying on undefined behaviour. Consider building GDB for all targets on x86-64/GNU-Linux, then doing this: (gdb) show mips mask-address Zeroing of upper 32 bits of 64-bit addresses is auto. The 32 bit address mask is set automatically. Currently disabled (gdb) The 'show mips mask-address' command ends up in show_mask_address in mips-tdep.c, and this function does this: mips_gdbarch_tdep *tdep = (mips_gdbarch_tdep *) gdbarch_tdep (target_gdbarch ()); Later we might pass TDEP to mips_mask_address_p. However, in my example above, on an x86-64 native target, the current target architecture will be an x86-64 gdbarch, and the tdep field within the gdbarch will be of type i386_gdbarch_tdep, not of type mips_gdbarch_tdep, as a result the cast above was incorrect, and TDEP is not pointing at what it thinks it is. I also think the current output is a little confusing, we appear to have two lines that show the same information, but using different words. The first line comes from calling deprecated_show_value_hack, while the second line is printed directly from show_mask_address. However, both of these lines are printing the same mask_address_var value. I don't think the two lines actually adds any value here. Finally, none of the text in this function is passed through the internationalisation mechanism. It would be nice to remove another use of deprecated_show_value_hack if possible, so this commit does a complete rewrite of show_mask_address. After this commit the output of the above example command, still on my x86-64 native target is: (gdb) show mips mask-address Zeroing of upper 32 bits of 64-bit addresses is "auto" (current architecture is not MIPS). The 'current architecture is not MIPS' text is only displayed when the current architecture is not MIPS. If the architecture is mips then we get the more commonly seen 'currently "on"' or 'currently "off"', like this: (gdb) set architecture mips The target architecture is set to "mips". (gdb) show mips mask-address Zeroing of upper 32 bits of 64-bit addresses is "auto" (currently "off"). (gdb) All the text is passed through the internationalisation mechanism, and we only call gdbarch_tdep when we know the gdbarch architecture is bfd_arch_mips. --- gdb/mips-tdep.c | 37 +++++++++++++++++-------------------- 1 file changed, 17 insertions(+), 20 deletions(-) diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c index 65aa86dd98d..071319ccc73 100644 --- a/gdb/mips-tdep.c +++ b/gdb/mips-tdep.c @@ -1183,28 +1183,25 @@ static void show_mask_address (struct ui_file *file, int from_tty, struct cmd_list_element *c, const char *value) { - mips_gdbarch_tdep *tdep - = (mips_gdbarch_tdep *) gdbarch_tdep (target_gdbarch ()); - - deprecated_show_value_hack (file, from_tty, c, value); - switch (mask_address_var) + const char *additional_text = ""; + if (mask_address_var == AUTO_BOOLEAN_AUTO) { - case AUTO_BOOLEAN_TRUE: - gdb_printf (file, "The 32 bit mips address mask is enabled\n"); - break; - case AUTO_BOOLEAN_FALSE: - gdb_printf (file, "The 32 bit mips address mask is disabled\n"); - break; - case AUTO_BOOLEAN_AUTO: - gdb_printf - (file, - "The 32 bit address mask is set automatically. Currently %s\n", - mips_mask_address_p (tdep) ? "enabled" : "disabled"); - break; - default: - internal_error (__FILE__, __LINE__, _("show_mask_address: bad switch")); - break; + if (gdbarch_bfd_arch_info (target_gdbarch ())->arch != bfd_arch_mips) + additional_text = _(" (current architecture is not MIPS)"); + else + { + mips_gdbarch_tdep *tdep + = (mips_gdbarch_tdep *) gdbarch_tdep (target_gdbarch ()); + + if (mips_mask_address_p (tdep)) + additional_text = _(" (currently \"on\")"); + else + additional_text = _(" (currently \"off\")"); + } } + + gdb_printf (file, _("Zeroing of upper 32 bits of 64-bit addresses is \"%s\"%s.\n"), + value, additional_text); } /* Tell if the program counter value in MEMADDR is in a standard ISA -- 2.25.4