From: Simon Marchi <simark@simark.ca>
To: Hannes Domani <ssbssa@yahoo.de>,
Gdb-patches <gdb-patches@sourceware.org>
Subject: Re: [PATCH v3] Implement debugging of WOW64 processes
Date: Wed, 04 Mar 2020 20:45:00 -0000 [thread overview]
Message-ID: <9c1be8dc-6b4a-b492-e68d-44a486fe5b1c@simark.ca> (raw)
In-Reply-To: <1757969531.7018208.1583353115677@mail.yahoo.com>
On 2020-03-04 3:18 p.m., Hannes Domani via gdb-patches wrote:
> I tested watchpoints with WOW64 processes as well, didn't have any problems.
I was expecting some problems in some corner cases. For example, see function
x86_handle_nonaligned_watchpoint.
If you make it believe that one watchpoint register can watch up to 8 bytes, when
in reality they can watch just 4, then I can imagine that we could be placing an
8 bytes watchpoint, but miss a change somewhere in the last four bytes, something
like that.
However, according to the Intel Architecture Manual [1], section "17.2.6 Debug
Registers and Intel 64 Processors", it says "Break point conditions for 8-byte memory
read/writes are supported in all modes." So I presume that even when debugging a
32 bit process, 8-byte watchpoints will be supported, and that won't be a problem.
Simon
[1] https://software.intel.com/en-us/articles/intel-sdm
prev parent reply other threads:[~2020-03-04 20:45 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20200304191632.14947-1-ssbssa.ref@yahoo.de>
2020-03-04 19:17 ` Hannes Domani via gdb-patches
2020-03-04 19:32 ` Simon Marchi
2020-03-04 19:46 ` Hannes Domani via gdb-patches
2020-03-04 20:07 ` Simon Marchi
2020-03-04 20:18 ` Hannes Domani via gdb-patches
2020-03-04 20:45 ` Simon Marchi [this message]
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