From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 63911 invoked by alias); 12 Oct 2015 14:19:56 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 63899 invoked by uid 89); 12 Oct 2015 14:19:55 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.4 required=5.0 tests=AWL,BAYES_00,SPF_PASS,T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: mga01.intel.com Received: from mga01.intel.com (HELO mga01.intel.com) (192.55.52.88) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 12 Oct 2015 14:19:54 +0000 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 12 Oct 2015 07:19:53 -0700 X-ExtLoop1: 1 Received: from irsmsx107.ger.corp.intel.com ([163.33.3.99]) by fmsmga002.fm.intel.com with ESMTP; 12 Oct 2015 07:19:42 -0700 Received: from irsmsx156.ger.corp.intel.com (10.108.20.68) by IRSMSX107.ger.corp.intel.com (163.33.3.99) with Microsoft SMTP Server (TLS) id 14.3.248.2; Mon, 12 Oct 2015 15:16:31 +0100 Received: from irsmsx104.ger.corp.intel.com ([169.254.5.150]) by IRSMSX156.ger.corp.intel.com ([169.254.3.245]) with mapi id 14.03.0248.002; Mon, 12 Oct 2015 15:16:32 +0100 From: "Metzger, Markus T" To: "palves@redhat.com" , "dje@google.com" CC: "gdb-patches@sourceware.org" Subject: RE: [PATCH 0/6] disasm, record: fix "record instruction-history /m" Date: Mon, 12 Oct 2015 14:19:00 -0000 Message-ID: References: <1442847283-10200-1-git-send-email-markus.t.metzger@intel.com> In-Reply-To: <1442847283-10200-1-git-send-email-markus.t.metzger@intel.com> Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes X-SW-Source: 2015-10/txt/msg00154.txt.bz2 > -----Original Message----- > From: Metzger, Markus T > Sent: Monday, September 21, 2015 4:55 PM > To: palves@redhat.com; dje@google.com > Cc: gdb-patches@sourceware.org > Subject: [PATCH 0/6] disasm, record: fix "record instruction-history /m" > Markus Metzger (6): > disasm: change dump_insns to print a single instruction > disasm: add struct disas_insn to describe to-be-disassembled > instruction > disas: add gdb_disassembly_vec > disasm: use entire line table in line_has_code_p > disasm: determine preceding lines independent of last_line > btrace: use gdb_disassembly_vec and new source interleaving method Given the concerns about increased memory consumption and run-time overhead in patch 3 and the changes to the source interleaving algorithm in patches 4 and 5, I'd go with a modified version of my original RFC, i.e. - patches 1 and 2 from this series - the rfc patch to interleave sources in record-btrace.c - patch 6 from this series This will leave us with two source interleaving algorithms, one for a consecutive range of memory, and one for a sequence of instructions in the order in which they were recorded. Both will use a slightly modified dump_insn to print instruction tuples. I'm dropping the idea of preparing a vector of instructions to print and and of trying to shoehorn record instruction-history's source interleaving into do_mixed_source_and_assembly. Does that sound OK? Regards, Markus. Intel Deutschland GmbH Registered Address: Am Campeon 10-12, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Christin Eisenschmid, Prof. Dr. Hermann Eul Chairperson of the Supervisory Board: Tiffany Doon Silva Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928