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Tue, 21 Jan 2020 11:23:57 +0000 From: Alan Hayward To: Luis Machado CC: "gdb-patches\\@sourceware.org" , nd Subject: Re: [PATCH,v2][AArch64] Fix step-over-syscall.exp failure Date: Tue, 21 Jan 2020 11:32:00 -0000 Message-ID: References: <20200113174239.7819-1-luis.machado@linaro.org> <20200113174239.7819-3-luis.machado@linaro.org> In-Reply-To: <20200113174239.7819-3-luis.machado@linaro.org> Authentication-Results-Original: spf=none (sender IP is ) smtp.mailfrom=Alan.Hayward@arm.com; x-checkrecipientrouted: true x-ms-oob-tlc-oobclassifiers: OLM:9508;OLM:9508; X-Forefront-Antispam-Report-Untrusted: SFV:NSPM;SFS:(10009020)(4636009)(376002)(396003)(366004)(346002)(39860400002)(136003)(199004)(189003)(66556008)(478600001)(66476007)(86362001)(55236004)(66446008)(64756008)(316002)(54906003)(2616005)(36756003)(186003)(26005)(6506007)(53546011)(6916009)(76116006)(33656002)(91956017)(66946007)(6512007)(4326008)(81156014)(8676002)(81166006)(6486002)(8936002)(71200400001)(5660300002)(2906002)(142933001);DIR:OUT;SFP:1101;SCL:1;SRVR:AM0PR08MB3570;H:AM0PR08MB5330.eurprd08.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: N6Dy8xcHbY9VhL23xAP0VZrdm/Fq4UHeUVSC/kntbVkmlvBazeJ35WIs2HasmQ+LiyCtRq8OIkUhKwrvMV8cSjLllIgyfSByFmBOlEItWRQ1uOApBPqzTynoVWEQ4DWG/R2Qrg4kuycCvd4GHHLMRWVlgSw8rTF0rJx8vLHQSFwpC3NnKlVCj7XJrzywBYwk24Mk5N7S3KE5thKu+B/eASUHIaw7q8bVeLDALyUnGrkSX8WY5aNdoRtmxyk8K2IEeLk2eztSNmHAh2zgDmAJmgqJ48vEdf10F0R8aGoRJAeT5VCgS0O0oSBKt1OYBWkGLyMe8nWn41ucMiaIWySBt4uXEZQ8/bt/MpnhMrzLSqYsumxTMdPZPGbrDuk1rX7VraYjGouI2EptQVwEXFYiipjb8jIXkuoNM5bnsJN+Z4By8mqcXm8pQ7Vd2jDtD87I4QdtjYnvJzxZ2PDvwBK2OkVESzwt8hGHdHfAeuASAvAsi5xnr7MiyFXF0WdrusFi x-ms-exchange-transport-forked: True Content-Type: text/plain; charset="us-ascii" Content-ID: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Original-Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Alan.Hayward@arm.com; Return-Path: Alan.Hayward@arm.com X-MS-Exchange-Transport-CrossTenantHeadersStripped: DB5EUR03FT043.eop-EUR03.prod.protection.outlook.com X-MS-Office365-Filtering-Correlation-Id-Prvs: eaa55891-0201-427f-9911-08d79e6467be X-IsSubscribed: yes X-SW-Source: 2020-01/txt/msg00628.txt.bz2 This is ok too. Alan. > On 13 Jan 2020, at 17:42, Luis Machado wrote: >=20 > New in v2: >=20 > - Reverted to using pc_adjust as bool/offset and added more comments to e= xplain > how it is being used. >=20 > -- >=20 > In particular, this one: >=20 > FAIL: gdb.base/step-over-syscall.exp: fork: displaced=3Don: check_pc_afte= r_cross_syscall: single step over fork final pc >=20 > When ptrace fork event reporting is enabled, GDB gets a PTRACE_EVENT_FORK > event whenever the inferior executes the fork syscall. >=20 > Then the logic is that GDB needs to step the inferior yet again in order = to > receive a predetermined SIGTRAP, but no execution takes place because the > signal was already queued for delivery. That means the PC should stay the= same. >=20 > I noticed the aarch64 code is currently adjusting the PC in this situatio= n, > making the inferior skip an instruction without executing it. >=20 > The following change checks if we did not execute the instruction > (pc - to =3D=3D 0), making proper adjustments for such case. >=20 > Regression tested on aarch64-linux-gnu. >=20 > gdb/ChangeLog: >=20 > 2020-01-13 Luis Machado >=20 > * aarch64-tdep.c (struct aarch64_displaced_step_closure ) > : Adjust the documentation. > (aarch64_displaced_step_fixup): Check if PC really moved before > adjusting it. > --- > gdb/aarch64-tdep.c | 17 +++++++++++++---- > 1 file changed, 13 insertions(+), 4 deletions(-) >=20 > diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c > index da41e22130..6a9d34dc67 100644 > --- a/gdb/aarch64-tdep.c > +++ b/gdb/aarch64-tdep.c > @@ -2737,7 +2737,8 @@ struct aarch64_displaced_step_closure : public disp= laced_step_closure > is being displaced stepping. */ > int cond =3D 0; >=20 > - /* PC adjustment offset after displaced stepping. */ > + /* PC adjustment offset after displaced stepping. If 0, then we don't > + write the PC back, assuming the PC is already the right address. */ > int32_t pc_adjust =3D 0; > }; >=20 > @@ -3032,11 +3033,12 @@ aarch64_displaced_step_fixup (struct gdbarch *gdb= arch, > { > aarch64_displaced_step_closure *dsc =3D (aarch64_displaced_step_closure= *) dsc_; >=20 > + ULONGEST pc; > + > + regcache_cooked_read_unsigned (regs, AARCH64_PC_REGNUM, &pc); > + > if (dsc->cond) > { > - ULONGEST pc; > - > - regcache_cooked_read_unsigned (regs, AARCH64_PC_REGNUM, &pc); > if (pc - to =3D=3D 8) > { > /* Condition is true. */ > @@ -3052,6 +3054,13 @@ aarch64_displaced_step_fixup (struct gdbarch *gdba= rch, >=20 > if (dsc->pc_adjust !=3D 0) > { > + /* Make sure the previous instruction was executed (that is, the PC > + has changed). If the PC didn't change, then discard the adjustment > + offset. Otherwise we may skip an instruction before its execution > + took place. */ > + if ((pc - to) =3D=3D 0) > + dsc->pc_adjust =3D 0; > + > if (debug_displaced) > { > debug_printf ("displaced: fixup: set PC to %s:%d\n", > --=20 > 2.17.1 >=20