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From: Stafford Horne <shorne@gmail.com>
To: Simon Marchi <simon.marchi@polymtl.ca>
Cc: GDB patches <gdb-patches@sourceware.org>,
	Openrisc <openrisc@lists.librecores.org>,
		Mike Frysinger <vapier@gentoo.org>,
	Peter Gavin <pgavin@gmail.com>
Subject: Re: [PATCH v4 2/5] sim: cgen: add MUL2OFSI and MUL1OFSI macros (needed for OR1K l.mul[u])
Date: Mon, 04 Sep 2017 21:05:00 -0000	[thread overview]
Message-ID: <CAAfxs77UE-pCdTweTAuwBLCpRx+wqopSsJEBs-6cu_4Po45UJw@mail.gmail.com> (raw)
In-Reply-To: <928e7c188eeeff635bc129ba7042d21b@polymtl.ca>

On Tue, Sep 5, 2017 at 5:32 AM, Simon Marchi <simon.marchi@polymtl.ca> wrote:
>> --- a/sim/common/cgen-ops.h
>> +++ b/sim/common/cgen-ops.h
>> @@ -631,6 +631,22 @@ SUBOFQI (QI a, QI b, BI c)
>>    return res;
>>  }
>>
>> +SEMOPS_INLINE BI
>> +MUL2OFSI (SI a, SI b)
>> +{
>> +  DI tmp = MULDI (EXTSIDI(a), EXTSIDI(b));
>> +  BI res = tmp < -0x80000000LL || tmp > 0x7fffffffLL;
>> +  return res;
>> +}
>> +
>> +SEMOPS_INLINE BI
>> +MUL1OFSI (USI a, USI b)
>> +{
>> +  UDI tmp = MULDI (ZEXTSIDI(a), ZEXTSIDI(b));
>> +  BI res = (tmp > 0xFFFFFFFFULL);
>> +  return res;
>> +}
>
>
> What are these functions expected to return?  They seem to return 1 when the
> result would overflow 32-bits, but just to be sure.

They do just return 1 when there is overflow.

They are used in:
    cpu/or1korbis.cpu

To calculate the overflow and carry flags.

   ; 2's complement overflow
   (set sys-sr-ov (mul-o2flag WI rA (ext WI simm16)))
   ; 1's complement overflow
   (set sys-sr-cy (mul-o1flag UWI rA (ext UWI simm16)))

Thanks for pointing this out though the ChangeLog says "New macro, 1's
complement."  I think it should mention "New macro, 1's complement
_overflow_."

  reply	other threads:[~2017-09-04 21:05 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-29 14:47 [PATCH v4 0/5] sim port for OpenRISC Stafford Horne
2017-05-29 14:47 ` [PATCH v4 1/5] sim: cgen: add remainder functions (needed for OR1K lf.rem.[sd]) Stafford Horne
2017-08-31 21:11   ` Simon Marchi
2017-08-31 22:33     ` Stafford Horne
2017-09-01  7:57       ` Simon Marchi
2017-09-01  8:29         ` Stafford Horne
2017-05-29 14:47 ` [PATCH v4 2/5] sim: cgen: add MUL2OFSI and MUL1OFSI macros (needed for OR1K l.mul[u]) Stafford Horne
2017-09-04 20:32   ` Simon Marchi
2017-09-04 21:05     ` Stafford Horne [this message]
2017-05-29 14:48 ` [PATCH v4 3/5] sim: or1k: add or1k target to sim Stafford Horne
2017-09-04 21:14   ` Simon Marchi
2017-09-04 21:49     ` Stafford Horne
2017-09-05 18:53       ` Simon Marchi
2017-05-29 14:49 ` [PATCH v4 5/5] sim: testsuite: add testsuite for or1k sim Stafford Horne
2017-06-13 10:15 ` [PATCH v4 0/5] sim port for OpenRISC Stafford Horne
2017-08-10 13:22   ` Stafford Horne
2017-08-23  6:29     ` Stafford Horne
2017-08-31 19:57       ` Simon Marchi
2017-08-31 21:58         ` Stafford Horne

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