Re: [PATCH] riscv: add gdbserver support

[Jim Wilson <jimw@sifive.com>]

On Tue, Jan 14, 2020 at 7:18 PM <jiangshuai_li@c-sky.com> wrote:
> This patch is a base support for Riscv32 and Riscv64  arch. It implemented
> how to
> r/w gprs and fprs, identify the software bkpt insns and the *.dat files for
> regs_info.
> I have tested it on kernel 5.1.15, and it works normally.

I believe that Maciej has a RISC-V gdbserver port also.  It would be
nice to see some comment from him.

> Some requirements may be implemented later:
> 1. if fpu has 64bits in riscv32

This is common, and will have to be fixed, but not necessarily fixed
in the first version.  We also have riscv32 linux targets with no FP
registers.  I don't know what the *.dat files are for, but I think the
general registers and the FP registers should be separate files if
possible.  If not, then we need 6 dat files, as we have 2 general reg
sizes and 3 FP reg sizes, and 2*3=6.

> 2. hardware bkpt/watchpoint support

As far as I know, the linux kernel can't set hardware breakpoints with
the current design of the RISC-V debug standard.  They can only be set
via jtag.  So I don't see this as a problem.

> 3. vector regitsers r/w

The vector registers are still in draft form, and are subject to
change.  I'd rather not add support for draft features upstream, as
then we are stuck supporting draft versions of the ISA forever.  Also,
we still don't have a proposal for DWARF register numbers for the
vector registers.

Jim