[PATCH v2 1/3] RISC-V/Linux/native: Determine FLEN dynamically

[PATCH v2 1/3] RISC-V/Linux/native: Determine FLEN dynamically

[Maciej W. Rozycki]

Fix RISC-V native Linux support to handle a 64-bit FPU (FLEN == 64) with 
both RV32 and RV64 systems, which is a part of the current Linux ABI for 
hard-float systems, rather than assuming that (FLEN == XLEN) in target 
description determination and that (FLEN == 64) in register access.

We can do better however and not rely on any particular value of FLEN 
and probe for it dynamically, by observing that the PTRACE_GETREGSET 
ptrace(2) call will only accept an exact regset size, and that will 
reflect FLEN.  Therefore iterate over the call in target description 
determination with a geometrically increasing regset size until a match 
is marked by a successful ptrace(2) call completion or we run beyond the 
maximum size we can support.

Update register accessors accordingly, using FLEN determined to size the 
buffer used for NT_PRSTATUS requests and then to exchange data with the 
regcache.

Also handle a glibc bug where ELF_NFPREG is defined in terms of NFPREG, 
however NFPREG is nowhere defined.

	gdb/
	* riscv-linux-nat.c [!NFPREG] (NFPREG): New macro.
	(supply_fpregset_regnum, fill_fpregset): Handle regset buffer 
	offsets according to FLEN determined.
	(riscv_linux_nat_target::read_description): Determine FLEN 
	dynamically.
	(riscv_linux_nat_target::fetch_registers): Size regset buffer 
	according to FLEN determined.
	(riscv_linux_nat_target::store_registers): Likewise.
---
Hi,

 I'm not particularly happy with the lengthy lines in `fill_fpregset' and 
`supply_fpregset_regnum' causing multiple wrapping and deep indentation, 
but technically there is nothing wrong with it, so I'll leave it to a 
later clean-up.

  Maciej

Changes from v1:

- Also set the size of the regset buffer dynamically in 
  `riscv_linux_nat_target::fetch_registers' and 
  `riscv_linux_nat_target::store_registers', and update `fill_fpregset' 
  and `supply_fpregset_regnum' accordingly.
---
 gdb/riscv-linux-nat.c |   97 ++++++++++++++++++++++++++++++++++++++------------
 1 file changed, 75 insertions(+), 22 deletions(-)

gdb-riscv-linux-nat-flen.diff
Index: binutils-gdb/gdb/riscv-linux-nat.c
===================================================================
--- binutils-gdb.orig/gdb/riscv-linux-nat.c
+++ binutils-gdb/gdb/riscv-linux-nat.c
@@ -28,6 +28,11 @@
 
 #include <sys/ptrace.h>
 
+/* Work around glibc header breakage causing ELF_NFPREG not to be usable.  */
+#ifndef NFPREG
+# define NFPREG 33
+#endif
+
 /* RISC-V Linux native additions to the default linux support.  */
 
 class riscv_linux_nat_target final : public linux_nat_target
@@ -88,21 +93,33 @@ static void
 supply_fpregset_regnum (struct regcache *regcache, const prfpregset_t *fpregs,
 			int regnum)
 {
+  int flen = register_size (regcache->arch (), RISCV_FIRST_FP_REGNUM);
+  union
+    {
+      const prfpregset_t *fpregs;
+      const gdb_byte *buf;
+    }
+  fpbuf = { .fpregs = fpregs };
   int i;
 
   if (regnum == -1)
     {
       /* We only support the FP registers and FCSR here.  */
       for (i = RISCV_FIRST_FP_REGNUM; i <= RISCV_LAST_FP_REGNUM; i++)
-	regcache->raw_supply (i, &fpregs->__d.__f[i - RISCV_FIRST_FP_REGNUM]);
+	regcache->raw_supply (i,
+			      fpbuf.buf + flen * (i - RISCV_FIRST_FP_REGNUM));
 
-      regcache->raw_supply (RISCV_CSR_FCSR_REGNUM, &fpregs->__d.__fcsr);
+      regcache->raw_supply (RISCV_CSR_FCSR_REGNUM,
+			    fpbuf.buf + flen * (RISCV_LAST_FP_REGNUM
+						- RISCV_FIRST_FP_REGNUM + 1));
     }
   else if (regnum >= RISCV_FIRST_FP_REGNUM && regnum <= RISCV_LAST_FP_REGNUM)
     regcache->raw_supply (regnum,
-			  &fpregs->__d.__f[regnum - RISCV_FIRST_FP_REGNUM]);
+			  fpbuf.buf + flen * (regnum - RISCV_FIRST_FP_REGNUM));
   else if (regnum == RISCV_CSR_FCSR_REGNUM)
-    regcache->raw_supply (RISCV_CSR_FCSR_REGNUM, &fpregs->__d.__fcsr);
+    regcache->raw_supply (RISCV_CSR_FCSR_REGNUM,
+			  fpbuf.buf + flen * (RISCV_LAST_FP_REGNUM
+					      - RISCV_FIRST_FP_REGNUM + 1));
 }
 
 /* Copy all floating point registers from regset FPREGS into REGCACHE.  */
@@ -145,19 +162,33 @@ void
 fill_fpregset (const struct regcache *regcache, prfpregset_t *fpregs,
 	       int regnum)
 {
+  int flen = register_size (regcache->arch (), RISCV_FIRST_FP_REGNUM);
+  union
+    {
+      prfpregset_t *fpregs;
+      gdb_byte *buf;
+    }
+  fpbuf = { .fpregs = fpregs };
+
   if (regnum == -1)
     {
       /* We only support the FP registers and FCSR here.  */
       for (int i = RISCV_FIRST_FP_REGNUM; i <= RISCV_LAST_FP_REGNUM; i++)
-	regcache->raw_collect (i, &fpregs->__d.__f[i - RISCV_FIRST_FP_REGNUM]);
+	regcache->raw_collect (i,
+			       fpbuf.buf + flen * (i - RISCV_FIRST_FP_REGNUM));
 
-      regcache->raw_collect (RISCV_CSR_FCSR_REGNUM, &fpregs->__d.__fcsr);
+      regcache->raw_collect (RISCV_CSR_FCSR_REGNUM,
+			     fpbuf.buf + flen * (RISCV_LAST_FP_REGNUM
+						 - RISCV_FIRST_FP_REGNUM + 1));
     }
   else if (regnum >= RISCV_FIRST_FP_REGNUM && regnum <= RISCV_LAST_FP_REGNUM)
     regcache->raw_collect (regnum,
-			   &fpregs->__d.__f[regnum - RISCV_FIRST_FP_REGNUM]);
+			   fpbuf.buf + flen * (regnum
+					       - RISCV_FIRST_FP_REGNUM));
   else if (regnum == RISCV_CSR_FCSR_REGNUM)
-    regcache->raw_collect (RISCV_CSR_FCSR_REGNUM, &fpregs->__d.__fcsr);
+    regcache->raw_collect (RISCV_CSR_FCSR_REGNUM,
+			   fpbuf.buf + flen * (RISCV_LAST_FP_REGNUM
+					       - RISCV_FIRST_FP_REGNUM + 1));
 }
 
 /* Return a target description for the current target.  */
@@ -166,8 +197,8 @@ const struct target_desc *
 riscv_linux_nat_target::read_description ()
 {
   struct riscv_gdbarch_features features;
-  struct iovec iov;
   elf_fpregset_t regs;
+  int flen;
   int tid;
 
   /* Figuring out xlen is easy.  */
@@ -175,19 +206,39 @@ riscv_linux_nat_target::read_description
 
   tid = inferior_ptid.lwp ();
 
-  iov.iov_base = &regs;
-  iov.iov_len = sizeof (regs);
+  /* Start with no f-registers.  */
+  features.flen = 0;
 
-  /* Can we fetch the f-registers?  */
-  if (ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET,
-	      (PTRACE_TYPE_ARG3) &iov) == -1)
-    features.flen = 0;		/* No f-registers.  */
-  else
+  /* How much worth of f-registers can we fetch if any?  */
+  for (flen = sizeof (regs.__f.__f[0]); ; flen *= 2)
     {
-      /* TODO: We need a way to figure out the actual length of the
-	 f-registers.  We could have 64-bit x-registers, with 32-bit
-	 f-registers.  For now, just assumed xlen and flen match.  */
-      features.flen = features.xlen;
+      size_t regset_size;
+      struct iovec iov;
+
+      /* Regsets have a uniform slot size, so we count FSCR like an FGR.  */
+      regset_size = ELF_NFPREG * flen;
+      if (regset_size > sizeof (regs))
+	break;
+
+      iov.iov_base = &regs;
+      iov.iov_len = regset_size;
+      if (ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET,
+		  (PTRACE_TYPE_ARG3) &iov) == -1)
+	{
+	  switch (errno)
+	    {
+	    case EINVAL:
+	      continue;
+	    case EIO:
+	      break;
+	    default:
+	      perror_with_name (_("Couldn't get registers"));
+	      break;
+	    }
+	}
+      else
+	features.flen = flen;
+      break;
     }
 
   return riscv_create_target_description (features);
@@ -228,7 +279,8 @@ riscv_linux_nat_target::fetch_registers
       elf_fpregset_t regs;
 
       iov.iov_base = &regs;
-      iov.iov_len = sizeof (regs);
+      iov.iov_len = ELF_NFPREG * register_size (regcache->arch (),
+						RISCV_FIRST_FP_REGNUM);
 
       if (ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET,
 		  (PTRACE_TYPE_ARG3) &iov) == -1)
@@ -289,7 +341,8 @@ riscv_linux_nat_target::store_registers
       elf_fpregset_t regs;
 
       iov.iov_base = &regs;
-      iov.iov_len = sizeof (regs);
+      iov.iov_len = ELF_NFPREG * register_size (regcache->arch (),
+						RISCV_FIRST_FP_REGNUM);
 
       if (ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET,
 		  (PTRACE_TYPE_ARG3) &iov) == -1)

[PATCH v2 0/3] RISC-V/Linux `gdbserver' support and associated fixes

[Maciej W. Rozycki]

Hi,

 This is v2 of my RISC-V/Linux `gdbserver' support proposal.

 As discussed with the original series I have now factored out large parts 
of `riscv_linux_nat_target::read_description' from riscv-linux-nat.c.  
This is change 2/3 in this series.

 In the course of that effort I have realised other parts of native 
support require adjustment as they access the FP regset as 64-bit even if 
previously assumed (and now detected as) 32-bit.  The relevant fix has 
been integrated into change 1/3.

 Also `gdbserver' itself requires a similar update (which I might have 
realised and forgotten about since Nov), which I have now integrated into 
change 3/3.

 There have been no regressions in native `riscv64-linux-gnu' testing and 
remote `gdbserver' test results are the same as previously (barring the 
usual gdb.threads/ fluctuations).  I think all the changes are ready to go 
in now.

 As usually see individual changes for details.

  Maciej

[PATCH v2 2/3] RISC-V/Linux/native: Factor out target description determination

[Maciej W. Rozycki]

In preparation for RISC-V/Linux `gdbserver' support factor out parts of 
native target description determination code that can be shared between 
the programs.

	gdb/
	* nat/riscv-linux-tdesc.h: New file.
	* nat/riscv-linux-tdesc.c: New file, taking code from...
	* riscv-linux-nat.c (riscv_linux_nat_target::read_description): 
	... here.
	* configure.nat <linux> <riscv*>: Add nat/riscv-linux-tdesc.o to
	NATDEPFILES.
---
New change in v2.
---
 gdb/configure.nat           |    3 +
 gdb/nat/riscv-linux-tdesc.c |   82 ++++++++++++++++++++++++++++++++++++++++++++
 gdb/nat/riscv-linux-tdesc.h |   27 ++++++++++++++
 gdb/riscv-linux-nat.c       |   50 +-------------------------
 4 files changed, 114 insertions(+), 48 deletions(-)

gdb-riscv-linux-nat-tdesc.diff
Index: binutils-gdb/gdb/configure.nat
===================================================================
--- binutils-gdb.orig/gdb/configure.nat
+++ binutils-gdb/gdb/configure.nat
@@ -276,7 +276,8 @@ case ${gdb_host} in
 		;;
 	    riscv*)
 		# Host: RISC-V, running Linux
-		NATDEPFILES="${NATDEPFILES} riscv-linux-nat.o"
+		NATDEPFILES="${NATDEPFILES} riscv-linux-nat.o \
+		nat/riscv-linux-tdesc.o"
 		;;
 	    s390)
 		# Host: S390, running Linux
Index: binutils-gdb/gdb/nat/riscv-linux-tdesc.c
===================================================================
--- /dev/null
+++ binutils-gdb/gdb/nat/riscv-linux-tdesc.c
@@ -0,0 +1,82 @@
+/* GNU/Linux/RISC-V native target description support for GDB.
+   Copyright (C) 2020 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#include "gdbsupport/common-defs.h"
+
+#include "gdb_proc_service.h"
+#include "arch/riscv.h"
+#include "elf/common.h"
+#include "nat/gdb_ptrace.h"
+#include "nat/riscv-linux-tdesc.h"
+
+#include <sys/uio.h>
+
+/* Work around glibc header breakage causing ELF_NFPREG not to be usable.  */
+#ifndef NFPREG
+# define NFPREG 33
+#endif
+
+/* Determine XLEN and FLEN and return a corresponding target description.  */
+
+const struct target_desc *
+riscv_linux_read_description (int tid)
+{
+  struct riscv_gdbarch_features features;
+  elf_fpregset_t regs;
+  int flen;
+
+  /* Figuring out xlen is easy.  */
+  features.xlen = sizeof (elf_greg_t);
+
+  /* Start with no f-registers.  */
+  features.flen = 0;
+
+  /* How much worth of f-registers can we fetch if any?  */
+  for (flen = sizeof (regs.__f.__f[0]); ; flen *= 2)
+    {
+      size_t regset_size;
+      struct iovec iov;
+
+      /* Regsets have a uniform slot size, so we count FSCR like an FGR.  */
+      regset_size = ELF_NFPREG * flen;
+      if (regset_size > sizeof (regs))
+	break;
+
+      iov.iov_base = &regs;
+      iov.iov_len = regset_size;
+      if (ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET,
+		  (PTRACE_TYPE_ARG3) &iov) == -1)
+	{
+	  switch (errno)
+	    {
+	    case EINVAL:
+	      continue;
+	    case EIO:
+	      break;
+	    default:
+	      perror_with_name (_("Couldn't get registers"));
+	      break;
+	    }
+	}
+      else
+	features.flen = flen;
+      break;
+    }
+
+  return riscv_create_target_description (features);
+}
Index: binutils-gdb/gdb/nat/riscv-linux-tdesc.h
===================================================================
--- /dev/null
+++ binutils-gdb/gdb/nat/riscv-linux-tdesc.h
@@ -0,0 +1,27 @@
+/* GNU/Linux/RISC-V native target description support for GDB.
+   Copyright (C) 2020 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#ifndef NAT_RISCV_LINUX_TDESC_H
+#define NAT_RISCV_LINUX_TDESC_H
+
+struct target_desc;
+
+/* Return a target description for the LWP identified by TID.  */
+const struct target_desc *riscv_linux_read_description (int tid);
+
+#endif /* NAT_RISCV_LINUX_TDESC_H */
Index: binutils-gdb/gdb/riscv-linux-nat.c
===================================================================
--- binutils-gdb.orig/gdb/riscv-linux-nat.c
+++ binutils-gdb/gdb/riscv-linux-nat.c
@@ -22,10 +22,11 @@
 #include "linux-nat.h"
 #include "riscv-tdep.h"
 #include "inferior.h"
-#include "target-descriptions.h"
 
 #include "elf/common.h"
 
+#include "nat/riscv-linux-tdesc.h"
+
 #include <sys/ptrace.h>
 
 /* Work around glibc header breakage causing ELF_NFPREG not to be usable.  */
@@ -196,52 +197,7 @@ fill_fpregset (const struct regcache *re
 const struct target_desc *
 riscv_linux_nat_target::read_description ()
 {
-  struct riscv_gdbarch_features features;
-  elf_fpregset_t regs;
-  int flen;
-  int tid;
-
-  /* Figuring out xlen is easy.  */
-  features.xlen = sizeof (elf_greg_t);
-
-  tid = inferior_ptid.lwp ();
-
-  /* Start with no f-registers.  */
-  features.flen = 0;
-
-  /* How much worth of f-registers can we fetch if any?  */
-  for (flen = sizeof (regs.__f.__f[0]); ; flen *= 2)
-    {
-      size_t regset_size;
-      struct iovec iov;
-
-      /* Regsets have a uniform slot size, so we count FSCR like an FGR.  */
-      regset_size = ELF_NFPREG * flen;
-      if (regset_size > sizeof (regs))
-	break;
-
-      iov.iov_base = &regs;
-      iov.iov_len = regset_size;
-      if (ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET,
-		  (PTRACE_TYPE_ARG3) &iov) == -1)
-	{
-	  switch (errno)
-	    {
-	    case EINVAL:
-	      continue;
-	    case EIO:
-	      break;
-	    default:
-	      perror_with_name (_("Couldn't get registers"));
-	      break;
-	    }
-	}
-      else
-	features.flen = flen;
-      break;
-    }
-
-  return riscv_create_target_description (features);
+  return riscv_linux_read_description (inferior_ptid.lwp ());
 }
 
 /* Fetch REGNUM (or all registers if REGNUM == -1) from the target

[PATCH v2 3/3] gdbserver: Add RISC-V/Linux support

[Maciej W. Rozycki]

Implement RISC-V/Linux support for both RV64 and RV32 systems, including 
XML target description handling based on features determined, GPR and 
FPR regset support including dynamic sizing of the latter, and software 
breakpoint handling.  Define two NT_FPREGSET regsets of a different size 
matching the FPR sizes supported for generic `gdbserver' code to pick 
from according to what the OS supplies.

Also handle a glibc bug where ELF_NFPREG is defined in terms of NFPREG,
however NFPREG is nowhere defined.

	gdb/
	* arch/riscv.h (riscv_create_target_description): Remove `const' 
	qualifier from the return type.
	* arch/riscv.c (riscv_create_target_description): Likewise.
	* nat/riscv-linux-tdesc.h (riscv_linux_read_description): 
	Likewise.
	* nat/riscv-linux-tdesc.c (riscv_linux_read_description): 
	Likewise.
	* configure.tgt <riscv*-*-linux*>: Set build_gdbserver=yes.

	gdb/gdbserver/
	* linux-riscv-low.c: New file.
	* Makefile.in (SFILES): Add linux-riscv-low.c, arch/riscv.c, and 
	nat/riscv-linux-tdesc.c.
	* configure.srv <riscv*-*-linux*> (srv_tgtobj)
	(srv_linux_regsets, srv_linux_usrregs, srv_linux_thread_db): 
	Define.
---
Changes from v1:

- Make `gdbserver' selected for automatic build in a RISC-V/Linux/native
  GDB configuration (thanks, Jim, for pointing this out!).

- Remove most of `riscv_arch_setup' and use `riscv_linux_read_description' 
  from 2/3 instead.

- Stop using `elf_fpregset_t*' in favour to just a raw `gdb_byte *' buffer 
  and size the regset according to the FPR size in `riscv_fill_fpregset' 
  and `riscv_store_fpregset'.

- Define 2 NT_FPREGSET regsets of a different size for generic `gdbserver' 
  code to pick from according to what the OS supplies.
---
 gdb/arch/riscv.c                |    2 
 gdb/arch/riscv.h                |    4 
 gdb/configure.tgt               |    1 
 gdb/gdbserver/Makefile.in       |    3 
 gdb/gdbserver/configure.srv     |    7 +
 gdb/gdbserver/linux-riscv-low.c |  257 ++++++++++++++++++++++++++++++++++++++++
 gdb/nat/riscv-linux-tdesc.c     |    2 
 gdb/nat/riscv-linux-tdesc.h     |    2 
 8 files changed, 273 insertions(+), 5 deletions(-)

gdb-riscv-gdbserver-linux.diff
Index: binutils-gdb/gdb/arch/riscv.c
===================================================================
--- binutils-gdb.orig/gdb/arch/riscv.c
+++ binutils-gdb/gdb/arch/riscv.c
@@ -43,7 +43,7 @@ static std::unordered_map<riscv_gdbarch_
 
 /* See arch/riscv.h.  */
 
-const target_desc *
+target_desc *
 riscv_create_target_description (struct riscv_gdbarch_features features)
 {
   /* Have we seen this feature set before?  If we have return the same
Index: binutils-gdb/gdb/arch/riscv.h
===================================================================
--- binutils-gdb.orig/gdb/arch/riscv.h
+++ binutils-gdb/gdb/arch/riscv.h
@@ -69,7 +69,7 @@ struct riscv_gdbarch_features
 /* Create and return a target description that is compatible with
    FEATURES.  */
 
-const target_desc *riscv_create_target_description
-	(struct riscv_gdbarch_features features);
+target_desc *riscv_create_target_description
+  (struct riscv_gdbarch_features features);
 
 #endif /* ARCH_RISCV_H */
Index: binutils-gdb/gdb/configure.tgt
===================================================================
--- binutils-gdb.orig/gdb/configure.tgt
+++ binutils-gdb/gdb/configure.tgt
@@ -553,6 +553,7 @@ riscv*-*-linux*)
 	# Target: Linux/RISC-V
 	gdb_target_obs="riscv-linux-tdep.o glibc-tdep.o \
  			linux-tdep.o solib-svr4.o symfile-mem.o linux-record.o"
+	build_gdbserver=yes
 	;;
 
 riscv*-*-*)
Index: binutils-gdb/gdb/gdbserver/Makefile.in
===================================================================
--- binutils-gdb.orig/gdb/gdbserver/Makefile.in
+++ binutils-gdb/gdb/gdbserver/Makefile.in
@@ -177,6 +177,7 @@ SFILES = \
 	$(srcdir)/linux-mips-low.c \
 	$(srcdir)/linux-nios2-low.c \
 	$(srcdir)/linux-ppc-low.c \
+	$(srcdir)/linux-riscv-low.c \
 	$(srcdir)/linux-s390-low.c \
 	$(srcdir)/linux-sh-low.c \
 	$(srcdir)/linux-sparc-low.c \
@@ -203,6 +204,7 @@ SFILES = \
 	$(srcdir)/../arch/arm-get-next-pcs.c \
 	$(srcdir)/../arch/arm-linux.c \
 	$(srcdir)/../arch/ppc-linux-common.c \
+	$(srcdir)/../arch/riscv.c \
 	$(srcdir)/../../gdbsupport/btrace-common.c \
 	$(srcdir)/../../gdbsupport/buffer.c \
 	$(srcdir)/../../gdbsupport/cleanups.c \
@@ -236,6 +238,7 @@ SFILES = \
 	$(srcdir)/../nat/linux-personality.c \
 	$(srcdir)/../nat/mips-linux-watch.c \
 	$(srcdir)/../nat/ppc-linux.c \
+	$(srcdir)/../nat/riscv-linux-tdesc.c \
 	$(srcdir)/../nat/fork-inferior.c \
 	$(srcdir)/../target/waitstatus.c
 
Index: binutils-gdb/gdb/gdbserver/configure.srv
===================================================================
--- binutils-gdb.orig/gdb/gdbserver/configure.srv
+++ binutils-gdb/gdb/gdbserver/configure.srv
@@ -267,6 +267,13 @@ case "${target}" in
 			srv_xmlfiles="${srv_xmlfiles} rs6000/power-fpu.xml"
 			srv_lynxos=yes
 			;;
+  riscv*-*-linux*)	srv_tgtobj="arch/riscv.o nat/riscv-linux-tdesc.o"
+			srv_tgtobj="${srv_tgtobj} linux-riscv-low.o"
+			srv_tgtobj="${srv_tgtobj} ${srv_linux_obj}"
+			srv_linux_regsets=yes
+			srv_linux_usrregs=yes
+			srv_linux_thread_db=yes
+			;;
   s390*-*-linux*)	srv_regobj="s390-linux32.o"
 			srv_regobj="${srv_regobj} s390-linux32v1.o"
 			srv_regobj="${srv_regobj} s390-linux32v2.o"
Index: binutils-gdb/gdb/gdbserver/linux-riscv-low.c
===================================================================
--- /dev/null
+++ binutils-gdb/gdb/gdbserver/linux-riscv-low.c
@@ -0,0 +1,257 @@
+/* GNU/Linux/RISC-V specific low level interface, for the remote server
+   for GDB.
+   Copyright (C) 2020 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#include "server.h"
+
+#include "linux-low.h"
+#include "tdesc.h"
+#include "elf/common.h"
+#include "nat/riscv-linux-tdesc.h"
+#include "opcode/riscv.h"
+
+/* Work around glibc header breakage causing ELF_NFPREG not to be usable.  */
+#ifndef NFPREG
+# define NFPREG 33
+#endif
+
+/* Implementation of linux_target_ops method "arch_setup".  */
+
+static void
+riscv_arch_setup ()
+{
+  static const char *expedite_regs[] = { "sp", "pc", NULL };
+  target_desc *tdesc;
+
+  tdesc = riscv_linux_read_description (lwpid_of (current_thread));
+  if (!tdesc->expedite_regs)
+    init_target_desc (tdesc, expedite_regs);
+  current_process ()->tdesc = tdesc;
+}
+
+static void
+riscv_fill_gregset (struct regcache *regcache, void *buf)
+{
+  const struct target_desc *tdesc = regcache->tdesc;
+  elf_gregset_t *regset = (elf_gregset_t *) buf;
+  int regno = find_regno (tdesc, "zero");
+  int i;
+
+  collect_register_by_name (regcache, "pc", *regset);
+  for (i = 1; i < ARRAY_SIZE (*regset); i++)
+    collect_register (regcache, regno + i, *regset + i);
+}
+
+static void
+riscv_store_gregset (struct regcache *regcache, const void *buf)
+{
+  const elf_gregset_t *regset = (const elf_gregset_t *) buf;
+  const struct target_desc *tdesc = regcache->tdesc;
+  int regno = find_regno (tdesc, "zero");
+  int i;
+
+  supply_register_by_name (regcache, "pc", *regset);
+  supply_register_zeroed (regcache, regno);
+  for (i = 1; i < ARRAY_SIZE (*regset); i++)
+    supply_register (regcache, regno + i, *regset + i);
+}
+
+static void
+riscv_fill_fpregset (struct regcache *regcache, void *buf)
+{
+  const struct target_desc *tdesc = regcache->tdesc;
+  int regno = find_regno (tdesc, "ft0");
+  int flen = register_size (regcache->tdesc, regno);
+  gdb_byte *regset = (gdb_byte *) buf;
+  int i;
+
+  for (i = 0; i < ELF_NFPREG - 1; i++)
+    collect_register (regcache, regno + i, regset + i * flen);
+  collect_register_by_name (regcache, "fcsr", regset + i * flen);
+}
+
+static void
+riscv_store_fpregset (struct regcache *regcache, const void *buf)
+{
+  const struct target_desc *tdesc = regcache->tdesc;
+  int regno = find_regno (tdesc, "ft0");
+  int flen = register_size (regcache->tdesc, regno);
+  const gdb_byte *regset = (const gdb_byte *) buf;
+  int i;
+
+  for (i = 0; i < ELF_NFPREG - 1; i++)
+    supply_register (regcache, regno + i, regset + i * flen);
+  supply_register_by_name (regcache, "fcsr", regset + i * flen);
+}
+
+static struct regset_info riscv_regsets[] = {
+  { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PRSTATUS,
+    sizeof (elf_gregset_t), GENERAL_REGS,
+    riscv_fill_gregset, riscv_store_gregset },
+  { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_FPREGSET,
+    sizeof (struct __riscv_mc_d_ext_state), FP_REGS,
+    riscv_fill_fpregset, riscv_store_fpregset },
+  { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_FPREGSET,
+    sizeof (struct __riscv_mc_f_ext_state), FP_REGS,
+    riscv_fill_fpregset, riscv_store_fpregset },
+  NULL_REGSET
+};
+
+static struct regsets_info riscv_regsets_info =
+  {
+    riscv_regsets, /* regsets */
+    0, /* num_regsets */
+    NULL, /* disabled_regsets */
+  };
+
+static struct regs_info riscv_regs =
+  {
+    NULL, /* regset_bitmap */
+    NULL, /* usrregs */
+    &riscv_regsets_info,
+  };
+
+/* Implementation of linux_target_ops method "regs_info".  */
+
+static const struct regs_info *
+riscv_regs_info ()
+{
+  return &riscv_regs;
+}
+
+/* Implementation of linux_target_ops method "fetch_register".  */
+
+static int
+riscv_fetch_register (struct regcache *regcache, int regno)
+{
+  const struct target_desc *tdesc = regcache->tdesc;
+
+  if (regno != find_regno (tdesc, "zero"))
+    return 0;
+  supply_register_zeroed (regcache, regno);
+  return 1;
+}
+
+/* Implementation of linux_target_ops method "get_pc".  */
+
+static CORE_ADDR
+riscv_get_pc (struct regcache *regcache)
+{
+  elf_gregset_t regset;
+
+  if (sizeof (regset[0]) == 8)
+    return linux_get_pc_64bit (regcache);
+  else
+    return linux_get_pc_32bit (regcache);
+}
+
+/* Implementation of linux_target_ops method "set_pc".  */
+
+static void
+riscv_set_pc (struct regcache *regcache, CORE_ADDR newpc)
+{
+  elf_gregset_t regset;
+
+  if (sizeof (regset[0]) == 8)
+    linux_set_pc_64bit (regcache, newpc);
+  else
+    linux_set_pc_32bit (regcache, newpc);
+}
+
+/* Correct in either endianness.  */
+static const uint16_t riscv_ibreakpoint[] = { 0x0073, 0x0010 };
+static const uint16_t riscv_cbreakpoint = 0x9002;
+
+/* Implementation of linux_target_ops method "breakpoint_kind_from_pc".  */
+
+static int
+riscv_breakpoint_kind_from_pc (CORE_ADDR *pcptr)
+{
+  union
+    {
+      gdb_byte bytes[2];
+      uint16_t insn;
+    }
+  buf;
+
+  if (target_read_memory (*pcptr, buf.bytes, sizeof (buf.insn)) == 0
+      && riscv_insn_length (buf.insn == sizeof (riscv_ibreakpoint)))
+    return sizeof (riscv_ibreakpoint);
+  else
+    return sizeof (riscv_cbreakpoint);
+}
+
+/* Implementation of linux_target_ops method "sw_breakpoint_from_kind".  */
+
+static const gdb_byte *
+riscv_sw_breakpoint_from_kind (int kind, int *size)
+{
+  *size = kind;
+  switch (kind)
+    {
+      case sizeof (riscv_ibreakpoint):
+	return (const gdb_byte *) &riscv_ibreakpoint;
+      default:
+	return (const gdb_byte *) &riscv_cbreakpoint;
+    }
+}
+
+/* Implementation of linux_target_ops method "breakpoint_at".  */
+
+static int
+riscv_breakpoint_at (CORE_ADDR pc)
+{
+  union
+    {
+      gdb_byte bytes[2];
+      uint16_t insn;
+    }
+  buf;
+
+  if (target_read_memory (pc, buf.bytes, sizeof (buf.insn)) == 0
+      && (buf.insn == riscv_cbreakpoint
+	  || (buf.insn == riscv_ibreakpoint[0]
+	      && target_read_memory (pc + sizeof (buf.insn), buf.bytes,
+				     sizeof (buf.insn)) == 0
+	      && buf.insn == riscv_ibreakpoint[1])))
+    return 1;
+  else
+    return 0;
+}
+
+struct linux_target_ops the_low_target =
+{
+  riscv_arch_setup,
+  riscv_regs_info,
+  NULL, /* cannot_fetch_register */
+  NULL, /* cannot_store_register */
+  riscv_fetch_register,
+  riscv_get_pc,
+  riscv_set_pc,
+  riscv_breakpoint_kind_from_pc,
+  riscv_sw_breakpoint_from_kind,
+  NULL, /* get_next_pcs */
+  0,    /* decr_pc_after_break */
+  riscv_breakpoint_at,
+};
+
+void
+initialize_low_arch ()
+{
+  initialize_regsets_info (&riscv_regsets_info);
+}
Index: binutils-gdb/gdb/nat/riscv-linux-tdesc.c
===================================================================
--- binutils-gdb.orig/gdb/nat/riscv-linux-tdesc.c
+++ binutils-gdb/gdb/nat/riscv-linux-tdesc.c
@@ -33,7 +33,7 @@
 
 /* Determine XLEN and FLEN and return a corresponding target description.  */
 
-const struct target_desc *
+struct target_desc *
 riscv_linux_read_description (int tid)
 {
   struct riscv_gdbarch_features features;
Index: binutils-gdb/gdb/nat/riscv-linux-tdesc.h
===================================================================
--- binutils-gdb.orig/gdb/nat/riscv-linux-tdesc.h
+++ binutils-gdb/gdb/nat/riscv-linux-tdesc.h
@@ -22,6 +22,6 @@
 struct target_desc;
 
 /* Return a target description for the LWP identified by TID.  */
-const struct target_desc *riscv_linux_read_description (int tid);
+struct target_desc *riscv_linux_read_description (int tid);
 
 #endif /* NAT_RISCV_LINUX_TDESC_H */

Re: [PATCH v2 1/3] RISC-V/Linux/native: Determine FLEN dynamically

[Jim Wilson]

On Wed, Jan 29, 2020 at 10:13 AM Maciej W. Rozycki <macro@wdc.com> wrote:
>         gdb/
>         * riscv-linux-nat.c [!NFPREG] (NFPREG): New macro.
>         (supply_fpregset_regnum, fill_fpregset): Handle regset buffer
>         offsets according to FLEN determined.
>         (riscv_linux_nat_target::read_description): Determine FLEN
>         dynamically.
>         (riscv_linux_nat_target::fetch_registers): Size regset buffer
>         according to FLEN determined.
>         (riscv_linux_nat_target::store_registers): Likewise.

Looks OK to me, though I'm not an official reviewer.

I did notice a reference to FGR in a comment that should presumably be
FPR, but that is a very minor issue.

Jim

Re: [PATCH v2 2/3] RISC-V/Linux/native: Factor out target description determination

[Jim Wilson]

On Wed, Jan 29, 2020 at 10:13 AM Maciej W. Rozycki <macro@wdc.com> wrote:
>         gdb/
>         * nat/riscv-linux-tdesc.h: New file.
>         * nat/riscv-linux-tdesc.c: New file, taking code from...
>         * riscv-linux-nat.c (riscv_linux_nat_target::read_description):
>         ... here.
>         * configure.nat <linux> <riscv*>: Add nat/riscv-linux-tdesc.o to
>         NATDEPFILES.

Looks good to me, though I'm not an official reviewer.

Jim

Re: [PATCH v2 3/3] gdbserver: Add RISC-V/Linux support

[Jim Wilson]

On Wed, Jan 29, 2020 at 10:14 AM Maciej W. Rozycki <macro@wdc.com> wrote:
>         gdb/
>         * arch/riscv.h (riscv_create_target_description): Remove `const'
>         qualifier from the return type.
>         * arch/riscv.c (riscv_create_target_description): Likewise.
>         * nat/riscv-linux-tdesc.h (riscv_linux_read_description):
>         Likewise.
>         * nat/riscv-linux-tdesc.c (riscv_linux_read_description):
>         Likewise.
>         * configure.tgt <riscv*-*-linux*>: Set build_gdbserver=yes.
>
>         gdb/gdbserver/
>         * linux-riscv-low.c: New file.
>         * Makefile.in (SFILES): Add linux-riscv-low.c, arch/riscv.c, and
>         nat/riscv-linux-tdesc.c.
>         * configure.srv <riscv*-*-linux*> (srv_tgtobj)
>         (srv_linux_regsets, srv_linux_usrregs, srv_linux_thread_db):
>         Define.

Looks good to me, though I'm not an official review.

I noticed on the gdbserver console I'm getting a lot of ptrace warnings.
    ptrace(regsets_fetch_inferior_registers) PID=1678103: Invalid argument
    Warning: ptrace(regsets_store_inferior_registers): Invalid argument
This looks like a side effect of having two FP regsets defined, it
tries the first one, fails, and then tries the second one which is
correct.  If you mark them as OPTIONAL_REGS we would only get the
warning once which would be OK, except that they can't be both FP_REGS
and OPTIONAL_REGS at the same time.  I don't know what if anything
would break if they aren't marked as FP_REGS.   I only see explicit
checks for GENERAL_REGS and OPTIONAL_REGS; I don't see any checks for
FP_REGS.  Anyways, I would suggest as a future improvement that the
linux gdbserver regset support be extended so that a regset can be
marked as both FP_REGS and OPTIONAL_REGS.

There are some new functions and structures that don't have
explanatory comments before them, but this is a minor issue.

Jim

Re: [PATCH v2 1/3] RISC-V/Linux/native: Determine FLEN dynamically

[Maciej W. Rozycki]

On Wed, 29 Jan 2020, Jim Wilson wrote:

> I did notice a reference to FGR in a comment that should presumably be
> FPR, but that is a very minor issue.

 FGR as in Floating-point General-purpose Register (as opposed to a 
floating-point control register).  Maybe it's too uncommon a use and need 
a full expansion here.

  Maciej

Re: [PATCH v2 3/3] gdbserver: Add RISC-V/Linux support

[Maciej W. Rozycki]

On Wed, 29 Jan 2020, Jim Wilson wrote:

> I noticed on the gdbserver console I'm getting a lot of ptrace warnings.
>     ptrace(regsets_fetch_inferior_registers) PID=1678103: Invalid argument
>     Warning: ptrace(regsets_store_inferior_registers): Invalid argument
> This looks like a side effect of having two FP regsets defined, it
> tries the first one, fails, and then tries the second one which is
> correct.  If you mark them as OPTIONAL_REGS we would only get the
> warning once which would be OK, except that they can't be both FP_REGS
> and OPTIONAL_REGS at the same time.  I don't know what if anything
> would break if they aren't marked as FP_REGS.   I only see explicit
> checks for GENERAL_REGS and OPTIONAL_REGS; I don't see any checks for
> FP_REGS.  Anyways, I would suggest as a future improvement that the
> linux gdbserver regset support be extended so that a regset can be
> marked as both FP_REGS and OPTIONAL_REGS.

 Hmm, good point.  I think OPTIONAL_REGS might become a flag, however as 
you have observed there seems to be no special meaning indeed to FP_REGS 
and actually only a couple of `gdbserver' hosts use this type, so using 
OPTIONAL_REGS should be fine.  I'll send an update.

> There are some new functions and structures that don't have
> explanatory comments before them, but this is a minor issue.

 Right, though I think they are self-explanatory.

  Maciej

Re: [PATCH v2 1/3] RISC-V/Linux/native: Determine FLEN dynamically

[Jim Wilson]

On Wed, Jan 29, 2020 at 10:13 AM Maciej W. Rozycki <macro@wdc.com> wrote:
> We can do better however and not rely on any particular value of FLEN
> and probe for it dynamically, by observing that the PTRACE_GETREGSET
> ptrace(2) call will only accept an exact regset size, and that will
> reflect FLEN.

I forgot to mention this before, but our long term plans are to pass
info via the auxiliary vector from the kernel to the application, and
then in theory gdb should be able to get architecture info from there.
This may require support that hasn't been written yet, and we may
still need the fp probing for older systems that don't have all of the
support needed to make aux vec work.  Just with a quick check on my
4.15 kernel, I see
hifiveu017:1030$ ./a.out
AT_HWCAP = 0x1105
that is 'a', 'c', 'i', and 'm', each represented as 1<<(x-'a').  The
'f' and 'd' info is missing for some reason.  Maybe it hadn't been
implemented yet in this kernel version.

Jim

Re: [PATCH v2 1/3] RISC-V/Linux/native: Determine FLEN dynamically

[Andreas Schwab]

On Jan 30 2020, Jim Wilson wrote:

> Just with a quick check on my
> 4.15 kernel, I see
> hifiveu017:1030$ ./a.out
> AT_HWCAP = 0x1105
> that is 'a', 'c', 'i', and 'm', each represented as 1<<(x-'a').  The
> 'f' and 'd' info is missing for some reason. Maybe it hadn't been
> implemented yet in this kernel version.

Your kernel is just too archaic to include commit 732e8e4130ff.

Andreas.

-- 
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510  2552 DF73 E780 A9DA AEC1
"And now for something completely different."

Re: [PATCH v2 1/3] RISC-V/Linux/native: Determine FLEN dynamically

[Maciej W. Rozycki]

On Thu, 30 Jan 2020, Jim Wilson wrote:

> > We can do better however and not rely on any particular value of FLEN
> > and probe for it dynamically, by observing that the PTRACE_GETREGSET
> > ptrace(2) call will only accept an exact regset size, and that will
> > reflect FLEN.
> 
> I forgot to mention this before, but our long term plans are to pass
> info via the auxiliary vector from the kernel to the application, and
> then in theory gdb should be able to get architecture info from there.

 Thanks for the heads-up.  This will undoubtedly be useful for something, 
but I think we have a solution for GDB/gdbserver already, so unless the 
circumstances change, I think we're fine without the need to peek at the 
auxv.

 I'll be posting v3, which has just passed testing, right away.  It 
includes a few further improvements beyond what has been already 
discussed.

  Maciej