From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 112144 invoked by alias); 25 Oct 2018 18:17:39 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 112123 invoked by uid 89); 25 Oct 2018 18:17:38 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-2.0 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 spammy=auxvec, hwcap X-HELO: mail-vk1-f195.google.com Received: from mail-vk1-f195.google.com (HELO mail-vk1-f195.google.com) (209.85.221.195) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 25 Oct 2018 18:17:35 +0000 Received: by mail-vk1-f195.google.com with SMTP id l186so2436695vke.0 for ; Thu, 25 Oct 2018 11:17:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=3WKdz8qKdkniftIw6ABCVL6jSBEDXXRwswGulFtIn7E=; b=gjiyAgvkvzwcIHcdsTxJp6/Iv5yXf12juCz0JRNd5N0be2Wf1e9SD87cuc2mYCOomf /B2+4voQ1tymbX4fCE0KQ/P7B6m2WpqE/EABXx07Vsb4S53fJBddo/LpTX5Hee+GICLO MDFUs+a2LA+xYHSp8nbn3UDANAKNO8ixWORUbBsEt596YARnzfYTXhU2Em9jTKDwYRL/ PjowjzArRRBGJKxNZW78zrh6EXyZg657q7FWaHf1k5LiA6iRQ2Q9mm0gNzuyGzFeu+u9 WWi5plWk8Pe5CdIBetP5QqR50CAY4sk27cEVzq6EnzoG189bqEm8PJuokmTjnxGgJwJ6 E4cg== MIME-Version: 1.0 References: <20180808233908.8149-1-jimw@sifive.com> <20181025110946.GN2929@embecosm.com> In-Reply-To: From: Jim Wilson Date: Thu, 25 Oct 2018 18:17:00 -0000 Message-ID: Subject: Re: [PATCH 4/5] RISC-V: Add native linux support. To: John Baldwin Cc: Andrew Burgess , Andreas Schwab , gdb-patches@sourceware.org Content-Type: text/plain; charset="UTF-8" X-SW-Source: 2018-10/txt/msg00588.txt.bz2 On Thu, Oct 25, 2018 at 10:55 AM John Baldwin wrote: > Now that the MISA defaults to 0 if not present, would it better to just remove > this and not set it to 0 explicitly? The FreeBSD native target for RISC-V > doesn't set MISA to anything at all. There is still the issue of FP register size, which comes from MISA, unless perhaps we can get it from auxvec/hw-cap info. I was going to look into that latter, and if the auxvec/hw-cap stuff works, then remove the remaining MISA support in the riscv-linux-nat.c file. Jim