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From: Alan Hayward <Alan.Hayward@arm.com>
To: Simon Marchi <simon.marchi@ericsson.com>,
	Pedro Alves <palves@redhat.com>
Cc: "gdb-patches@sourceware.org" <gdb-patches@sourceware.org>,
	nd <nd@arm.com>
Subject: Re: [PATCH 6/8] Aarch64 SVE pseudo register support
Date: Mon, 04 Jun 2018 13:29:00 -0000	[thread overview]
Message-ID: <EF0FC273-E2F7-4C0D-8907-E7BB5BA239AD@arm.com> (raw)
In-Reply-To: <d10c31c5-4111-b8ac-431e-359476ec85e8@ericsson.com>

Update of patch posted below.


> On 31 May 2018, at 15:57, Pedro Alves <palves@redhat.com> wrote:
> 
> On 05/11/2018 11:52 AM, Alan Hayward wrote:
> 
>> +/* Return the type for an AdvSISD V register.  */
>> +
>> +static struct type *
>> +aarch64_vnv_type (struct gdbarch *gdbarch)
>> +{
>> +  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
>> +
>> +  if (tdep->vnv_type == NULL)
>> +    {
>> +      struct type *t;
>> +      struct type *elem;
> 
> ELEM appears unused. 
> 

Leftover from copy paste of previous block of code. Removed.



> On 31 May 2018, at 13:21, Simon Marchi <simon.marchi@ericsson.com> wrote:
> 
> On 2018-05-11 06:52 AM, Alan Hayward wrote:
>> Add the functionality for reading/writing psuedo registers.
> 
> “pseudo"

Done.

>> 
>> static struct value *
>> -aarch64_pseudo_read_value_2 (readable_regcache *regcache, int regnum_offset,
>> +aarch64_pseudo_read_value_2 (struct gdbarch *gdbarch,
>> +			     readable_regcache *regcache, int regnum_offset,
>> 			     int regsize, struct value *result_value)
>> {
>> -  gdb_byte reg_buf[V_REGISTER_SIZE];
>> +  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
>> +  gdb_byte v_buf[V_REGISTER_SIZE], *reg_buf;
>> +  gdb_assert (AARCH64_V0_REGNUM == AARCH64_SVE_Z0_REGNUM);
>>   unsigned v_regnum = AARCH64_V0_REGNUM + regnum_offset;
>> 
>> +  /* Enough space to read a full vector register.  */
>> +  if (tdep->has_sve ())
>> +    reg_buf = (gdb_byte *) xmalloc (register_size (gdbarch, AARCH64_V0_REGNUM));
>> +  else
>> +    reg_buf = v_buf;
> 
> If the size of a register (even with SVE) will always be reasonable to allocate on the
> stack, maybe you could just use
> 
>  gdb_byte reg_buf[register_size (gdbarch, AARCH64_V0_REGNUM)];
> 
> (If there is always a register with number AARCH64_V0_REGNUM, that is)
> 
> Otherwise, it would be good to use an std::unique_ptr/gdb::unique_xmalloc_ptr to avoid
> the manual xfree.
> 
> Same in aarch64_pseudo_write_2.
> 

Thinking about this a little more, on an SVE system, a compiler
spill of a SVE register is going to result in it going to the
stack anyway.
Max size of an SVE register we support is 256 bytes, which
doesn't seem unreasonable to add to the stack.

Updated to use an array. Are you happy with the new version?


Thanks,
Alan.


diff --git a/gdb/aarch64-tdep.h b/gdb/aarch64-tdep.h
index b6b9b30e715291fb0512f214a88ce49445fb290b..76243b7de53483bf8394adc1f7c493798da25b06 100644
--- a/gdb/aarch64-tdep.h
+++ b/gdb/aarch64-tdep.h
@@ -70,6 +70,7 @@ struct gdbarch_tdep
   struct type *vns_type;
   struct type *vnh_type;
   struct type *vnb_type;
+  struct type *vnv_type;

   /* syscall record.  */
   int (*aarch64_syscall_record) (struct regcache *regcache, unsigned long svc_number);
diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index b752338178f28a1169234a76941a1546bbc9dfa7..f04729f402ec56416cd772e5ca94f0681ea85beb 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -69,6 +69,7 @@
 #define AARCH64_S0_REGNUM (AARCH64_D0_REGNUM + 32)
 #define AARCH64_H0_REGNUM (AARCH64_S0_REGNUM + 32)
 #define AARCH64_B0_REGNUM (AARCH64_H0_REGNUM + 32)
+#define AARCH64_SVE_V0_REGNUM (AARCH64_B0_REGNUM + 32)

 /* All possible aarch64 target descriptors.  */
 struct target_desc *tdesc_aarch64_list[AARCH64_MAX_SVE_VQ + 1];
@@ -1766,6 +1767,30 @@ aarch64_vnb_type (struct gdbarch *gdbarch)
   return tdep->vnb_type;
 }

+/* Return the type for an AdvSISD V register.  */
+
+static struct type *
+aarch64_vnv_type (struct gdbarch *gdbarch)
+{
+  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+  if (tdep->vnv_type == NULL)
+    {
+      struct type *t = arch_composite_type (gdbarch, "__gdb_builtin_type_vnv",
+					    TYPE_CODE_UNION);
+
+      append_composite_type_field (t, "d", aarch64_vnd_type (gdbarch));
+      append_composite_type_field (t, "s", aarch64_vns_type (gdbarch));
+      append_composite_type_field (t, "h", aarch64_vnh_type (gdbarch));
+      append_composite_type_field (t, "b", aarch64_vnb_type (gdbarch));
+      append_composite_type_field (t, "q", aarch64_vnq_type (gdbarch));
+
+      tdep->vnv_type = t;
+    }
+
+  return tdep->vnv_type;
+}
+
 /* Implement the "dwarf2_reg_to_regnum" gdbarch method.  */

 static int
@@ -2114,6 +2139,8 @@ aarch64_gen_return_address (struct gdbarch *gdbarch,
 static const char *
 aarch64_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
 {
+  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
   static const char *const q_name[] =
     {
       "q0", "q1", "q2", "q3",
@@ -2191,6 +2218,25 @@ aarch64_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
   if (regnum >= AARCH64_B0_REGNUM && regnum < AARCH64_B0_REGNUM + 32)
     return b_name[regnum - AARCH64_B0_REGNUM];

+  if (tdep->has_sve ())
+    {
+      static const char *const sve_v_name[] =
+	{
+	  "v0", "v1", "v2", "v3",
+	  "v4", "v5", "v6", "v7",
+	  "v8", "v9", "v10", "v11",
+	  "v12", "v13", "v14", "v15",
+	  "v16", "v17", "v18", "v19",
+	  "v20", "v21", "v22", "v23",
+	  "v24", "v25", "v26", "v27",
+	  "v28", "v29", "v30", "v31",
+	};
+
+      if (regnum >= AARCH64_SVE_V0_REGNUM
+	  && regnum < AARCH64_SVE_V0_REGNUM + AARCH64_V_REGS_NUM)
+	return sve_v_name[regnum - AARCH64_SVE_V0_REGNUM];
+    }
+
   internal_error (__FILE__, __LINE__,
 		  _("aarch64_pseudo_register_name: bad register number %d"),
 		  regnum);
@@ -2201,6 +2247,8 @@ aarch64_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
 static struct type *
 aarch64_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
 {
+  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
   regnum -= gdbarch_num_regs (gdbarch);

   if (regnum >= AARCH64_Q0_REGNUM && regnum < AARCH64_Q0_REGNUM + 32)
@@ -2218,6 +2266,10 @@ aarch64_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
   if (regnum >= AARCH64_B0_REGNUM && regnum < AARCH64_B0_REGNUM + 32)
     return aarch64_vnb_type (gdbarch);

+  if (tdep->has_sve () && regnum >= AARCH64_SVE_V0_REGNUM
+      && regnum < AARCH64_SVE_V0_REGNUM + 32)
+    return aarch64_vnv_type (gdbarch);
+
   internal_error (__FILE__, __LINE__,
 		  _("aarch64_pseudo_register_type: bad register number %d"),
 		  regnum);
@@ -2229,6 +2281,8 @@ static int
 aarch64_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
 				    struct reggroup *group)
 {
+  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
   regnum -= gdbarch_num_regs (gdbarch);

   if (regnum >= AARCH64_Q0_REGNUM && regnum < AARCH64_Q0_REGNUM + 32)
@@ -2243,6 +2297,9 @@ aarch64_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
     return group == all_reggroup || group == vector_reggroup;
   else if (regnum >= AARCH64_B0_REGNUM && regnum < AARCH64_B0_REGNUM + 32)
     return group == all_reggroup || group == vector_reggroup;
+  else if (tdep->has_sve () && regnum >= AARCH64_SVE_V0_REGNUM
+	   && regnum < AARCH64_SVE_V0_REGNUM + 32)
+    return group == all_reggroup || group == vector_reggroup;

   return group == all_reggroup;
 }
@@ -2250,17 +2307,22 @@ aarch64_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
 /* Helper for aarch64_pseudo_read_value.  */

 static struct value *
-aarch64_pseudo_read_value_1 (readable_regcache *regcache, int regnum_offset,
+aarch64_pseudo_read_value_1 (struct gdbarch *gdbarch,
+			     readable_regcache *regcache, int regnum_offset,
 			     int regsize, struct value *result_value)
 {
-  gdb_byte reg_buf[V_REGISTER_SIZE];
   unsigned v_regnum = AARCH64_V0_REGNUM + regnum_offset;

+  /* Enough space for a full vector register.  */
+  gdb_byte reg_buf[register_size (gdbarch, AARCH64_V0_REGNUM)];
+  gdb_assert (AARCH64_V0_REGNUM == AARCH64_SVE_Z0_REGNUM);
+
   if (regcache->raw_read (v_regnum, reg_buf) != REG_VALID)
     mark_value_bytes_unavailable (result_value, 0,
 				  TYPE_LENGTH (value_type (result_value)));
   else
     memcpy (value_contents_raw (result_value), reg_buf, regsize);
+
   return result_value;
  }

@@ -2270,6 +2332,7 @@ static struct value *
 aarch64_pseudo_read_value (struct gdbarch *gdbarch, readable_regcache *regcache,
 			   int regnum)
 {
+  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
   struct value *result_value = allocate_value (register_type (gdbarch, regnum));

   VALUE_LVAL (result_value) = lval_register;
@@ -2278,42 +2341,56 @@ aarch64_pseudo_read_value (struct gdbarch *gdbarch, readable_regcache *regcache,
   regnum -= gdbarch_num_regs (gdbarch);

   if (regnum >= AARCH64_Q0_REGNUM && regnum < AARCH64_Q0_REGNUM + 32)
-    return aarch64_pseudo_read_value_1 (regcache, regnum - AARCH64_Q0_REGNUM,
+    return aarch64_pseudo_read_value_1 (gdbarch, regcache,
+					regnum - AARCH64_Q0_REGNUM,
 					Q_REGISTER_SIZE, result_value);

   if (regnum >= AARCH64_D0_REGNUM && regnum < AARCH64_D0_REGNUM + 32)
-    return aarch64_pseudo_read_value_1 (regcache, regnum - AARCH64_D0_REGNUM,
+    return aarch64_pseudo_read_value_1 (gdbarch, regcache,
+					regnum - AARCH64_D0_REGNUM,
 					D_REGISTER_SIZE, result_value);

   if (regnum >= AARCH64_S0_REGNUM && regnum < AARCH64_S0_REGNUM + 32)
-    return aarch64_pseudo_read_value_1 (regcache, regnum - AARCH64_S0_REGNUM,
+    return aarch64_pseudo_read_value_1 (gdbarch, regcache,
+					regnum - AARCH64_S0_REGNUM,
 					S_REGISTER_SIZE, result_value);

   if (regnum >= AARCH64_H0_REGNUM && regnum < AARCH64_H0_REGNUM + 32)
-    return aarch64_pseudo_read_value_1 (regcache, regnum - AARCH64_H0_REGNUM,
+    return aarch64_pseudo_read_value_1 (gdbarch, regcache,
+					regnum - AARCH64_H0_REGNUM,
 					H_REGISTER_SIZE, result_value);

   if (regnum >= AARCH64_B0_REGNUM && regnum < AARCH64_B0_REGNUM + 32)
-    return aarch64_pseudo_read_value_1 (regcache, regnum - AARCH64_B0_REGNUM,
+    return aarch64_pseudo_read_value_1 (gdbarch, regcache,
+					regnum - AARCH64_B0_REGNUM,
 					B_REGISTER_SIZE, result_value);

+  if (tdep->has_sve () && regnum >= AARCH64_SVE_V0_REGNUM
+      && regnum < AARCH64_SVE_V0_REGNUM + 32)
+    return aarch64_pseudo_read_value_1 (gdbarch, regcache,
+					regnum - AARCH64_SVE_V0_REGNUM,
+					V_REGISTER_SIZE, result_value);
+
   gdb_assert_not_reached ("regnum out of bound");
 }

 /* Helper for aarch64_pseudo_write.  */

 static void
-aarch64_pseudo_write_1 (struct regcache *regcache, int regnum_offset,
-			int regsize, const gdb_byte *buf)
+aarch64_pseudo_write_1 (struct gdbarch *gdbarch, struct regcache *regcache,
+			int regnum_offset, int regsize, const gdb_byte *buf)
 {
-  gdb_byte reg_buf[V_REGISTER_SIZE];
   unsigned v_regnum = AARCH64_V0_REGNUM + regnum_offset;

+  /* Enough space for a full vector register.  */
+  gdb_byte reg_buf[register_size (gdbarch, AARCH64_V0_REGNUM)];
+  gdb_assert (AARCH64_V0_REGNUM == AARCH64_SVE_Z0_REGNUM);
+
   /* Ensure the register buffer is zero, we want gdb writes of the
      various 'scalar' pseudo registers to behavior like architectural
      writes, register width bytes are written the remainder are set to
      zero.  */
-  memset (reg_buf, 0, sizeof (reg_buf));
+  memset (reg_buf, 0, register_size (gdbarch, AARCH64_V0_REGNUM));

   memcpy (reg_buf, buf, regsize);
   regcache->raw_write (v_regnum, reg_buf);
@@ -2325,27 +2402,39 @@ static void
 aarch64_pseudo_write (struct gdbarch *gdbarch, struct regcache *regcache,
 		      int regnum, const gdb_byte *buf)
 {
+  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
   regnum -= gdbarch_num_regs (gdbarch);

   if (regnum >= AARCH64_Q0_REGNUM && regnum < AARCH64_Q0_REGNUM + 32)
-    return aarch64_pseudo_write_1 (regcache, regnum - AARCH64_Q0_REGNUM,
-				   Q_REGISTER_SIZE, buf);
+    return aarch64_pseudo_write_1 (gdbarch, regcache,
+				   regnum - AARCH64_Q0_REGNUM, Q_REGISTER_SIZE,
+				   buf);

   if (regnum >= AARCH64_D0_REGNUM && regnum < AARCH64_D0_REGNUM + 32)
-    return aarch64_pseudo_write_1 (regcache, regnum - AARCH64_D0_REGNUM,
-				   D_REGISTER_SIZE, buf);
+    return aarch64_pseudo_write_1 (gdbarch, regcache,
+				   regnum - AARCH64_D0_REGNUM, D_REGISTER_SIZE,
+				   buf);

   if (regnum >= AARCH64_S0_REGNUM && regnum < AARCH64_S0_REGNUM + 32)
-    return aarch64_pseudo_write_1 (regcache, regnum - AARCH64_S0_REGNUM,
-				   S_REGISTER_SIZE, buf);
+    return aarch64_pseudo_write_1 (gdbarch, regcache,
+				   regnum - AARCH64_S0_REGNUM, S_REGISTER_SIZE,
+				   buf);

   if (regnum >= AARCH64_H0_REGNUM && regnum < AARCH64_H0_REGNUM + 32)
-    return aarch64_pseudo_write_1 (regcache, regnum - AARCH64_H0_REGNUM,
-				   H_REGISTER_SIZE, buf);
+    return aarch64_pseudo_write_1 (gdbarch, regcache,
+				   regnum - AARCH64_H0_REGNUM, H_REGISTER_SIZE,
+				   buf);

   if (regnum >= AARCH64_B0_REGNUM && regnum < AARCH64_B0_REGNUM + 32)
-    return aarch64_pseudo_write_1 (regcache, regnum - AARCH64_B0_REGNUM,
-				   B_REGISTER_SIZE, buf);
+    return aarch64_pseudo_write_1 (gdbarch, regcache,
+				   regnum - AARCH64_B0_REGNUM, B_REGISTER_SIZE,
+				   buf);
+
+  if (tdep->has_sve () && regnum >= AARCH64_SVE_V0_REGNUM
+      && regnum < AARCH64_SVE_V0_REGNUM + 32)
+    return aarch64_pseudo_write_1 (gdbarch, regcache,
+				   regnum - AARCH64_SVE_V0_REGNUM,
+				   V_REGISTER_SIZE, buf);

   gdb_assert_not_reached ("regnum out of bound");
 }





  reply	other threads:[~2018-06-04 13:29 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-11 10:53 [PATCH 0/8] Add SVE support for Aarch64 GDB Alan Hayward
2018-05-11 10:53 ` [PATCH 2/8] Function for reading the Aarch64 SVE vector length Alan Hayward
2018-05-31 12:06   ` Simon Marchi
2018-05-31 14:18     ` Alan Hayward
2018-05-31 14:57   ` Pedro Alves
2018-06-05 20:01   ` Sergio Durigan Junior
2018-06-05 22:06     ` [PATCH] Guard declarations of 'sve_*_from_*' macros on Aarch64 (and unbreak build) Sergio Durigan Junior
2018-06-05 23:37       ` Sergio Durigan Junior
2018-06-06  7:34       ` Alan Hayward
2018-06-06 21:19         ` Simon Marchi
2018-06-06 21:36         ` Sergio Durigan Junior
2018-05-11 10:53 ` [PATCH 7/8] Add methods to gdbserver regcache and raw_compare Alan Hayward
2018-05-31 14:57   ` Pedro Alves
2018-05-11 10:53 ` [PATCH 4/8] Enable SVE for GDB Alan Hayward
2018-05-31 12:22   ` Simon Marchi
2018-06-04 11:19     ` Alan Hayward
2018-05-31 14:58   ` Pedro Alves
2018-05-31 16:13   ` Pedro Alves
2018-05-31 16:20     ` Alan Hayward
2018-05-31 16:27       ` Pedro Alves
2018-05-31 18:06         ` Alan Hayward
2018-05-11 10:53 ` [PATCH 8/8] Ptrace support for Aarch64 SVE Alan Hayward
2018-05-31 13:40   ` Simon Marchi
2018-05-31 14:56     ` Alan Hayward
2018-06-01 15:17       ` Simon Marchi
2018-06-04 15:49         ` Alan Hayward
2018-05-31 20:17   ` Simon Marchi
2018-05-11 10:53 ` [PATCH 1/8] Add Aarch64 SVE target description Alan Hayward
2018-05-11 14:56   ` Eli Zaretskii
2018-05-11 16:46     ` Alan Hayward
2018-05-31 11:56   ` Simon Marchi
2018-05-31 14:12     ` Alan Hayward
2018-05-11 10:53 ` [PATCH 6/8] Aarch64 SVE pseudo register support Alan Hayward
2018-05-31 13:26   ` Simon Marchi
2018-06-04 13:29     ` Alan Hayward [this message]
2018-05-31 14:59   ` Pedro Alves
2018-05-11 11:52 ` [PATCH 5/8] Add aarch64 psuedo help functions Alan Hayward
2018-05-31 13:22   ` Simon Marchi
2018-05-31 15:20     ` Pedro Alves
2018-06-04 13:13     ` Alan Hayward
2018-05-11 12:12 ` [PATCH 3/8] Add SVE register defines Alan Hayward
2018-06-01  8:33   ` Alan Hayward
2018-06-01 15:18     ` Simon Marchi
2018-05-22 11:00 ` [PATCH 0/8] Add SVE support for Aarch64 GDB Alan Hayward
2018-05-29 12:09   ` [PING 2][PATCH " Alan Hayward
2018-05-29 14:35     ` Omair Javaid
2018-05-29 14:59       ` Alan Hayward

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