* [PATCH 0/3] Minor amd64/avx512 improvments @ 2024-05-23 13:48 Felix Willgerodt 2024-05-23 13:48 ` [PATCH 1/3] gdb, doc: Fix AVX-512 documentation Felix Willgerodt ` (2 more replies) 0 siblings, 3 replies; 12+ messages in thread From: Felix Willgerodt @ 2024-05-23 13:48 UTC (permalink / raw) To: gdb-patches This series is a mix of some older patches that improve various minor things in our documentation or codebase, mainly related to amd64 and AVX512. They are totally unrelated to each other, but since they are so small I bundled them in one patch series anyway. Thanks, Felix Felix Willgerodt (3): gdb, doc: Fix AVX-512 documentation. gdb, amd64: remove unused forward declerations gdb: rename offset to high bits in ymm registers gdb/amd64-linux-tdep.h | 12 ------------ gdb/doc/gdb.texinfo | 10 +++++++++- gdb/i387-tdep.c | 19 ++++++++++--------- 3 files changed, 19 insertions(+), 22 deletions(-) -- 2.34.1 Intel Deutschland GmbH Registered Address: Am Campeon 10, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Sean Fennelly, Jeffrey Schneiderman, Tiffany Doon Silva Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928 ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 1/3] gdb, doc: Fix AVX-512 documentation. 2024-05-23 13:48 [PATCH 0/3] Minor amd64/avx512 improvments Felix Willgerodt @ 2024-05-23 13:48 ` Felix Willgerodt 2024-05-23 13:58 ` Eli Zaretskii 2024-05-23 13:48 ` [PATCH 2/3] gdb, amd64: remove unused forward declerations Felix Willgerodt 2024-05-23 13:48 ` [PATCH 3/3] gdb: rename offset to high bits in ymm registers Felix Willgerodt 2 siblings, 1 reply; 12+ messages in thread From: Felix Willgerodt @ 2024-05-23 13:48 UTC (permalink / raw) To: gdb-patches org.gnu.gdb.i386.avx512 adds k registers, but these aren't mentioned in the docs yet. Fix that. In addition the documentation describes xmm registers with an `h` (e.g. xmm16h). I am assuming that we follow the register xml files here, which don't have the h suffix. So this removes that as well. --- gdb/doc/gdb.texinfo | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index 61f91ef4ad6..750f368f980 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -49471,7 +49471,7 @@ describe additional @sc{xmm} registers: @itemize @minus @item -@samp{xmm16h} through @samp{xmm31h}, only valid for amd64. +@samp{xmm16} through @samp{xmm31}, only valid for amd64. @end itemize It should describe the upper 128 bits of additional @sc{ymm} registers: @@ -49499,6 +49499,14 @@ describe the additional @sc{zmm} registers: @samp{zmm16h} through @samp{zmm31h}, only valid for amd64. @end itemize +It should +describe the additional 64-bit @sc{k} registers: + +@itemize @minus +@item +@samp{k0} through @samp{k7}, valid for amd64 and i386. +@end itemize + The @samp{org.gnu.gdb.i386.pkeys} feature is optional. It should describe a single register, @samp{pkru}. It is a 32-bit register valid for i386 and amd64. -- 2.34.1 Intel Deutschland GmbH Registered Address: Am Campeon 10, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Sean Fennelly, Jeffrey Schneiderman, Tiffany Doon Silva Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928 ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/3] gdb, doc: Fix AVX-512 documentation. 2024-05-23 13:48 ` [PATCH 1/3] gdb, doc: Fix AVX-512 documentation Felix Willgerodt @ 2024-05-23 13:58 ` Eli Zaretskii 2024-05-31 7:35 ` Willgerodt, Felix 0 siblings, 1 reply; 12+ messages in thread From: Eli Zaretskii @ 2024-05-23 13:58 UTC (permalink / raw) To: Felix Willgerodt; +Cc: gdb-patches > From: Felix Willgerodt <felix.willgerodt@intel.com> > Date: Thu, 23 May 2024 15:48:40 +0200 > > org.gnu.gdb.i386.avx512 adds k registers, but these aren't mentioned in the > docs yet. Fix that. > > In addition the documentation describes xmm registers with an `h` > (e.g. xmm16h). I am assuming that we follow the register xml files here, > which don't have the h suffix. So this removes that as well. > --- > gdb/doc/gdb.texinfo | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo > index 61f91ef4ad6..750f368f980 100644 > --- a/gdb/doc/gdb.texinfo > +++ b/gdb/doc/gdb.texinfo > @@ -49471,7 +49471,7 @@ describe additional @sc{xmm} registers: > > @itemize @minus > @item > -@samp{xmm16h} through @samp{xmm31h}, only valid for amd64. > +@samp{xmm16} through @samp{xmm31}, only valid for amd64. > @end itemize > > It should describe the upper 128 bits of additional @sc{ymm} registers: > @@ -49499,6 +49499,14 @@ describe the additional @sc{zmm} registers: > @samp{zmm16h} through @samp{zmm31h}, only valid for amd64. > @end itemize > > +It should > +describe the additional 64-bit @sc{k} registers: > + > +@itemize @minus > +@item > +@samp{k0} through @samp{k7}, valid for amd64 and i386. > +@end itemize > + > The @samp{org.gnu.gdb.i386.pkeys} feature is optional. It should > describe a single register, @samp{pkru}. It is a 32-bit register > valid for i386 and amd64. > -- > 2.34.1 This is okay, thanks. Approved-By: Eli Zaretskii <eliz@gnu.org> ^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH 1/3] gdb, doc: Fix AVX-512 documentation. 2024-05-23 13:58 ` Eli Zaretskii @ 2024-05-31 7:35 ` Willgerodt, Felix 0 siblings, 0 replies; 12+ messages in thread From: Willgerodt, Felix @ 2024-05-31 7:35 UTC (permalink / raw) To: Eli Zaretskii; +Cc: gdb-patches > > From: Felix Willgerodt <felix.willgerodt@intel.com> > > Date: Thu, 23 May 2024 15:48:40 +0200 > > > > org.gnu.gdb.i386.avx512 adds k registers, but these aren't mentioned in the > > docs yet. Fix that. > > > > In addition the documentation describes xmm registers with an `h` > > (e.g. xmm16h). I am assuming that we follow the register xml files here, > > which don't have the h suffix. So this removes that as well. > > --- > > gdb/doc/gdb.texinfo | 10 +++++++++- > > 1 file changed, 9 insertions(+), 1 deletion(-) > > > This is okay, thanks. > > Approved-By: Eli Zaretskii <eliz@gnu.org> Thanks, I pushed this. Felix Intel Deutschland GmbH Registered Address: Am Campeon 10, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Sean Fennelly, Jeffrey Schneiderman, Tiffany Doon Silva Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928 ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 2/3] gdb, amd64: remove unused forward declerations 2024-05-23 13:48 [PATCH 0/3] Minor amd64/avx512 improvments Felix Willgerodt 2024-05-23 13:48 ` [PATCH 1/3] gdb, doc: Fix AVX-512 documentation Felix Willgerodt @ 2024-05-23 13:48 ` Felix Willgerodt 2024-05-23 14:08 ` Tom Tromey 2024-05-23 13:48 ` [PATCH 3/3] gdb: rename offset to high bits in ymm registers Felix Willgerodt 2 siblings, 1 reply; 12+ messages in thread From: Felix Willgerodt @ 2024-05-23 13:48 UTC (permalink / raw) To: gdb-patches These structs are not referenced anywhere anymore and seemed to have been missed at some point when their usage was removed. Co-authored-by: Nils-Christian Kempke <nils-christian.kempke@intel.com> --- gdb/amd64-linux-tdep.h | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/gdb/amd64-linux-tdep.h b/gdb/amd64-linux-tdep.h index 2003dcda78f..66170256639 100644 --- a/gdb/amd64-linux-tdep.h +++ b/gdb/amd64-linux-tdep.h @@ -31,18 +31,6 @@ /* Total number of registers for GNU/Linux. */ #define AMD64_LINUX_NUM_REGS (AMD64_LINUX_ORIG_RAX_REGNUM + 1) -/* Linux target description. */ -extern struct target_desc *tdesc_amd64_linux; -extern struct target_desc *tdesc_amd64_avx_linux; -extern struct target_desc *tdesc_amd64_mpx_linux; -extern struct target_desc *tdesc_amd64_avx_mpx_linux; -extern struct target_desc *tdesc_amd64_avx_avx512_linux; -extern struct target_desc *tdesc_amd64_avx_mpx_avx512_pku_linux; - -extern struct target_desc *tdesc_x32_linux; -extern struct target_desc *tdesc_x32_avx_linux; -extern struct target_desc *tdesc_x32_avx_avx512_linux; - /* Return the right amd64-linux target descriptions according to XCR0_FEATURES_BIT and IS_X32. */ -- 2.34.1 Intel Deutschland GmbH Registered Address: Am Campeon 10, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Sean Fennelly, Jeffrey Schneiderman, Tiffany Doon Silva Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928 ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/3] gdb, amd64: remove unused forward declerations 2024-05-23 13:48 ` [PATCH 2/3] gdb, amd64: remove unused forward declerations Felix Willgerodt @ 2024-05-23 14:08 ` Tom Tromey 2024-05-31 7:35 ` Willgerodt, Felix 0 siblings, 1 reply; 12+ messages in thread From: Tom Tromey @ 2024-05-23 14:08 UTC (permalink / raw) To: Felix Willgerodt; +Cc: gdb-patches >>>>> "Felix" == Felix Willgerodt <felix.willgerodt@intel.com> writes: Felix> These structs are not referenced anywhere anymore and seemed to have been Felix> missed at some point when their usage was removed. Felix> Co-authored-by: Nils-Christian Kempke <nils-christian.kempke@intel.com> Seems obvious to me. Thanks. Approved-By: Tom Tromey <tom@tromey.com> Tom ^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH 2/3] gdb, amd64: remove unused forward declerations 2024-05-23 14:08 ` Tom Tromey @ 2024-05-31 7:35 ` Willgerodt, Felix 0 siblings, 0 replies; 12+ messages in thread From: Willgerodt, Felix @ 2024-05-31 7:35 UTC (permalink / raw) To: Tom Tromey; +Cc: gdb-patches > -----Original Message----- > From: Tom Tromey <tom@tromey.com> > Sent: Donnerstag, 23. Mai 2024 16:09 > To: Willgerodt, Felix <felix.willgerodt@intel.com> > Cc: gdb-patches@sourceware.org > Subject: Re: [PATCH 2/3] gdb, amd64: remove unused forward declerations > > >>>>> "Felix" == Felix Willgerodt <felix.willgerodt@intel.com> writes: > > Felix> These structs are not referenced anywhere anymore and seemed to have > been > Felix> missed at some point when their usage was removed. > > Felix> Co-authored-by: Nils-Christian Kempke <nils-christian.kempke@intel.com> > > Seems obvious to me. Thanks. > Approved-By: Tom Tromey <tom@tromey.com> > > Tom Thanks, I pushed this! Felix Intel Deutschland GmbH Registered Address: Am Campeon 10, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Sean Fennelly, Jeffrey Schneiderman, Tiffany Doon Silva Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928 ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 3/3] gdb: rename offset to high bits in ymm registers 2024-05-23 13:48 [PATCH 0/3] Minor amd64/avx512 improvments Felix Willgerodt 2024-05-23 13:48 ` [PATCH 1/3] gdb, doc: Fix AVX-512 documentation Felix Willgerodt 2024-05-23 13:48 ` [PATCH 2/3] gdb, amd64: remove unused forward declerations Felix Willgerodt @ 2024-05-23 13:48 ` Felix Willgerodt 2024-06-06 9:12 ` Willgerodt, Felix ` (2 more replies) 2 siblings, 3 replies; 12+ messages in thread From: Felix Willgerodt @ 2024-05-23 13:48 UTC (permalink / raw) To: gdb-patches The xsave_ymm_avx512_offset data structure contains the xsave offset to the upper 128 bits of a ymm register. Similarly, for zmm this offset is described by xsave_avx512_zmm_h_offset, h indicating the high bits. This commit renames the xsave_ymm_avx512_offset to xsave_ymm_h_avx512_offset - as well as the associated define from XSAVE_YMM_AVX512_ADDR to XSAVE_YMM_H_AVX512_ADDR - to make this more consistent. Note, that the regnum defines already included the 'h' for ymm, like I387_YMM16H_REGNUM and I387_YMMH_AVX512_END_REGNUM. Co-authored-by: Nils-Christian Kempke <nils-christian.kempke@intel.com> --- gdb/i387-tdep.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/gdb/i387-tdep.c b/gdb/i387-tdep.c index 45bd43a50a9..675ee8d2e81 100644 --- a/gdb/i387-tdep.c +++ b/gdb/i387-tdep.c @@ -762,11 +762,11 @@ static int xsave_avxh_offset[] = (xsave + (tdep)->xsave_layout.avx_offset \ + xsave_avxh_offset[regnum - I387_YMM0H_REGNUM (tdep)]) -/* At xsave_ymm_avx512_offset[REGNUM] you'll find the relative offset +/* At xsave_ymm_h_avx512_offset[REGNUM] you'll find the relative offset within the ZMM region of the XSAVE extended state where the second 128bits of GDB register YMM16 + REGNUM is stored. */ -static int xsave_ymm_avx512_offset[] = +static int xsave_ymm_h_avx512_offset[] = { 16 + 0 * 64, /* %ymm16 through... */ 16 + 1 * 64, @@ -786,9 +786,9 @@ static int xsave_ymm_avx512_offset[] = 16 + 15 * 64 /* ... %ymm31 (128 bits each). */ }; -#define XSAVE_YMM_AVX512_ADDR(tdep, xsave, regnum) \ +#define XSAVE_YMM_H_AVX512_ADDR(tdep, xsave, regnum) \ (xsave + (tdep)->xsave_layout.zmm_offset \ - + xsave_ymm_avx512_offset[regnum - I387_YMM16H_REGNUM (tdep)]) + + xsave_ymm_h_avx512_offset[regnum - I387_YMM16H_REGNUM (tdep)]) /* At xsave_xmm_avx512_offset[REGNUM] you'll find the relative offset within the ZMM region of the XSAVE extended state where the first @@ -1187,7 +1187,7 @@ i387_supply_xsave (struct regcache *regcache, int regnum, regcache->raw_supply (regnum, zero); else regcache->raw_supply (regnum, - XSAVE_YMM_AVX512_ADDR (tdep, regs, regnum)); + XSAVE_YMM_H_AVX512_ADDR (tdep, regs, regnum)); return; case avx512_xmm_avx512: @@ -1314,7 +1314,8 @@ i387_supply_xsave (struct regcache *regcache, int regnum, for (i = I387_YMM16H_REGNUM (tdep); i < I387_YMMH_AVX512_END_REGNUM (tdep); i++) - regcache->raw_supply (i, XSAVE_YMM_AVX512_ADDR (tdep, regs, i)); + regcache->raw_supply (i, + XSAVE_YMM_H_AVX512_ADDR (tdep, regs, i)); for (i = I387_XMM16_REGNUM (tdep); i < I387_XMM_AVX512_END_REGNUM (tdep); i++) @@ -1644,7 +1645,7 @@ i387_collect_xsave (const struct regcache *regcache, int regnum, memset (XSAVE_AVX512_ZMM16_H_ADDR (tdep, regs, i), 0, 32); for (i = I387_YMM16H_REGNUM (tdep); i < I387_YMMH_AVX512_END_REGNUM (tdep); i++) - memset (XSAVE_YMM_AVX512_ADDR (tdep, regs, i), 0, 16); + memset (XSAVE_YMM_H_AVX512_ADDR (tdep, regs, i), 0, 16); for (i = I387_XMM16_REGNUM (tdep); i < I387_XMM_AVX512_END_REGNUM (tdep); i++) memset (XSAVE_XMM_AVX512_ADDR (tdep, regs, i), 0, 16); @@ -1750,7 +1751,7 @@ i387_collect_xsave (const struct regcache *regcache, int regnum, i < I387_YMMH_AVX512_END_REGNUM (tdep); i++) { regcache->raw_collect (i, raw); - p = XSAVE_YMM_AVX512_ADDR (tdep, regs, i); + p = XSAVE_YMM_H_AVX512_ADDR (tdep, regs, i); if (memcmp (raw, p, 16) != 0) { xstate_bv |= X86_XSTATE_ZMM; @@ -1911,7 +1912,7 @@ i387_collect_xsave (const struct regcache *regcache, int regnum, case avx512_ymmh_avx512: /* This is an upper YMM16-31 register. */ - p = XSAVE_YMM_AVX512_ADDR (tdep, regs, regnum); + p = XSAVE_YMM_H_AVX512_ADDR (tdep, regs, regnum); if (memcmp (raw, p, 16) != 0) { xstate_bv |= X86_XSTATE_ZMM; -- 2.34.1 Intel Deutschland GmbH Registered Address: Am Campeon 10, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Sean Fennelly, Jeffrey Schneiderman, Tiffany Doon Silva Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928 ^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH 3/3] gdb: rename offset to high bits in ymm registers 2024-05-23 13:48 ` [PATCH 3/3] gdb: rename offset to high bits in ymm registers Felix Willgerodt @ 2024-06-06 9:12 ` Willgerodt, Felix 2024-06-14 13:55 ` [PING v2] " Willgerodt, Felix 2024-06-17 12:38 ` Andrew Burgess 2 siblings, 0 replies; 12+ messages in thread From: Willgerodt, Felix @ 2024-06-06 9:12 UTC (permalink / raw) To: Willgerodt, Felix, gdb-patches > -----Original Message----- > From: Felix Willgerodt <felix.willgerodt@intel.com> > Sent: Donnerstag, 23. Mai 2024 15:49 > To: gdb-patches@sourceware.org > Subject: [PATCH 3/3] gdb: rename offset to high bits in ymm registers > > The xsave_ymm_avx512_offset data structure contains the xsave > offset to the upper 128 bits of a ymm register. Similarly, for zmm this > offset is described by xsave_avx512_zmm_h_offset, h indicating the > high bits. This commit renames the xsave_ymm_avx512_offset to > xsave_ymm_h_avx512_offset - as well as the associated define from > XSAVE_YMM_AVX512_ADDR to XSAVE_YMM_H_AVX512_ADDR - to make this > more consistent. > > Note, that the regnum defines already included the 'h' for ymm, like > I387_YMM16H_REGNUM and I387_YMMH_AVX512_END_REGNUM. > > Co-authored-by: Nils-Christian Kempke <nils-christian.kempke@intel.com> > --- > gdb/i387-tdep.c | 19 ++++++++++--------- > 1 file changed, 10 insertions(+), 9 deletions(-) Kindly pinging. This one is fairly straightforward. I already merged the other 2 patches. Thanks, Felix Intel Deutschland GmbH Registered Address: Am Campeon 10, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Sean Fennelly, Jeffrey Schneiderman, Tiffany Doon Silva Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928 ^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PING v2] [PATCH 3/3] gdb: rename offset to high bits in ymm registers 2024-05-23 13:48 ` [PATCH 3/3] gdb: rename offset to high bits in ymm registers Felix Willgerodt 2024-06-06 9:12 ` Willgerodt, Felix @ 2024-06-14 13:55 ` Willgerodt, Felix 2024-06-17 12:38 ` Andrew Burgess 2 siblings, 0 replies; 12+ messages in thread From: Willgerodt, Felix @ 2024-06-14 13:55 UTC (permalink / raw) To: gdb-patches > -----Original Message----- > From: Willgerodt, Felix > Sent: Donnerstag, 6. Juni 2024 11:13 > To: Felix Willgerodt <felix.willgerodt@intel.com>; gdb-patches@sourceware.org > Subject: RE: [PATCH 3/3] gdb: rename offset to high bits in ymm registers > > > -----Original Message----- > > From: Felix Willgerodt <felix.willgerodt@intel.com> > > Sent: Donnerstag, 23. Mai 2024 15:49 > > To: gdb-patches@sourceware.org > > Subject: [PATCH 3/3] gdb: rename offset to high bits in ymm registers > > > > The xsave_ymm_avx512_offset data structure contains the xsave > > offset to the upper 128 bits of a ymm register. Similarly, for zmm this > > offset is described by xsave_avx512_zmm_h_offset, h indicating the > > high bits. This commit renames the xsave_ymm_avx512_offset to > > xsave_ymm_h_avx512_offset - as well as the associated define from > > XSAVE_YMM_AVX512_ADDR to XSAVE_YMM_H_AVX512_ADDR - to make this > > more consistent. > > > > Note, that the regnum defines already included the 'h' for ymm, like > > I387_YMM16H_REGNUM and I387_YMMH_AVX512_END_REGNUM. > > > > Co-authored-by: Nils-Christian Kempke <nils-christian.kempke@intel.com> > > --- > > gdb/i387-tdep.c | 19 ++++++++++--------- > > 1 file changed, 10 insertions(+), 9 deletions(-) > > Kindly pinging. This one is fairly straightforward. I already merged the other 2 > patches. > > Thanks, > Felix *Ping* v2 Thanks, Felix Intel Deutschland GmbH Registered Address: Am Campeon 10, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Sean Fennelly, Jeffrey Schneiderman, Tiffany Doon Silva Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928 ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 3/3] gdb: rename offset to high bits in ymm registers 2024-05-23 13:48 ` [PATCH 3/3] gdb: rename offset to high bits in ymm registers Felix Willgerodt 2024-06-06 9:12 ` Willgerodt, Felix 2024-06-14 13:55 ` [PING v2] " Willgerodt, Felix @ 2024-06-17 12:38 ` Andrew Burgess 2024-06-18 7:29 ` Willgerodt, Felix 2 siblings, 1 reply; 12+ messages in thread From: Andrew Burgess @ 2024-06-17 12:38 UTC (permalink / raw) To: Felix Willgerodt, gdb-patches Felix Willgerodt <felix.willgerodt@intel.com> writes: > The xsave_ymm_avx512_offset data structure contains the xsave > offset to the upper 128 bits of a ymm register. Similarly, for zmm this > offset is described by xsave_avx512_zmm_h_offset, h indicating the > high bits. This commit renames the xsave_ymm_avx512_offset to > xsave_ymm_h_avx512_offset - as well as the associated define from > XSAVE_YMM_AVX512_ADDR to XSAVE_YMM_H_AVX512_ADDR - to make this > more consistent. > > Note, that the regnum defines already included the 'h' for ymm, like > I387_YMM16H_REGNUM and I387_YMMH_AVX512_END_REGNUM. LGTM. Approved-By: Andrew Burgess <aburgess@redhat.com> Thanks, Andrew > > Co-authored-by: Nils-Christian Kempke <nils-christian.kempke@intel.com> > --- > gdb/i387-tdep.c | 19 ++++++++++--------- > 1 file changed, 10 insertions(+), 9 deletions(-) > > diff --git a/gdb/i387-tdep.c b/gdb/i387-tdep.c > index 45bd43a50a9..675ee8d2e81 100644 > --- a/gdb/i387-tdep.c > +++ b/gdb/i387-tdep.c > @@ -762,11 +762,11 @@ static int xsave_avxh_offset[] = > (xsave + (tdep)->xsave_layout.avx_offset \ > + xsave_avxh_offset[regnum - I387_YMM0H_REGNUM (tdep)]) > > -/* At xsave_ymm_avx512_offset[REGNUM] you'll find the relative offset > +/* At xsave_ymm_h_avx512_offset[REGNUM] you'll find the relative offset > within the ZMM region of the XSAVE extended state where the second > 128bits of GDB register YMM16 + REGNUM is stored. */ > > -static int xsave_ymm_avx512_offset[] = > +static int xsave_ymm_h_avx512_offset[] = > { > 16 + 0 * 64, /* %ymm16 through... */ > 16 + 1 * 64, > @@ -786,9 +786,9 @@ static int xsave_ymm_avx512_offset[] = > 16 + 15 * 64 /* ... %ymm31 (128 bits each). */ > }; > > -#define XSAVE_YMM_AVX512_ADDR(tdep, xsave, regnum) \ > +#define XSAVE_YMM_H_AVX512_ADDR(tdep, xsave, regnum) \ > (xsave + (tdep)->xsave_layout.zmm_offset \ > - + xsave_ymm_avx512_offset[regnum - I387_YMM16H_REGNUM (tdep)]) > + + xsave_ymm_h_avx512_offset[regnum - I387_YMM16H_REGNUM (tdep)]) > > /* At xsave_xmm_avx512_offset[REGNUM] you'll find the relative offset > within the ZMM region of the XSAVE extended state where the first > @@ -1187,7 +1187,7 @@ i387_supply_xsave (struct regcache *regcache, int regnum, > regcache->raw_supply (regnum, zero); > else > regcache->raw_supply (regnum, > - XSAVE_YMM_AVX512_ADDR (tdep, regs, regnum)); > + XSAVE_YMM_H_AVX512_ADDR (tdep, regs, regnum)); > return; > > case avx512_xmm_avx512: > @@ -1314,7 +1314,8 @@ i387_supply_xsave (struct regcache *regcache, int regnum, > for (i = I387_YMM16H_REGNUM (tdep); > i < I387_YMMH_AVX512_END_REGNUM (tdep); > i++) > - regcache->raw_supply (i, XSAVE_YMM_AVX512_ADDR (tdep, regs, i)); > + regcache->raw_supply (i, > + XSAVE_YMM_H_AVX512_ADDR (tdep, regs, i)); > for (i = I387_XMM16_REGNUM (tdep); > i < I387_XMM_AVX512_END_REGNUM (tdep); > i++) > @@ -1644,7 +1645,7 @@ i387_collect_xsave (const struct regcache *regcache, int regnum, > memset (XSAVE_AVX512_ZMM16_H_ADDR (tdep, regs, i), 0, 32); > for (i = I387_YMM16H_REGNUM (tdep); > i < I387_YMMH_AVX512_END_REGNUM (tdep); i++) > - memset (XSAVE_YMM_AVX512_ADDR (tdep, regs, i), 0, 16); > + memset (XSAVE_YMM_H_AVX512_ADDR (tdep, regs, i), 0, 16); > for (i = I387_XMM16_REGNUM (tdep); > i < I387_XMM_AVX512_END_REGNUM (tdep); i++) > memset (XSAVE_XMM_AVX512_ADDR (tdep, regs, i), 0, 16); > @@ -1750,7 +1751,7 @@ i387_collect_xsave (const struct regcache *regcache, int regnum, > i < I387_YMMH_AVX512_END_REGNUM (tdep); i++) > { > regcache->raw_collect (i, raw); > - p = XSAVE_YMM_AVX512_ADDR (tdep, regs, i); > + p = XSAVE_YMM_H_AVX512_ADDR (tdep, regs, i); > if (memcmp (raw, p, 16) != 0) > { > xstate_bv |= X86_XSTATE_ZMM; > @@ -1911,7 +1912,7 @@ i387_collect_xsave (const struct regcache *regcache, int regnum, > > case avx512_ymmh_avx512: > /* This is an upper YMM16-31 register. */ > - p = XSAVE_YMM_AVX512_ADDR (tdep, regs, regnum); > + p = XSAVE_YMM_H_AVX512_ADDR (tdep, regs, regnum); > if (memcmp (raw, p, 16) != 0) > { > xstate_bv |= X86_XSTATE_ZMM; > -- > 2.34.1 > > Intel Deutschland GmbH > Registered Address: Am Campeon 10, 85579 Neubiberg, Germany > Tel: +49 89 99 8853-0, www.intel.de > Managing Directors: Sean Fennelly, Jeffrey Schneiderman, Tiffany Doon Silva > Chairperson of the Supervisory Board: Nicole Lau > Registered Office: Munich > Commercial Register: Amtsgericht Muenchen HRB 186928 ^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH 3/3] gdb: rename offset to high bits in ymm registers 2024-06-17 12:38 ` Andrew Burgess @ 2024-06-18 7:29 ` Willgerodt, Felix 0 siblings, 0 replies; 12+ messages in thread From: Willgerodt, Felix @ 2024-06-18 7:29 UTC (permalink / raw) To: Andrew Burgess, gdb-patches > -----Original Message----- > From: Andrew Burgess <aburgess@redhat.com> > Sent: Montag, 17. Juni 2024 14:39 > To: Willgerodt, Felix <felix.willgerodt@intel.com>; gdb- > patches@sourceware.org > Subject: Re: [PATCH 3/3] gdb: rename offset to high bits in ymm registers > > Felix Willgerodt <felix.willgerodt@intel.com> writes: > > > The xsave_ymm_avx512_offset data structure contains the xsave > > offset to the upper 128 bits of a ymm register. Similarly, for zmm this > > offset is described by xsave_avx512_zmm_h_offset, h indicating the > > high bits. This commit renames the xsave_ymm_avx512_offset to > > xsave_ymm_h_avx512_offset - as well as the associated define from > > XSAVE_YMM_AVX512_ADDR to XSAVE_YMM_H_AVX512_ADDR - to make > this > > more consistent. > > > > Note, that the regnum defines already included the 'h' for ymm, like > > I387_YMM16H_REGNUM and I387_YMMH_AVX512_END_REGNUM. > > LGTM. > > Approved-By: Andrew Burgess <aburgess@redhat.com> > > Thanks, > Andrew Thanks, I pushed this. Felix Intel Deutschland GmbH Registered Address: Am Campeon 10, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Sean Fennelly, Jeffrey Schneiderman, Tiffany Doon Silva Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928 ^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2024-06-18 7:29 UTC | newest] Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2024-05-23 13:48 [PATCH 0/3] Minor amd64/avx512 improvments Felix Willgerodt 2024-05-23 13:48 ` [PATCH 1/3] gdb, doc: Fix AVX-512 documentation Felix Willgerodt 2024-05-23 13:58 ` Eli Zaretskii 2024-05-31 7:35 ` Willgerodt, Felix 2024-05-23 13:48 ` [PATCH 2/3] gdb, amd64: remove unused forward declerations Felix Willgerodt 2024-05-23 14:08 ` Tom Tromey 2024-05-31 7:35 ` Willgerodt, Felix 2024-05-23 13:48 ` [PATCH 3/3] gdb: rename offset to high bits in ymm registers Felix Willgerodt 2024-06-06 9:12 ` Willgerodt, Felix 2024-06-14 13:55 ` [PING v2] " Willgerodt, Felix 2024-06-17 12:38 ` Andrew Burgess 2024-06-18 7:29 ` Willgerodt, Felix
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