* [PATCH 01/23] Fix spelling mistakes in comments in C source files (bfd)
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
@ 2016-11-20 17:38 ` Ambrogino Modigliani
2016-11-20 17:39 ` [PATCH 08/23] Fix spelling mistakes in comments in Ada source files Ambrogino Modigliani
` (21 subsequent siblings)
22 siblings, 0 replies; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:38 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
bfd/ChangeLog:
* bfd/aoutx.h: Fix spelling in comments.
* bfd/bfd-in2.h: Fix spelling in comments.
* bfd/bfdio.c: Fix spelling in comments.
* bfd/cisco-core.c: Fix spelling in comments.
* bfd/coff-arm.c: Fix spelling in comments.
* bfd/coff-i860.c: Fix spelling in comments.
* bfd/coff-mcore.c: Fix spelling in comments.
* bfd/coff-ppc.c: Fix spelling in comments.
* bfd/coff-rs6000.c: Fix spelling in comments.
* bfd/coff-tic4x.c: Fix spelling in comments.
* bfd/coff-tic54x.c: Fix spelling in comments.
* bfd/coffcode.h: Fix spelling in comments.
* bfd/compress.c: Fix spelling in comments.
* bfd/cpu-sh.c: Fix spelling in comments.
* bfd/doc/chew.c: Fix spelling in comments.
* bfd/dwarf1.c: Fix spelling in comments.
* bfd/dwarf2.c: Fix spelling in comments.
* bfd/ecoff.c: Fix spelling in comments.
* bfd/elf-bfd.h: Fix spelling in comments.
* bfd/elf-eh-frame.c: Fix spelling in comments.
* bfd/elf-m10200.c: Fix spelling in comments.
* bfd/elf-m10300.c: Fix spelling in comments.
* bfd/elf.c: Fix spelling in comments.
* bfd/elf32-arc.c: Fix spelling in comments.
* bfd/elf32-arm.c: Fix spelling in comments.
* bfd/elf32-avr.c: Fix spelling in comments.
* bfd/elf32-bfin.c: Fix spelling in comments.
* bfd/elf32-hppa.c: Fix spelling in comments.
* bfd/elf32-i386.c: Fix spelling in comments.
* bfd/elf32-ip2k.c: Fix spelling in comments.
* bfd/elf32-m68k.c: Fix spelling in comments.
* bfd/elf32-nds32.c: Fix spelling in comments.
* bfd/elf32-rx.c: Fix spelling in comments.
* bfd/elf32-xtensa.c: Fix spelling in comments.
* bfd/elf64-ia64-vms.c: Fix spelling in comments.
* bfd/elf64-mips.c: Fix spelling in comments.
* bfd/elf64-ppc.c: Fix spelling in comments.
* bfd/elf64-x86-64.c: Fix spelling in comments.
* bfd/elfcode.h: Fix spelling in comments.
* bfd/elflink.c: Fix spelling in comments.
* bfd/elfn32-mips.c: Fix spelling in comments.
* bfd/elfnn-aarch64.c: Fix spelling in comments.
* bfd/elfnn-ia64.c: Fix spelling in comments.
* bfd/elfxx-mips.c: Fix spelling in comments.
* bfd/format.c: Fix spelling in comments.
* bfd/hp300hpux.c: Fix spelling in comments.
* bfd/ieee.c: Fix spelling in comments.
* bfd/libbfd.h: Fix spelling in comments.
* bfd/libhppa.h: Fix spelling in comments.
* bfd/mach-o.h: Fix spelling in comments.
* bfd/opncls.c: Fix spelling in comments.
* bfd/reloc.c: Fix spelling in comments.
* bfd/srec.c: Fix spelling in comments.
* bfd/sysdep.h: Fix spelling in comments.
* bfd/versados.c: Fix spelling in comments.
* bfd/vms-alpha.c: Fix spelling in comments.
* bfd/vms-lib.c: Fix spelling in comments.
* bfd/vms-misc.c: Fix spelling in comments.
* bfd/vms.h: Fix spelling in comments.
* bfd/xcofflink.c: Fix spelling in comments.
---
bfd/aoutx.h | 2 +-
bfd/bfd-in2.h | 6 +++---
bfd/bfdio.c | 2 +-
bfd/cisco-core.c | 2 +-
bfd/coff-arm.c | 4 ++--
bfd/coff-i860.c | 2 +-
bfd/coff-mcore.c | 2 +-
bfd/coff-ppc.c | 4 ++--
bfd/coff-rs6000.c | 2 +-
bfd/coff-tic4x.c | 2 +-
bfd/coff-tic54x.c | 6 +++---
bfd/coffcode.h | 4 ++--
bfd/compress.c | 2 +-
bfd/cpu-sh.c | 2 +-
bfd/doc/chew.c | 2 +-
bfd/dwarf1.c | 2 +-
bfd/dwarf2.c | 4 ++--
bfd/ecoff.c | 2 +-
bfd/elf-bfd.h | 2 +-
bfd/elf-eh-frame.c | 4 ++--
bfd/elf-m10200.c | 2 +-
bfd/elf-m10300.c | 6 +++---
bfd/elf.c | 8 ++++----
bfd/elf32-arc.c | 4 ++--
bfd/elf32-arm.c | 16 ++++++++--------
bfd/elf32-avr.c | 12 ++++++------
bfd/elf32-bfin.c | 8 ++++----
bfd/elf32-hppa.c | 4 ++--
bfd/elf32-i386.c | 4 ++--
bfd/elf32-ip2k.c | 2 +-
bfd/elf32-m68k.c | 4 ++--
bfd/elf32-nds32.c | 20 ++++++++++----------
bfd/elf32-rx.c | 2 +-
bfd/elf32-xtensa.c | 6 +++---
bfd/elf64-ia64-vms.c | 2 +-
bfd/elf64-mips.c | 4 ++--
bfd/elf64-ppc.c | 2 +-
bfd/elf64-x86-64.c | 2 +-
bfd/elfcode.h | 2 +-
bfd/elflink.c | 2 +-
bfd/elfn32-mips.c | 4 ++--
bfd/elfnn-aarch64.c | 10 +++++-----
bfd/elfnn-ia64.c | 2 +-
bfd/elfxx-mips.c | 6 +++---
bfd/format.c | 2 +-
bfd/hp300hpux.c | 14 +++++++-------
bfd/ieee.c | 2 +-
bfd/libbfd.h | 2 +-
bfd/libhppa.h | 2 +-
bfd/mach-o.h | 2 +-
bfd/opncls.c | 4 ++--
bfd/reloc.c | 10 +++++-----
bfd/srec.c | 2 +-
bfd/sysdep.h | 2 +-
bfd/versados.c | 2 +-
bfd/vms-alpha.c | 8 ++++----
bfd/vms-lib.c | 2 +-
bfd/vms-misc.c | 2 +-
bfd/vms.h | 2 +-
bfd/xcofflink.c | 6 +++---
60 files changed, 128 insertions(+), 128 deletions(-)
diff --git a/bfd/aoutx.h b/bfd/aoutx.h
index 089fe57..d6aedd5 100644
--- a/bfd/aoutx.h
+++ b/bfd/aoutx.h
@@ -3297,7 +3297,7 @@ aout_link_check_ar_symbols (bfd *abfd,
and this object file from the archive includes:
int a = 5;
In such a case, whether to include this object is target
- dependant for backward compatibility.
+ dependent for backward compatibility.
FIXME: The SunOS 4.1.3 linker will pull in the archive
element if the symbol is defined in the .data section,
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index fdb7878..bd1c2ab 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -5675,10 +5675,10 @@ BFD_RELOC_MACH_O_PAIR. */
/* Pair of relocation. Contains the first symbol. */
BFD_RELOC_MACH_O_PAIR,
-/* Symbol will be substracted. Must be followed by a BFD_RELOC_32. */
+/* Symbol will be subtracted. Must be followed by a BFD_RELOC_32. */
BFD_RELOC_MACH_O_SUBTRACTOR32,
-/* Symbol will be substracted. Must be followed by a BFD_RELOC_64. */
+/* Symbol will be subtracted. Must be followed by a BFD_RELOC_64. */
BFD_RELOC_MACH_O_SUBTRACTOR64,
/* PCREL relocations. They are marked as branch to create PLT entry if
@@ -5847,7 +5847,7 @@ of an unsigned address/value. */
of an address/value. No overflow checking. */
BFD_RELOC_AARCH64_MOVW_G2_NC,
-/* AArch64 MOV[NZK] instruction with most signficant bits 48 to 64
+/* AArch64 MOV[NZK] instruction with most significant bits 48 to 64
of a signed or unsigned address/value. */
BFD_RELOC_AARCH64_MOVW_G3,
diff --git a/bfd/bfdio.c b/bfd/bfdio.c
index 71991bd..8e6aaba 100644
--- a/bfd/bfdio.c
+++ b/bfd/bfdio.c
@@ -141,7 +141,7 @@ DESCRIPTION
. prefix is prepended to each method name. *}
. {* Attempt to read/write NBYTES on ABFD's IOSTREAM storing/fetching
. bytes starting at PTR. Return the number of bytes actually
-. transfered (a read past end-of-file returns less than NBYTES),
+. transferred (a read past end-of-file returns less than NBYTES),
. or -1 (setting <<bfd_error>>) if an error occurs. *}
. file_ptr (*bread) (struct bfd *abfd, void *ptr, file_ptr nbytes);
. file_ptr (*bwrite) (struct bfd *abfd, const void *ptr,
diff --git a/bfd/cisco-core.c b/bfd/cisco-core.c
index 1fcf024..0537efb 100644
--- a/bfd/cisco-core.c
+++ b/bfd/cisco-core.c
@@ -170,7 +170,7 @@ cisco_core_file_validate (bfd *abfd, int crash_info_loc)
abfd->tdata.cisco_core_data->sig = 0;
break;
case CRASH_REASON_EXCEPTION:
- /* Crash occured due to CPU exception. */
+ /* Crash occurred due to CPU exception. */
/* This is 68k-specific; for MIPS we'll need to interpret
cpu_vector differently based on the target configuration
diff --git a/bfd/coff-arm.c b/bfd/coff-arm.c
index c7a2861..5b6357b 100644
--- a/bfd/coff-arm.c
+++ b/bfd/coff-arm.c
@@ -1144,7 +1144,7 @@ static const insn32 t2a6_bx_insn = 0xe12fff1e;
/* The standard COFF backend linker does not cope with the special
Thumb BRANCH23 relocation. The alternative would be to split the
- BRANCH23 into seperate HI23 and LO23 relocations. However, it is a
+ BRANCH23 into separate HI23 and LO23 relocations. However, it is a
bit simpler simply providing our own relocation driver. */
/* The reloc processing routine for the ARM/Thumb COFF linker. NOTE:
@@ -2179,7 +2179,7 @@ coff_arm_merge_private_bfd_data (bfd * ibfd, struct bfd_link_info *info)
return TRUE;
/* If the two formats are different we cannot merge anything.
- This is not an error, since it is permissable to change the
+ This is not an error, since it is permissible to change the
input and output formats. */
if ( ibfd->xvec->flavour != bfd_target_coff_flavour
|| obfd->xvec->flavour != bfd_target_coff_flavour)
diff --git a/bfd/coff-i860.c b/bfd/coff-i860.c
index 86d554d..02e5b8c 100644
--- a/bfd/coff-i860.c
+++ b/bfd/coff-i860.c
@@ -625,7 +625,7 @@ i860_reloc_processing (arelent *cache_ptr, struct internal_reloc *dst,
/* The symbols definitions that we have read in have been
relocated as if their sections started at 0. But the offsets
- refering to the symbols in the raw data have not been
+ referring to the symbols in the raw data have not been
modified, so we have to have a negative addend to compensate.
Note that symbols which used to be common must be left alone. */
diff --git a/bfd/coff-mcore.c b/bfd/coff-mcore.c
index 9be92cc..76a1682 100644
--- a/bfd/coff-mcore.c
+++ b/bfd/coff-mcore.c
@@ -65,7 +65,7 @@ static reloc_howto_type mcore_coff_howto_table[] =
0, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
- complain_overflow_dont, /* dont complain_on_overflow */
+ complain_overflow_dont, /* don't complain_on_overflow */
NULL, /* special_function */
"ABSOLUTE", /* name */
FALSE, /* partial_inplace */
diff --git a/bfd/coff-ppc.c b/bfd/coff-ppc.c
index 6755e54..43deceb 100644
--- a/bfd/coff-ppc.c
+++ b/bfd/coff-ppc.c
@@ -354,7 +354,7 @@ static reloc_howto_type ppc_coff_howto_table[] =
0, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
- complain_overflow_dont, /* dont complain_on_overflow */
+ complain_overflow_dont, /* don't complain_on_overflow */
0, /* special_function */
"ABSOLUTE", /* name */
FALSE, /* partial_inplace */
@@ -397,7 +397,7 @@ static reloc_howto_type ppc_coff_howto_table[] =
/* IMAGE_REL_PPC_ADDR24 0x0003 26-bit address, shifted left 2 (branch absolute) */
/* the LI field is in bit 6 through bit 29 is 24 bits, + 2 for the shift */
/* Of course, That's the IBM approved bit numbering, which is not what */
- /* anyone else uses.... The li field is in bit 2 thru 25 */
+ /* anyone else uses.... The li field is in bit 2 through 25 */
/* Used: */
HOWTO (IMAGE_REL_PPC_ADDR24, /* type */
0, /* rightshift */
diff --git a/bfd/coff-rs6000.c b/bfd/coff-rs6000.c
index 00d353b..2da8a21 100644
--- a/bfd/coff-rs6000.c
+++ b/bfd/coff-rs6000.c
@@ -2541,7 +2541,7 @@ _bfd_xcoff_sizeof_headers (bfd *abfd,
/* Allocate the per section counters. It could be possible to use a
preallocated array as the number of sections is limited on XCOFF,
- but this creates a maintainance issue. */
+ but this creates a maintenance issue. */
n_rl = bfd_zmalloc ((max_index + 1) * sizeof (*n_rl));
if (n_rl == NULL)
return -1;
diff --git a/bfd/coff-tic4x.c b/bfd/coff-tic4x.c
index 2a7dc86..3e195e0 100644
--- a/bfd/coff-tic4x.c
+++ b/bfd/coff-tic4x.c
@@ -243,7 +243,7 @@ tic4x_reloc_processing (arelent *relent,
}
/* The symbols definitions that we have read in have been relocated
- as if their sections started at 0. But the offsets refering to
+ as if their sections started at 0. But the offsets referring to
the symbols in the raw data have not been modified, so we have to
have a negative addend to compensate.
diff --git a/bfd/coff-tic54x.c b/bfd/coff-tic54x.c
index f059694..fa2a68a 100644
--- a/bfd/coff-tic54x.c
+++ b/bfd/coff-tic54x.c
@@ -109,7 +109,7 @@ bfd_ticoff_get_section_load_page (asection *sect)
return page;
}
-/* Set the architecture appropriately. Allow unkown architectures
+/* Set the architecture appropriately. Allow unknown architectures
(e.g. binary). */
static bfd_boolean
@@ -149,7 +149,7 @@ tic54x_relocation (bfd *abfd ATTRIBUTE_UNUSED,
reloc_howto_type tic54x_howto_table[] =
{
/* type,rightshift,size (0=byte, 1=short, 2=long),
- bit size, pc_relative, bitpos, dont complain_on_overflow,
+ bit size, pc_relative, bitpos, don't complain_on_overflow,
special_function, name, partial_inplace, src_mask, dst_mask, pcrel_offset. */
/* NORMAL BANK */
@@ -382,7 +382,7 @@ tic54x_reloc_processing (arelent *relent,
/* The symbols definitions that we have read in have been
relocated as if their sections started at 0. But the offsets
- refering to the symbols in the raw data have not been
+ referring to the symbols in the raw data have not been
modified, so we have to have a negative addend to compensate.
Note that symbols which used to be common must be left alone. */
diff --git a/bfd/coffcode.h b/bfd/coffcode.h
index f5605d7..30cbeb3 100644
--- a/bfd/coffcode.h
+++ b/bfd/coffcode.h
@@ -1660,7 +1660,7 @@ coff_bad_format_hook (bfd * abfd ATTRIBUTE_UNUSED, void * filehdr)
and Intel 960 readwrite headers (I960WRMAGIC) is that the
optional header is of a different size.
- But the mips keeps extra stuff in it's opthdr, so dont check
+ But the mips keeps extra stuff in it's opthdr, so don't check
when doing that. */
#if defined(M88) || defined(I960)
@@ -5331,7 +5331,7 @@ coff_slurp_reloc_table (bfd * abfd, sec_ptr asect, asymbol ** symbols)
/* The symbols definitions that we have read in have been
relocated as if their sections started at 0. But the offsets
- refering to the symbols in the raw data have not been
+ referring to the symbols in the raw data have not been
modified, so we have to have a negative addend to compensate.
Note that symbols which used to be common must be left alone. */
diff --git a/bfd/compress.c b/bfd/compress.c
index 95e8c23..2fc032a 100644
--- a/bfd/compress.c
+++ b/bfd/compress.c
@@ -106,7 +106,7 @@ bfd_compress_section_contents (bfd *abfd, sec_ptr sec,
if (orig_compression_header_size == 0)
{
/* Convert it from .zdebug* section. Get the uncompressed
- size first. We need to substract the 12-byte overhead in
+ size first. We need to subtract the 12-byte overhead in
.zdebug* section. Set orig_compression_header_size to
the 12-bye overhead. */
orig_compression_header_size = 12;
diff --git a/bfd/cpu-sh.c b/bfd/cpu-sh.c
index f920826..cca1e4b 100644
--- a/bfd/cpu-sh.c
+++ b/bfd/cpu-sh.c
@@ -445,7 +445,7 @@ sh_get_arch_up_from_bfd_mach (unsigned long mach)
}
-/* Convert an arbitary arch_set - not necessarily corresponding
+/* Convert an arbitrary arch_set - not necessarily corresponding
directly to anything in the table above - to the most generic
architecture which supports all the required features, and
return the corresponding BFD mach. */
diff --git a/bfd/doc/chew.c b/bfd/doc/chew.c
index bf3d249..8f94cd6 100644
--- a/bfd/doc/chew.c
+++ b/bfd/doc/chew.c
@@ -946,7 +946,7 @@ kill_bogus_lines ()
idx--;
idx++;
- /* Copy buffer upto last char, but blank lines before and after
+ /* Copy buffer up to last char, but blank lines before and after
dots don't count. */
sl = 1;
diff --git a/bfd/dwarf1.c b/bfd/dwarf1.c
index fbd0345..b168d84 100644
--- a/bfd/dwarf1.c
+++ b/bfd/dwarf1.c
@@ -500,7 +500,7 @@ _bfd_dwarf1_find_nearest_line (bfd *abfd,
}
/* A null debug_section indicates that there was no dwarf1 info
- or that an error occured while setting up the stash. */
+ or that an error occurred while setting up the stash. */
if (! stash->debug_section)
return FALSE;
diff --git a/bfd/dwarf2.c b/bfd/dwarf2.c
index 287ba0f..a4375f7 100644
--- a/bfd/dwarf2.c
+++ b/bfd/dwarf2.c
@@ -335,7 +335,7 @@ const struct dwarf_debug_section dwarf_debug_sections[] =
{ NULL, NULL },
};
-/* NB/ Numbers in this enum must match up with indicies
+/* NB/ Numbers in this enum must match up with indices
into the dwarf_debug_sections[] array above. */
enum dwarf_debug_section_enum
{
@@ -4134,7 +4134,7 @@ _bfd_dwarf2_find_nearest_line (bfd *abfd,
addr += section->vma;
/* A null info_ptr indicates that there is no dwarf2 info
- (or that an error occured while setting up the stash). */
+ (or that an error occurred while setting up the stash). */
if (! stash->info_ptr)
return FALSE;
diff --git a/bfd/ecoff.c b/bfd/ecoff.c
index 5c942bd..5157b90 100644
--- a/bfd/ecoff.c
+++ b/bfd/ecoff.c
@@ -161,7 +161,7 @@ _bfd_ecoff_new_section_hook (bfd *abfd, asection *section)
{ _PDATA, SEC_ALLOC | SEC_DATA | SEC_LOAD | SEC_READONLY},
{ _BSS, SEC_ALLOC},
{ _SBSS, SEC_ALLOC},
- /* An Irix 4 shared libary. */
+ /* An Irix 4 shared library. */
{ _LIB, SEC_COFF_SHARED_LIBRARY}
};
diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h
index 50151cb..358919e 100644
--- a/bfd/elf-bfd.h
+++ b/bfd/elf-bfd.h
@@ -2452,7 +2452,7 @@ extern char *elfcore_write_register_note
This is an "internal" structure in the sense that it should be used
to pass information to BFD (via the `elfcore_write_linux_prpsinfo'
- function), so things like endianess shouldn't be an issue. This
+ function), so things like endianness shouldn't be an issue. This
structure will eventually be converted in one of the
`elf_external_linux_*' structures and written out to an output bfd
by one of the functions declared below. */
diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c
index 44d4e1e..5fcb4f5 100644
--- a/bfd/elf-eh-frame.c
+++ b/bfd/elf-eh-frame.c
@@ -1790,7 +1790,7 @@ _bfd_elf_write_section_eh_frame (bfd *abfd,
end = buf + ent->size;
new_size = size_of_output_cie_fde (ent, ptr_size);
- /* Update the size. It may be shrinked. */
+ /* Update the size. It may be shrunk. */
bfd_put_32 (abfd, new_size - 4, buf);
/* Filling the extra bytes with DW_CFA_nops. */
@@ -1950,7 +1950,7 @@ _bfd_elf_write_section_eh_frame (bfd *abfd,
(*info->callbacks->einfo)
(_("%P: DW_EH_PE_datarel unspecified"
" for this architecture.\n"));
- /* Fall thru */
+ /* Fall through */
case bfd_arch_frv:
case bfd_arch_i386:
BFD_ASSERT (htab->hgot != NULL
diff --git a/bfd/elf-m10200.c b/bfd/elf-m10200.c
index c2e8b98..2f9d6a4 100644
--- a/bfd/elf-m10200.c
+++ b/bfd/elf-m10200.c
@@ -823,7 +823,7 @@ mn10200_elf_relax_section (bfd *abfd,
be necessary, but why take the chance.
Note these checks assume that R_MN10200_PCREL8 relocs
- only occur on bCC and bCCx insns. If they occured
+ only occur on bCC and bCCx insns. If they occurred
elsewhere, we'd need to know the start of this insn
for this check to be accurate. */
code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
diff --git a/bfd/elf-m10300.c b/bfd/elf-m10300.c
index 688a270..4496c52 100644
--- a/bfd/elf-m10300.c
+++ b/bfd/elf-m10300.c
@@ -2433,7 +2433,7 @@ mn10300_elf_relax_delete_bytes (bfd *abfd,
{
/* If there is an align reloc at the end of the section ignore it.
GAS creates these relocs for reasons of its own, and they just
- serve to keep the section artifically inflated. */
+ serve to keep the section artificially inflated. */
if (ELF32_R_TYPE ((irelend - 1)->r_info) == (int) R_MN10300_ALIGN)
--irelend;
@@ -3763,7 +3763,7 @@ mn10300_elf_relax_section (bfd *abfd,
be necessary, but why take the chance.
Note these checks assume that R_MN10300_PCREL8 relocs
- only occur on bCC and bCCx insns. If they occured
+ only occur on bCC and bCCx insns. If they occurred
elsewhere, we'd need to know the start of this insn
for this check to be accurate. */
code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
@@ -5523,7 +5523,7 @@ _bfd_mn10300_elf_finish_dynamic_sections (bfd * output_bfd,
as it means that the size of the PLT0 section (15 bytes) is not
a multiple of the sh_entsize. Some ELF tools flag this as an
error. We could pad PLT0 to 16 bytes, but that would introduce
- compatibilty issues with previous toolchains, so instead we
+ compatibility issues with previous toolchains, so instead we
just set the entry size to 1. */
elf_section_data (splt->output_section)->this_hdr.sh_entsize = 1;
}
diff --git a/bfd/elf.c b/bfd/elf.c
index e7252c6..7540018 100644
--- a/bfd/elf.c
+++ b/bfd/elf.c
@@ -1312,7 +1312,7 @@ copy_special_section_fields (const bfd *ibfd,
Note: Strictly speaking these assignments are wrong.
The sh_link and sh_info fields should point to the
- relevent sections in the output BFD, which may not be in
+ relevant sections in the output BFD, which may not be in
the same location as they were in the input BFD. But
the whole point of this action is to preserve the
original values of the sh_link and sh_info fields, so
@@ -1940,7 +1940,7 @@ bfd_section_from_shdr (bfd *abfd, unsigned int shindex)
if (++ nesting > 3)
{
/* PR17512: A corrupt ELF binary might contain a recursive group of
- sections, with each the string indicies pointing to the next in the
+ sections, with each the string indices pointing to the next in the
loop. Detect this here, by refusing to load a section that we are
already in the process of loading. We only trigger this test if
we have nested at least three sections deep as normal ELF binaries
@@ -4976,7 +4976,7 @@ elf_sort_sections (const void *arg1, const void *arg2)
{
if (TOEND (sec2))
{
- /* If the indicies are the same, do not return 0
+ /* If the indices are the same, do not return 0
here, but continue to try the next comparison. */
if (sec1->target_index - sec2->target_index != 0)
return sec1->target_index - sec2->target_index;
@@ -7153,7 +7153,7 @@ copy_private_bfd_data (bfd *ibfd, bfd *obfd)
{
/* PR binutils/3535. The Solaris linker always sets the p_paddr
and p_memsz fields of special segments (DYNAMIC, INTERP) to 0
- which severly confuses things, so always regenerate the segment
+ which severely confuses things, so always regenerate the segment
map in this case. */
if (segment->p_paddr == 0
&& segment->p_memsz == 0
diff --git a/bfd/elf32-arc.c b/bfd/elf32-arc.c
index 314a162..9890e3a 100644
--- a/bfd/elf32-arc.c
+++ b/bfd/elf32-arc.c
@@ -551,7 +551,7 @@ arc_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
flagword in_flags;
asection *sec;
- /* Check if we have the same endianess. */
+ /* Check if we have the same endianness. */
if (! _bfd_generic_verify_endian_match (ibfd, info))
return FALSE;
@@ -617,7 +617,7 @@ arc_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
bfd_get_filename (ibfd), (long)in_flags, (long)out_flags);
if (in_flags && out_flags)
return FALSE;
- /* MWDT doesnt set the eflags hence make sure we choose the
+ /* MWDT doesn't set the eflags hence make sure we choose the
eflags set by gcc. */
in_flags = in_flags > out_flags ? in_flags : out_flags;
}
diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c
index dced01a..c327df1 100644
--- a/bfd/elf32-arm.c
+++ b/bfd/elf32-arm.c
@@ -4673,7 +4673,7 @@ arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
/* If veneers of type STUB_TYPE should go in a dedicated output section,
returns the address of the hash table field in HTAB holding the offset at
- which new veneers should be layed out in the stub section. */
+ which new veneers should be laid out in the stub section. */
static bfd_vma*
arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
@@ -5867,7 +5867,7 @@ arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
The function returns whether an error occurred. If no error occurred,
*CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
and this function and HTAB->new_cmse_stub_offset is set to the biggest
- veneer observed set for new veneers to be layed out after. */
+ veneer observed set for new veneers to be laid out after. */
static bfd_boolean
set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
@@ -9066,7 +9066,7 @@ elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
return TRUE;
}
-/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
+/* Populate ARMv4 BX veneers. Returns the absolute address of the veneer. */
static bfd_vma
elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
@@ -10786,7 +10786,7 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto,
else
signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
- /* Calculate the permissable maximum and minimum values for
+ /* Calculate the permissible maximum and minimum values for
this relocation according to whether we're relocating for
Thumb-2 or not. */
bitsize = howto->bitsize;
@@ -13468,7 +13468,7 @@ elf32_arm_attributes_accept_div (const obj_attribute *attr)
switch (attr[Tag_DIV_use].i)
{
case 0:
- /* Integer divide allowed if instruction contained in archetecture. */
+ /* Integer divide allowed if instruction contained in architecture. */
if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
return TRUE;
else if (arch >= TAG_CPU_ARCH_V7E_M)
@@ -13959,7 +13959,7 @@ elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
}
break;
case Tag_ABI_VFP_args:
- /* Aready done. */
+ /* Already done. */
break;
case Tag_ABI_WMMX_args:
if (in_attr[i].i != out_attr[i].i)
@@ -19675,13 +19675,13 @@ elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
/* Check to see if the input BFD actually contains any sections. If
not, its flags may not have been initialised either, but it
- cannot actually cause any incompatiblity. Do not short-circuit
+ cannot actually cause any incompatibility. Do not short-circuit
dynamic objects; their section list may be emptied by
elf_link_add_object_symbols.
Also check to see if there are no code sections in the input.
In this case there is no need to check for code specific flags.
- XXX - do we need to worry about floating-point format compatability
+ XXX - do we need to worry about floating-point format compatibility
in data sections ? */
if (!(ibfd->flags & DYNAMIC))
{
diff --git a/bfd/elf32-avr.c b/bfd/elf32-avr.c
index 46a2b27..20da04c 100644
--- a/bfd/elf32-avr.c
+++ b/bfd/elf32-avr.c
@@ -1717,7 +1717,7 @@ elf32_avr_is_diff_reloc (Elf_Internal_Rela *irel)
|| ELF32_R_TYPE (irel->r_info) == R_AVR_DIFF32);
}
-/* Reduce the diff value written in the section by count if the shrinked
+/* Reduce the diff value written in the section by count if the shrunk
insn address happens to fall between the two symbols for which this
diff reloc was emitted. */
@@ -1769,7 +1769,7 @@ elf32_avr_adjust_diff_reloc_value (bfd *abfd,
/* For a diff reloc sym1 - sym2 the diff at assembly time (x) is written
into the object file at the reloc offset. sym2's logical value is
symval (<start_of_section>) + reloc addend. Compute the start and end
- addresses and check if the shrinked insn falls between sym1 and sym2. */
+ addresses and check if the shrunk insn falls between sym1 and sym2. */
bfd_vma sym2_address = symval + irel->r_addend;
bfd_vma sym1_address = sym2_address - x;
@@ -1856,7 +1856,7 @@ elf32_avr_adjust_reloc_if_spans_insn (bfd *abfd,
/* Delete some bytes from a section while changing the size of an instruction.
The parameter "addr" denotes the section-relative offset pointing just
- behind the shrinked instruction. "addr+count" point at the first
+ behind the shrunk instruction. "addr+count" point at the first
byte just behind the original unshrinked instruction. If delete_shrinks_insn
is FALSE, we are deleting redundant padding bytes from relax_info prop
record handling. In that case, addr is section-relative offset of start
@@ -1998,8 +1998,8 @@ elf32_avr_relax_delete_bytes (bfd *abfd,
/* The reloc's own addresses are now ok. However, we need to readjust
the reloc's addend, i.e. the reloc's value if two conditions are met:
1.) the reloc is relative to a symbol in this section that
- is located in front of the shrinked instruction
- 2.) symbol plus addend end up behind the shrinked instruction.
+ is located in front of the shrunk instruction
+ 2.) symbol plus addend end up behind the shrunk instruction.
The most common case where this happens are relocs relative to
the section-start symbol.
@@ -3849,7 +3849,7 @@ elf32_avr_build_stubs (struct bfd_link_info *info)
stub_sec->size = 0;
}
- /* Allocate memory for the adress mapping table. */
+ /* Allocate memory for the address mapping table. */
htab->amt_entry_cnt = 0;
htab->amt_max_entry_cnt = total_size / 4;
htab->amt_stub_offsets = bfd_malloc (sizeof (bfd_vma)
diff --git a/bfd/elf32-bfin.c b/bfd/elf32-bfin.c
index fdf0299..b193359 100644
--- a/bfd/elf32-bfin.c
+++ b/bfd/elf32-bfin.c
@@ -122,9 +122,9 @@ bfin_pcrel24_reloc (bfd *abfd,
short x;
/* We are getting reloc_entry->address 2 byte off from
- the start of instruction. Assuming absolute postion
+ the start of instruction. Assuming absolute position
of the reloc data. But, following code had been written assuming
- reloc address is starting at begining of instruction.
+ reloc address is starting at beginning of instruction.
To compensate that I have increased the value of
relocation by 1 (effectively 2) and used the addr -2 instead of addr. */
@@ -1340,9 +1340,9 @@ bfin_final_link_relocate (Elf_Internal_Rela *rel, reloc_howto_type *howto,
value -= address;
/* We are getting reloc_entry->address 2 byte off from
- the start of instruction. Assuming absolute postion
+ the start of instruction. Assuming absolute position
of the reloc data. But, following code had been written assuming
- reloc address is starting at begining of instruction.
+ reloc address is starting at beginning of instruction.
To compensate that I have increased the value of
relocation by 1 (effectively 2) and used the addr -2 instead of addr. */
diff --git a/bfd/elf32-hppa.c b/bfd/elf32-hppa.c
index 55aec83..8a1a32d 100644
--- a/bfd/elf32-hppa.c
+++ b/bfd/elf32-hppa.c
@@ -3411,7 +3411,7 @@ final_link_relocate (asection *input_section,
else
return bfd_reloc_undefined;
}
- /* Fall thru. */
+ /* Fall through. */
case R_PARISC_PCREL21L:
case R_PARISC_PCREL17C:
@@ -3481,7 +3481,7 @@ final_link_relocate (asection *input_section,
break;
}
- /* Fall thru. */
+ /* Fall through. */
case R_PARISC_DLTIND21L:
case R_PARISC_DLTIND14R:
diff --git a/bfd/elf32-i386.c b/bfd/elf32-i386.c
index 311ca37..3f54a4a 100644
--- a/bfd/elf32-i386.c
+++ b/bfd/elf32-i386.c
@@ -75,7 +75,7 @@ static reloc_howto_type elf_howto_table[]=
/* We have a gap in the reloc numbers here.
R_386_standard counts the number up to this point, and
R_386_ext_offset is the value to subtract from a reloc type of
- R_386_16 thru R_386_PC8 to form an index into this table. */
+ R_386_16 through R_386_PC8 to form an index into this table. */
#define R_386_standard (R_386_GOTPC + 1)
#define R_386_ext_offset (R_386_TLS_TPOFF - R_386_standard)
@@ -5558,7 +5558,7 @@ elf_i386_finish_dynamic_symbol (bfd *output_bfd,
abort ();
/* For non-shared object, we can't use .got.plt, which
- contains the real function addres if we need pointer
+ contains the real function address if we need pointer
equality. We load the GOT entry with the PLT entry. */
plt = htab->elf.splt ? htab->elf.splt : htab->elf.iplt;
bfd_put_32 (output_bfd,
diff --git a/bfd/elf32-ip2k.c b/bfd/elf32-ip2k.c
index 41e5081..d99568a 100644
--- a/bfd/elf32-ip2k.c
+++ b/bfd/elf32-ip2k.c
@@ -995,7 +995,7 @@ ip2k_elf_relax_section_page (bfd *abfd,
int switch_table_128;
int switch_table_256;
- /* Walk thru the section looking for relaxation opportunities. */
+ /* Walk through the section looking for relaxation opportunities. */
for (irel = misc->irelbase; irel < irelend; irel++)
{
if (ELF32_R_TYPE (irel->r_info) != (int) R_IP2K_PAGE3)
diff --git a/bfd/elf32-m68k.c b/bfd/elf32-m68k.c
index 7c2e0fc..8a9ec47 100644
--- a/bfd/elf32-m68k.c
+++ b/bfd/elf32-m68k.c
@@ -703,7 +703,7 @@ struct elf_m68k_got_entry
struct
{
/* Offset from the start of .got section. To calculate offset relative
- to GOT pointer one should substract got->offset from this value. */
+ to GOT pointer one should subtract got->offset from this value. */
bfd_vma offset;
/* Pointer to the next GOT entry for this global symbol.
@@ -1294,7 +1294,7 @@ elf32_m68k_print_private_bfd_data (bfd *abfd, void * ptr)
an empty GOT and traverse bfd2got hashtable putting got_entries from
local GOTs to the new 'big' one. We do that by constructing an
intermediate GOT holding all the entries the local GOT has and the big
- GOT lacks. Then we check if there is room in the big GOT to accomodate
+ GOT lacks. Then we check if there is room in the big GOT to accommodate
all the entries from diff. On success we add those entries to the big
GOT; on failure we start the new 'big' GOT and retry the adding of
entries from the local GOT. Note that this retry will always succeed as
diff --git a/bfd/elf32-nds32.c b/bfd/elf32-nds32.c
index ab19801..7ed2041 100644
--- a/bfd/elf32-nds32.c
+++ b/bfd/elf32-nds32.c
@@ -8297,8 +8297,8 @@ nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
If not found, return irelend.
Assuming relocations are sorted by r_offset,
- we find the relocation from `reloc' backward untill relocs,
- or find it from `reloc' forward untill irelend. */
+ we find the relocation from `reloc' backward until relocs,
+ or find it from `reloc' forward until irelend. */
static Elf_Internal_Rela *
find_relocs_at_address (Elf_Internal_Rela *reloc,
@@ -8330,8 +8330,8 @@ find_relocs_at_address (Elf_Internal_Rela *reloc,
If not found, return irelend.
Assuming relocations are sorted by r_offset,
- we find the relocation from `reloc' backward untill relocs,
- or find it from `reloc' forward untill irelend. */
+ we find the relocation from `reloc' backward until relocs,
+ or find it from `reloc' forward until irelend. */
static Elf_Internal_Rela *
find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
@@ -12016,7 +12016,7 @@ nds32_elf_relax_section (bfd *abfd, asection *sec,
break;
}
- /* The begining of general relaxation. */
+ /* The beginning of general relaxation. */
if (is_SDA_BASE_set == 0)
{
@@ -12579,7 +12579,7 @@ nds32_fag_free_list (struct nds32_fag *head)
so we can track the symbol instead of a fixed address.
When relaxation, the address of an datum may change,
- because a text section is shrinked, so the data section
+ because a text section is shrunk, so the data section
moves forward. If the aligments of text and data section
are different, their distance may change too.
Therefore, tracking a fixed address is not appriate. */
@@ -12597,7 +12597,7 @@ nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
In each iteration, we could simply subtract previous fag
and accumulate following fags which are inside the window,
- untill we each the end. */
+ until we each the end. */
if (head->next == NULL)
{
@@ -12972,7 +12972,7 @@ error_return:
/* This is a version of bfd_generic_get_relocated_section_contents.
We need this variety because relaxation will modify the dwarf
- infomation. When there is undefined symbol reference error mesage,
+ information. When there is undefined symbol reference error mesage,
linker need to dump line number where the symbol be used. However
the address is be relaxed, it can not get the original dwarf contents.
The variety only modify function call for reading in the section. */
@@ -14453,7 +14453,7 @@ nds32_elf_ex9_relocation_check (struct bfd_link_info *info,
/* We have to confirm there is no data relocation in the
same address. In general case, this won't happen. */
/* We have to do ex9 conservative, for those relocation not
- considerd we ignore instruction. */
+ considered we ignore instruction. */
result |= DATA_EXIST;
if (*(contents + *off) & 0x80)
result |= (2 << 24);
@@ -14805,7 +14805,7 @@ nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asecti
if (save_irel)
{
- /* For instuction with relocation do relax. */
+ /* For instruction with relocation do relax. */
irel_ptr = (struct elf_nds32_irel_entry *)
bfd_malloc (sizeof (struct elf_nds32_irel_entry));
irel_ptr->irel = irel;
diff --git a/bfd/elf32-rx.c b/bfd/elf32-rx.c
index f5377c0..d127d45 100644
--- a/bfd/elf32-rx.c
+++ b/bfd/elf32-rx.c
@@ -2665,7 +2665,7 @@ elf32_rx_relax_section (bfd * abfd,
/* Branches over alignment chunks are problematic, as
deleting bytes here makes the branch *further* away. We
- can be agressive with branches within this alignment
+ can be aggressive with branches within this alignment
block, but not branches outside it. */
if ((prev_alignment == NULL
|| symval < (bfd_vma)(sec_start + prev_alignment->r_offset))
diff --git a/bfd/elf32-xtensa.c b/bfd/elf32-xtensa.c
index 99d56bf..7a118c6 100644
--- a/bfd/elf32-xtensa.c
+++ b/bfd/elf32-xtensa.c
@@ -7371,7 +7371,7 @@ is_resolvable_asm_expansion (bfd *abfd,
self_address will be at least as far into the output section
as it is prior to relaxation.
- If the displacement is postive, assume the destination will be in
+ If the displacement is positive, assume the destination will be in
it's pre-relaxed location (because relaxation only makes sections
smaller). The self_address could go all the way to the beginning
of the output section. */
@@ -7839,7 +7839,7 @@ error_return:
}
-/* Do not widen an instruction if it is preceeded by a
+/* Do not widen an instruction if it is preceded by a
loop opcode. It might cause misalignment. */
static bfd_boolean
@@ -10415,7 +10415,7 @@ relax_property_section (bfd *abfd,
entries the resulting size should be zero with an
offset before or after the fill address depending
on whether the expanding unreachable entry
- preceeds it. */
+ precedes it. */
if (last_zfill_target_sec == 0
|| last_zfill_target_sec != target_sec
|| last_zfill_target_offset != old_offset)
diff --git a/bfd/elf64-ia64-vms.c b/bfd/elf64-ia64-vms.c
index e7b82ce..18a8f65 100644
--- a/bfd/elf64-ia64-vms.c
+++ b/bfd/elf64-ia64-vms.c
@@ -3229,7 +3229,7 @@ elf64_ia64_choose_gp (bfd *abfd, struct bfd_link_info *info, bfd_boolean final)
{
bfd_vma short_range = max_short_vma - min_short_vma;
- /* If min_short_sec is set, pick one in the middle bewteen
+ /* If min_short_sec is set, pick one in the middle between
min_short_vma and max_short_vma. */
if (short_range >= 0x400000)
goto overflow;
diff --git a/bfd/elf64-mips.c b/bfd/elf64-mips.c
index 8cd0a73..936084e 100644
--- a/bfd/elf64-mips.c
+++ b/bfd/elf64-mips.c
@@ -605,7 +605,7 @@ static reloc_howto_type mips_elf64_howto_table_rel[] =
EMPTY_HOWTO (R_MIPS_ADD_IMMEDIATE),
EMPTY_HOWTO (R_MIPS_PJUMP),
- /* Similiar to R_MIPS_REL32, but used for relocations in a GOT section.
+ /* Similar to R_MIPS_REL32, but used for relocations in a GOT section.
It must be used for multigot GOT's (and only there). */
HOWTO (R_MIPS_RELGOT, /* type */
0, /* rightshift */
@@ -1386,7 +1386,7 @@ static reloc_howto_type mips_elf64_howto_table_rela[] =
EMPTY_HOWTO (R_MIPS_ADD_IMMEDIATE),
EMPTY_HOWTO (R_MIPS_PJUMP),
- /* Similiar to R_MIPS_REL32, but used for relocations in a GOT section.
+ /* Similar to R_MIPS_REL32, but used for relocations in a GOT section.
It must be used for multigot GOT's (and only there). */
HOWTO (R_MIPS_RELGOT, /* type */
0, /* rightshift */
diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
index 7da380c..9faa550 100644
--- a/bfd/elf64-ppc.c
+++ b/bfd/elf64-ppc.c
@@ -8828,7 +8828,7 @@ ppc64_elf_tls_optimize (struct bfd_link_info *info)
the values of any global symbols in a toc section that has been
edited. Globals in toc sections should be a rarity, so this function
sets a flag if any are found in toc sections other than the one just
- edited, so that futher hash table traversals can be avoided. */
+ edited, so that further hash table traversals can be avoided. */
struct adjust_toc_info
{
diff --git a/bfd/elf64-x86-64.c b/bfd/elf64-x86-64.c
index 05a4776..a1e59ec 100644
--- a/bfd/elf64-x86-64.c
+++ b/bfd/elf64-x86-64.c
@@ -6012,7 +6012,7 @@ elf_x86_64_finish_dynamic_symbol (bfd *output_bfd,
abort ();
/* For non-shared object, we can't use .got.plt, which
- contains the real function addres if we need pointer
+ contains the real function address if we need pointer
equality. We load the GOT entry with the PLT entry. */
plt = htab->elf.splt ? htab->elf.splt : htab->elf.iplt;
bfd_put_64 (output_bfd, (plt->output_section->vma
diff --git a/bfd/elfcode.h b/bfd/elfcode.h
index eb3a1ff..4549efc 100644
--- a/bfd/elfcode.h
+++ b/bfd/elfcode.h
@@ -751,7 +751,7 @@ elf_object_p (bfd *abfd)
{
/* PR 2257:
We used to just goto got_wrong_format_error here
- but there are binaries in existance for which this test
+ but there are binaries in existence for which this test
will prevent the binutils from working with them at all.
So we are kind, and reset the string index value to 0
so that at least some processing can be done. */
diff --git a/bfd/elflink.c b/bfd/elflink.c
index 76f91e9..13f6a63 100644
--- a/bfd/elflink.c
+++ b/bfd/elflink.c
@@ -6666,7 +6666,7 @@ bfd_elf_size_dynsym_hash_dynstr (bfd *output_bfd, struct bfd_link_info *info)
dynobj = elf_hash_table (info)->dynobj;
- /* Assign dynsym indicies. In a shared library we generate a
+ /* Assign dynsym indices. In a shared library we generate a
section symbol for each output section, which come first.
Next come all of the back-end allocated local dynamic syms,
followed by the rest of the global symbols. */
diff --git a/bfd/elfn32-mips.c b/bfd/elfn32-mips.c
index c7ca646..8530a04 100644
--- a/bfd/elfn32-mips.c
+++ b/bfd/elfn32-mips.c
@@ -570,7 +570,7 @@ static reloc_howto_type elf_mips_howto_table_rel[] =
EMPTY_HOWTO (R_MIPS_ADD_IMMEDIATE),
EMPTY_HOWTO (R_MIPS_PJUMP),
- /* Similiar to R_MIPS_REL32, but used for relocations in a GOT section.
+ /* Similar to R_MIPS_REL32, but used for relocations in a GOT section.
It must be used for multigot GOT's (and only there). */
HOWTO (R_MIPS_RELGOT, /* type */
0, /* rightshift */
@@ -1352,7 +1352,7 @@ static reloc_howto_type elf_mips_howto_table_rela[] =
EMPTY_HOWTO (R_MIPS_ADD_IMMEDIATE),
EMPTY_HOWTO (R_MIPS_PJUMP),
- /* Similiar to R_MIPS_REL32, but used for relocations in a GOT section.
+ /* Similar to R_MIPS_REL32, but used for relocations in a GOT section.
It must be used for multigot GOT's (and only there). */
HOWTO (R_MIPS_RELGOT, /* type */
0, /* rightshift */
diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
index 4ebdbe2..b4c4b14 100644
--- a/bfd/elfnn-aarch64.c
+++ b/bfd/elfnn-aarch64.c
@@ -6368,7 +6368,7 @@ elfNN_aarch64_relocate_section (bfd *output_bfd,
section to hold our R_AARCH64_TLSDESC, the next
available slot is determined from reloc_count,
which we step. But note, reloc_count was
- artifically moved down while allocating slots for
+ artificially moved down while allocating slots for
real PLT relocs such that all of the PLT relocs
will fit above the initial reloc_count and the
extra stuff will fit below. */
@@ -6540,7 +6540,7 @@ elfNN_aarch64_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
bfd_boolean flags_compatible = TRUE;
asection *sec;
- /* Check if we have the same endianess. */
+ /* Check if we have the same endianness. */
if (!_bfd_generic_verify_endian_match (ibfd, info))
return FALSE;
@@ -6585,13 +6585,13 @@ elfNN_aarch64_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
/* Check to see if the input BFD actually contains any sections. If
not, its flags may not have been initialised either, but it
- cannot actually cause any incompatiblity. Do not short-circuit
+ cannot actually cause any incompatibility. Do not short-circuit
dynamic objects; their section list may be emptied by
elf_link_add_object_symbols.
Also check to see if there are no code sections in the input.
In this case there is no need to check for code specific flags.
- XXX - do we need to worry about floating-point format compatability
+ XXX - do we need to worry about floating-point format compatibility
in data sections ? */
if (!(ibfd->flags & DYNAMIC))
{
@@ -8002,7 +8002,7 @@ elfNN_aarch64_allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
/* We need to ensure that all GOT entries that serve the PLT
are consecutive with the special GOT slots [0] [1] and
- [2]. Any addtional relocations, such as
+ [2]. Any additional relocations, such as
R_AARCH64_TLSDESC, must be placed after the PLT related
entries. We abuse the reloc_count such that during
sizing we adjust reloc_count to indicate the number of
diff --git a/bfd/elfnn-ia64.c b/bfd/elfnn-ia64.c
index 62370d9..357610b 100644
--- a/bfd/elfnn-ia64.c
+++ b/bfd/elfnn-ia64.c
@@ -3635,7 +3635,7 @@ elfNN_ia64_choose_gp (bfd *abfd, struct bfd_link_info *info, bfd_boolean final)
{
bfd_vma short_range = max_short_vma - min_short_vma;
- /* If min_short_sec is set, pick one in the middle bewteen
+ /* If min_short_sec is set, pick one in the middle between
min_short_vma and max_short_vma. */
if (short_range >= 0x400000)
goto overflow;
diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
index e4fc043..e2f88d0 100644
--- a/bfd/elfxx-mips.c
+++ b/bfd/elfxx-mips.c
@@ -6943,7 +6943,7 @@ _bfd_mips_elf_symbol_processing (bfd *abfd, asymbol *asym)
{
asym->section = section;
/* MIPS_TEXT is a bit special, the address is not an offset
- to the base of the .text section. So substract the section
+ to the base of the .text section. So subtract the section
base address to make it an offset. */
asym->value -= section->vma;
}
@@ -6958,7 +6958,7 @@ _bfd_mips_elf_symbol_processing (bfd *abfd, asymbol *asym)
{
asym->section = section;
/* MIPS_DATA is a bit special, the address is not an offset
- to the base of the .data section. So substract the section
+ to the base of the .data section. So subtract the section
base address to make it an offset. */
asym->value -= section->vma;
}
@@ -16055,7 +16055,7 @@ const struct bfd_elf_special_section _bfd_mips_elf_special_sections[] =
/* Merge non visibility st_other attributes. Ensure that the
STO_OPTIONAL flag is copied into h->other, even if this is not a
- definiton of the symbol. */
+ definition of the symbol. */
void
_bfd_mips_elf_merge_symbol_attribute (struct elf_link_hash_entry *h,
const Elf_Internal_Sym *isym,
diff --git a/bfd/format.c b/bfd/format.c
index 15237a3..bc6def1 100644
--- a/bfd/format.c
+++ b/bfd/format.c
@@ -78,7 +78,7 @@ DESCRIPTION
<<bfd_core>>.
o <<bfd_error_system_call>> -
- if an error occured during a read - even some file mismatches
+ if an error occurred during a read - even some file mismatches
can cause bfd_error_system_calls.
o <<file_not_recognised>> -
diff --git a/bfd/hp300hpux.c b/bfd/hp300hpux.c
index 5950e14..187f9a5 100644
--- a/bfd/hp300hpux.c
+++ b/bfd/hp300hpux.c
@@ -71,8 +71,8 @@
string2
...
- The whole symbol table is read as one chunk and then we march thru it
- and convert it to canonical form. As we march thru the table, we copy
+ The whole symbol table is read as one chunk and then we march through it
+ and convert it to canonical form. As we march through the table, we copy
the nlist data into the internal form and we compact the strings and null
terminate them, using storage from the already allocated symbol table:
@@ -508,8 +508,8 @@ NAME (aout,swap_exec_header_in) (bfd *abfd,
string2
...
- The whole symbol table is read as one chunk and then we march thru it
- and convert it to canonical form. As we march thru the table, we copy
+ The whole symbol table is read as one chunk and then we march through it
+ and convert it to canonical form. As we march through the table, we copy
the nlist data into the internal form and we compact the strings and null
terminate them, using storage from the already allocated symbol table:
@@ -551,7 +551,7 @@ MY (slurp_symbol_table) (bfd *abfd)
sym_end = (struct external_nlist *) (((char *) syms) + symbol_bytes);
- /* first, march thru the table and figure out how many symbols there are */
+ /* first, march through the table and figure out how many symbols there are */
for (sym_pointer = syms; sym_pointer < sym_end; sym_pointer++, num_syms++)
{
/* skip over the embedded symbol. */
@@ -568,9 +568,9 @@ MY (slurp_symbol_table) (bfd *abfd)
if (cached == NULL && num_syms != 0)
return FALSE;
- /* as we march thru the hp symbol table, convert it into a list of
+ /* as we march through the hp symbol table, convert it into a list of
null terminated strings to hold the symbol names. Make sure any
- assignment to the strings pointer is done after we're thru using
+ assignment to the strings pointer is done after we're through using
the nlist so we don't overwrite anything important. */
/* OK, now walk the new symtable, caching symbol properties */
diff --git a/bfd/ieee.c b/bfd/ieee.c
index 03032c5..2f7711d 100644
--- a/bfd/ieee.c
+++ b/bfd/ieee.c
@@ -3700,7 +3700,7 @@ ieee_write_object_contents (bfd *abfd)
if (! ieee_write_section_part (abfd))
return FALSE;
/* First write the symbols. This changes their values into table
- indeces so we cant use it after this point. */
+ indeces so we can't use it after this point. */
if (! ieee_write_external_part (abfd))
return FALSE;
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index 5ec3993..23d4df9 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -876,7 +876,7 @@ struct bfd_iovec
prefix is prepended to each method name. */
/* Attempt to read/write NBYTES on ABFD's IOSTREAM storing/fetching
bytes starting at PTR. Return the number of bytes actually
- transfered (a read past end-of-file returns less than NBYTES),
+ transferred (a read past end-of-file returns less than NBYTES),
or -1 (setting <<bfd_error>>) if an error occurs. */
file_ptr (*bread) (struct bfd *abfd, void *ptr, file_ptr nbytes);
file_ptr (*bwrite) (struct bfd *abfd, const void *ptr,
diff --git a/bfd/libhppa.h b/bfd/libhppa.h
index ec34908..6209457 100644
--- a/bfd/libhppa.h
+++ b/bfd/libhppa.h
@@ -522,7 +522,7 @@ bfd_hppa_insn2fmt (bfd *abfd, int insn)
case OP_BL:
if ((insn & 0x8000) != 0)
return 22;
- /* fall thru */
+ /* fall through */
case OP_BE:
case OP_BLE:
return 17;
diff --git a/bfd/mach-o.h b/bfd/mach-o.h
index 78c48d3..44172c0 100644
--- a/bfd/mach-o.h
+++ b/bfd/mach-o.h
@@ -371,7 +371,7 @@ typedef struct bfd_mach_o_dysymtab_command
bfd_mach_o_dysymtab_command;
/* An indirect symbol table entry is simply a 32bit index into the symbol table
- to the symbol that the pointer or stub is refering to. Unless it is for a
+ to the symbol that the pointer or stub is referring to. Unless it is for a
non-lazy symbol pointer section for a defined symbol which strip(1) has
removed. In which case it has the value INDIRECT_SYMBOL_LOCAL. If the
symbol was also absolute INDIRECT_SYMBOL_ABS is or'ed with that. */
diff --git a/bfd/opncls.c b/bfd/opncls.c
index b86bbab..8ceb308 100644
--- a/bfd/opncls.c
+++ b/bfd/opncls.c
@@ -180,7 +180,7 @@ DESCRIPTION
The new BFD is marked as cacheable iff @var{fd} is -1.
- If <<NULL>> is returned then an error has occured. Possible errors
+ If <<NULL>> is returned then an error has occurred. Possible errors
are <<bfd_error_no_memory>>, <<bfd_error_invalid_target>> or
<<system_call>> error.
@@ -273,7 +273,7 @@ DESCRIPTION
Calls <<bfd_find_target>>, so @var{target} is interpreted as by
that function.
- If <<NULL>> is returned then an error has occured. Possible errors
+ If <<NULL>> is returned then an error has occurred. Possible errors
are <<bfd_error_no_memory>>, <<bfd_error_invalid_target>> or
<<system_call>> error.
diff --git a/bfd/reloc.c b/bfd/reloc.c
index 56cd79b..97037ed 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -512,7 +512,7 @@ bfd_check_overflow (enum complain_overflow how,
/* If any sign bits are set, all sign bits must be set. That
is, A must be a valid negative address after shifting. */
signmask = ~ (fieldmask >> 1);
- /* Fall thru */
+ /* Fall through */
case complain_overflow_bitfield:
/* Bitfields are sometimes signed, sometimes unsigned. We
@@ -1458,7 +1458,7 @@ _bfd_relocate_contents (reloc_howto_type *howto,
That is, A must be a valid negative address after
shifting. */
signmask = ~(fieldmask >> 1);
- /* Fall thru */
+ /* Fall through */
case complain_overflow_bitfield:
/* Much like the signed check, but for a field one bit
@@ -6701,11 +6701,11 @@ ENUMDOC
ENUM
BFD_RELOC_MACH_O_SUBTRACTOR32
ENUMDOC
- Symbol will be substracted. Must be followed by a BFD_RELOC_32.
+ Symbol will be subtracted. Must be followed by a BFD_RELOC_32.
ENUM
BFD_RELOC_MACH_O_SUBTRACTOR64
ENUMDOC
- Symbol will be substracted. Must be followed by a BFD_RELOC_64.
+ Symbol will be subtracted. Must be followed by a BFD_RELOC_64.
ENUM
BFD_RELOC_MACH_O_X86_64_BRANCH32
@@ -6927,7 +6927,7 @@ ENUMDOC
ENUM
BFD_RELOC_AARCH64_MOVW_G3
ENUMDOC
- AArch64 MOV[NZK] instruction with most signficant bits 48 to 64
+ AArch64 MOV[NZK] instruction with most significant bits 48 to 64
of a signed or unsigned address/value.
ENUM
BFD_RELOC_AARCH64_MOVW_G0_S
diff --git a/bfd/srec.c b/bfd/srec.c
index 4bf251d..47d680b 100644
--- a/bfd/srec.c
+++ b/bfd/srec.c
@@ -49,7 +49,7 @@
DESCRIPTION
Where
o length
- is the number of bytes following upto the checksum. Note that
+ is the number of bytes following up to the checksum. Note that
this is not the number of chars following, since it takes two
chars to represent a byte.
o type
diff --git a/bfd/sysdep.h b/bfd/sysdep.h
index 6b86646..c77fa8f 100644
--- a/bfd/sysdep.h
+++ b/bfd/sysdep.h
@@ -186,7 +186,7 @@ size_t strnlen (const char *, size_t);
This is because the code in this directory is used to build a library which
will be linked with code in other directories to form programs. We want to
- maintain a seperate translation file for this directory however, rather
+ maintain a separate translation file for this directory however, rather
than being forced to merge it with that of any program linked to libbfd.
This is a library, so it cannot depend on the catalog currently loaded.
diff --git a/bfd/versados.c b/bfd/versados.c
index cef4b68..5fb1b3e 100644
--- a/bfd/versados.c
+++ b/bfd/versados.c
@@ -71,7 +71,7 @@ typedef struct versados_data_struct
int stringlen; /* Len of string table (valid end of pass1). */
int nsecsyms; /* Number of sections. */
- int ndefs; /* Number of exported symbols (they dont get esdids). */
+ int ndefs; /* Number of exported symbols (they don't get esdids). */
int nrefs; /* Number of imported symbols (valid end of pass1). */
int ref_idx; /* Current processed value of the above. */
diff --git a/bfd/vms-alpha.c b/bfd/vms-alpha.c
index 57e6975..dcfce46 100644
--- a/bfd/vms-alpha.c
+++ b/bfd/vms-alpha.c
@@ -2473,10 +2473,10 @@ alpha_vms_object_p (bfd *abfd)
stream of bytes (like on UNIX), but there is no magic number.
Object files are written with RMS (record management service), ie
- each records are preceeded by its length (on a word - 2 bytes), and
+ each records are preceded by its length (on a word - 2 bytes), and
padded for word-alignment. That would be simple but when files
- are transfered to a UNIX filesystem (using ftp), records are lost.
- Only the raw content of the records are transfered. Fortunately,
+ are transferred to a UNIX filesystem (using ftp), records are lost.
+ Only the raw content of the records are transferred. Fortunately,
the Alpha Object file format also store the length of the record
in the records. Is that clear ? */
@@ -3347,7 +3347,7 @@ _bfd_vms_write_egsd (bfd *abfd)
if ((old_flags & BSF_GLOBAL) == 0 && !bfd_is_und_section (symbol->section))
{
/* If the LIB$INITIIALIZE section is present, add a reference to
- LIB$INITIALIZE symbol. FIXME: this should be done explicitely
+ LIB$INITIALIZE symbol. FIXME: this should be done explicitly
in the assembly file. */
if (!((old_flags & BSF_SECTION_SYM) != 0
&& strcmp (symbol->section->name, "LIB$INITIALIZE") == 0))
diff --git a/bfd/vms-lib.c b/bfd/vms-lib.c
index a67ecfa..e2a6003b 100644
--- a/bfd/vms-lib.c
+++ b/bfd/vms-lib.c
@@ -2230,7 +2230,7 @@ _bfd_vms_lib_write_archive_contents (bfd *arch)
is_elfidx) != TRUE)
return FALSE;
- /* Write libary header. */
+ /* Write library header. */
{
unsigned char blk[VMS_BLOCK_SIZE];
struct vms_lhd *lhd = (struct vms_lhd *)blk;
diff --git a/bfd/vms-misc.c b/bfd/vms-misc.c
index 5fdce50..ddb96f7 100644
--- a/bfd/vms-misc.c
+++ b/bfd/vms-misc.c
@@ -478,7 +478,7 @@ get_vms_time_string (void)
}
/* Create module name from filename (ie, extract the basename and convert it
- in upper cases). Works on both VMS and UNIX pathes.
+ in upper cases). Works on both VMS and UNIX paths.
The result has to be free(). */
char *
diff --git a/bfd/vms.h b/bfd/vms.h
index 1d32036..6a399b0 100644
--- a/bfd/vms.h
+++ b/bfd/vms.h
@@ -44,7 +44,7 @@ enum file_format_enum
/* Not yet known. */
FF_UNKNOWN,
- /* Unix format. Each record is preceeded by the record length,
+ /* Unix format. Each record is preceded by the record length,
on 2 bytes. */
FF_FOREIGN,
diff --git a/bfd/xcofflink.c b/bfd/xcofflink.c
index cfdd018..0315cba 100644
--- a/bfd/xcofflink.c
+++ b/bfd/xcofflink.c
@@ -3401,13 +3401,13 @@ xcoff_post_gc_symbol (struct xcoff_link_hash_entry *h, void * p)
}
/* INPUT_BFD includes XCOFF symbol ISYM, which is associated with linker
- hash table entry H and csect CSECT. AUX contains ISYM's auxillary
+ hash table entry H and csect CSECT. AUX contains ISYM's auxiliary
csect information, if any. NAME is the function's name if the name
is stored in the .debug section, otherwise it is null.
Return 1 if we should include an appropriately-adjusted ISYM
in the output file, 0 if we should discard ISYM, or -1 if an
- error occured. */
+ error occurred. */
static int
xcoff_keep_symbol_p (struct bfd_link_info *info, bfd *input_bfd,
@@ -5136,7 +5136,7 @@ xcoff_find_tc0 (bfd *output_bfd, struct xcoff_final_link_info *flinfo)
irsym.n_numaux = 1;
bfd_coff_swap_sym_out (output_bfd, &irsym, flinfo->outsyms);
- /* Fill out the auxillary csect information. */
+ /* Fill out the auxiliary csect information. */
memset (&iraux, 0, sizeof iraux);
iraux.x_csect.x_smtyp = XTY_SD;
iraux.x_csect.x_smclas = XMC_TC0;
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 00/23] Fix spelling mistakes in comments
@ 2016-11-20 17:38 Ambrogino Modigliani
2016-11-20 17:38 ` [PATCH 01/23] Fix spelling mistakes in comments in C source files (bfd) Ambrogino Modigliani
` (22 more replies)
0 siblings, 23 replies; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:38 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
This series fixes number of spelling mistakes in comments in source code
files in various languages.
Vast majority of mistakes were discovered by a tool, however each mistake
is manually checked.
The first version of the series contained a patch too large for emailing,
hopefully this version will not have such problem.
Ambrogino Modigliani (23):
Fix spelling mistakes in comments in C source files (bfd)
Fix spelling mistakes in comments in C source files (gdb)
Fix spelling mistakes in comments in C source files (sim)
Fix spelling mistakes in comments in C source files (rest of modules)
Fix spelling mistakes in comments in configure scripts
Fix spelling mistakes in comments in makefiles
Fix spelling mistakes in comments in shell scripts
Fix spelling mistakes in comments in Ada source files
Fix spelling mistakes in comments in Assembler files
Fix spelling mistakes in comments in Expect scripts
Fix spelling mistakes in comments in XML files
Fix spelling mistakes in comments in .cpu files
Fix spelling mistakes in comments in .def files
Fix spelling mistakes in comments in .em files
Fix spelling mistakes in comments in .igen files
Fix spelling mistakes in comments in .in files
Fix spelling mistakes in comments in .inc files
Fix spelling mistakes in comments in .l files
Fix spelling mistakes in comments in .m4 files
Fix spelling mistakes in comments in .opc files
Fix spelling mistakes in comments in .sc files
Fix spelling mistakes in comments in .tbl files
Fix spelling mistakes in comments in .y files
bfd/aoutx.h | 2 +-
bfd/bfd-in2.h | 6 +-
bfd/bfdio.c | 2 +-
bfd/cisco-core.c | 2 +-
bfd/coff-arm.c | 4 +-
bfd/coff-i860.c | 2 +-
bfd/coff-mcore.c | 2 +-
bfd/coff-ppc.c | 4 +-
bfd/coff-rs6000.c | 2 +-
bfd/coff-tic4x.c | 2 +-
bfd/coff-tic54x.c | 6 +-
bfd/coffcode.h | 4 +-
bfd/compress.c | 2 +-
bfd/configure | 4 +-
bfd/configure.ac | 2 +-
bfd/cpu-sh.c | 2 +-
bfd/doc/chew.c | 2 +-
bfd/dwarf1.c | 2 +-
bfd/dwarf2.c | 4 +-
bfd/ecoff.c | 2 +-
bfd/elf-bfd.h | 2 +-
bfd/elf-eh-frame.c | 4 +-
bfd/elf-m10200.c | 2 +-
bfd/elf-m10300.c | 6 +-
bfd/elf.c | 8 +--
bfd/elf32-arc.c | 4 +-
bfd/elf32-arm.c | 16 +++---
bfd/elf32-avr.c | 12 ++--
bfd/elf32-bfin.c | 8 +--
bfd/elf32-hppa.c | 4 +-
bfd/elf32-i386.c | 4 +-
bfd/elf32-ip2k.c | 2 +-
bfd/elf32-m68k.c | 4 +-
bfd/elf32-nds32.c | 20 +++----
bfd/elf32-rx.c | 2 +-
bfd/elf32-xtensa.c | 6 +-
bfd/elf64-ia64-vms.c | 2 +-
bfd/elf64-mips.c | 4 +-
bfd/elf64-ppc.c | 2 +-
bfd/elf64-x86-64.c | 2 +-
bfd/elfcode.h | 2 +-
bfd/elflink.c | 2 +-
bfd/elfn32-mips.c | 4 +-
bfd/elfnn-aarch64.c | 10 ++--
bfd/elfnn-ia64.c | 2 +-
bfd/elfxx-mips.c | 6 +-
bfd/format.c | 2 +-
bfd/hp300hpux.c | 14 ++---
bfd/ieee.c | 2 +-
bfd/libbfd.h | 2 +-
bfd/libhppa.h | 2 +-
bfd/mach-o.h | 2 +-
bfd/opncls.c | 4 +-
bfd/reloc.c | 10 ++--
bfd/srec.c | 2 +-
bfd/sysdep.h | 2 +-
bfd/versados.c | 2 +-
bfd/vms-alpha.c | 8 +--
bfd/vms-lib.c | 2 +-
bfd/vms-misc.c | 2 +-
bfd/vms.h | 2 +-
bfd/warning.m4 | 2 +-
bfd/xcofflink.c | 6 +-
binutils/arparse.y | 2 +-
binutils/configure | 2 +-
binutils/dwarf.c | 4 +-
binutils/dwarf.h | 2 +-
binutils/objcopy.c | 2 +-
binutils/od-macho.c | 2 +-
binutils/rclex.c | 2 +-
binutils/readelf.c | 2 +-
binutils/stabs.c | 2 +-
config-ml.in | 2 +-
config/stdint.m4 | 2 +-
cpu/frv.opc | 2 +-
cpu/m32c.cpu | 2 +-
cpu/m32r.cpu | 2 +-
cpu/mep.opc | 4 +-
cpu/mt.cpu | 2 +-
cpu/or1k.cpu | 2 +-
cpu/xstormy16.cpu | 8 +--
gas/Makefile.am | 2 +-
gas/Makefile.in | 2 +-
gas/as.h | 2 +-
gas/config/bfin-lex.l | 2 +-
gas/config/obj-ecoff.c | 2 +-
gas/config/obj-macho.c | 2 +-
gas/config/tc-aarch64.c | 2 +-
gas/config/tc-arc.c | 2 +-
gas/config/tc-arm.c | 10 ++--
gas/config/tc-avr.c | 2 +-
gas/config/tc-cr16.c | 4 +-
gas/config/tc-epiphany.c | 8 +--
gas/config/tc-frv.c | 4 +-
gas/config/tc-hppa.c | 2 +-
gas/config/tc-hppa.h | 2 +-
gas/config/tc-i370.c | 4 +-
gas/config/tc-m68hc11.c | 2 +-
gas/config/tc-m68k.c | 6 +-
gas/config/tc-mcore.c | 2 +-
gas/config/tc-mep.c | 8 +--
gas/config/tc-metag.c | 6 +-
gas/config/tc-mips.c | 6 +-
gas/config/tc-mn10200.c | 2 +-
gas/config/tc-mn10300.c | 4 +-
gas/config/tc-nds32.c | 8 +--
gas/config/tc-nios2.c | 2 +-
gas/config/tc-ns32k.c | 8 +--
gas/config/tc-pdp11.c | 2 +-
gas/config/tc-ppc.c | 12 ++--
gas/config/tc-riscv.c | 4 +-
gas/config/tc-rx.c | 4 +-
gas/config/tc-score.c | 2 +-
gas/config/tc-score7.c | 2 +-
gas/config/tc-sparc.c | 2 +-
gas/config/tc-tic54x.c | 2 +-
gas/config/tc-vax.c | 2 +-
gas/config/tc-xgate.h | 2 +-
gas/config/tc-xtensa.c | 4 +-
gas/config/tc-z80.c | 2 +-
gas/configure | 2 +-
gas/dwarf2dbg.c | 4 +-
gas/input-file.h | 2 +-
gas/itbl-ops.c | 2 +-
gas/read.c | 4 +-
gas/stabs.c | 2 +-
gas/symbols.c | 8 +--
gas/testsuite/gas/all/gas.exp | 4 +-
gas/testsuite/gas/all/itbl-test.c | 2 +-
gas/testsuite/gas/arm/local_function.d | 2 +-
gas/testsuite/gas/arm/req.s | 2 +-
gas/testsuite/gas/arm/vfp1.s | 2 +-
gas/testsuite/gas/arm/vfp1_t2.s | 2 +-
gas/testsuite/gas/arm/vfp1xD.s | 2 +-
gas/testsuite/gas/arm/vfp1xD_t2.s | 2 +-
gas/testsuite/gas/cris/cris.exp | 2 +-
gas/testsuite/gas/hppa/basic/basic.exp | 2 +-
gas/testsuite/gas/hppa/parse/parse.exp | 2 +-
gas/testsuite/gas/hppa/reloc/reloc.exp | 2 +-
gas/testsuite/gas/mcore/allinsn.s | 4 +-
gas/testsuite/gas/mips/24k-triple-stores-5.s | 2 +-
gas/testsuite/gas/mips/delay.d | 2 +-
gas/testsuite/gas/mips/nodelay.d | 2 +-
gas/testsuite/gas/mips/r5900-full.s | 2 +-
gas/testsuite/gas/mips/r5900.s | 2 +-
gas/testsuite/gas/sh/arch/arch.exp | 2 +-
gas/testsuite/gas/tic4x/opclasses.h | 10 ++--
gas/testsuite/gas/tic4x/tic4x.exp | 8 +--
gas/write.c | 4 +-
gdb/Makefile.in | 6 +-
gdb/ada-lang.c | 16 +++---
gdb/ada-lex.l | 4 +-
gdb/ada-tasks.c | 4 +-
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gdb/amd64-linux-nat.c | 4 +-
gdb/amd64-nat.c | 2 +-
gdb/amd64-tdep.c | 2 +-
gdb/amd64-windows-tdep.c | 2 +-
gdb/amd64obsd-tdep.c | 2 +-
gdb/arch-utils.c | 2 +-
gdb/arm-linux-nat.c | 2 +-
gdb/arm-linux-tdep.c | 2 +-
gdb/arm-tdep.c | 10 ++--
gdb/auxv.c | 2 +-
gdb/ax-gdb.c | 2 +-
gdb/bcache.c | 2 +-
gdb/breakpoint.c | 2 +-
gdb/breakpoint.h | 2 +-
gdb/c-exp.y | 2 +-
gdb/c-varobj.c | 2 +-
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gdb/cli/cli-decode.c | 2 +-
gdb/cli/cli-interp.c | 4 +-
gdb/cli/cli-script.c | 4 +-
gdb/coffread.c | 4 +-
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gdb/common/gdb_signals.h | 4 +-
gdb/common/signals.c | 2 +-
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gdb/contrib/expect-read1.sh | 2 +-
gdb/corefile.c | 2 +-
gdb/cp-name-parser.y | 2 +-
gdb/cp-valprint.c | 2 +-
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gdb/d-exp.y | 2 +-
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gdb/doublest.c | 2 +-
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gdb/dwarf2loc.c | 2 +-
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gdb/features/rs6000/powerpc-601.xml | 2 +-
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gdb/frame-base.h | 2 +-
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gdb/frame.h | 2 +-
gdb/gdb.h | 4 +-
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gdb/gdbserver/event-loop.c | 2 +-
gdb/gdbserver/linux-aarch64-low.c | 2 +-
gdb/gdbserver/linux-arm-low.c | 2 +-
gdb/gdbserver/linux-low.c | 2 +-
gdb/gdbserver/linux-ppc-low.c | 2 +-
gdb/gdbserver/nto-low.c | 2 +-
gdb/gdbserver/server.c | 6 +-
gdb/gdbserver/server.h | 2 +-
gdb/gdbserver/tracepoint.c | 2 +-
gdb/gdbserver/win32-low.c | 6 +-
gdb/gdbtypes.c | 12 ++--
gdb/gnu-nat.c | 4 +-
gdb/go-exp.y | 2 +-
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gdb/i386fbsd-nat.c | 2 +-
gdb/i386obsd-tdep.c | 2 +-
gdb/ia64-tdep.c | 2 +-
gdb/ia64-tdep.h | 2 +-
gdb/inf-ptrace.c | 2 +-
gdb/infcall.c | 2 +-
gdb/infcmd.c | 8 +--
gdb/infrun.c | 4 +-
gdb/linespec.c | 2 +-
gdb/linux-nat.c | 4 +-
gdb/linux-tdep.c | 4 +-
gdb/m32r-linux-nat.c | 4 +-
gdb/m32r-tdep.c | 2 +-
gdb/m68klinux-nat.c | 4 +-
gdb/macroexp.h | 2 +-
gdb/macrotab.h | 2 +-
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gdb/mi/mi-getopt.h | 2 +-
gdb/mi/mi-main.c | 2 +-
gdb/microblaze-tdep.c | 2 +-
gdb/mips-tdep.c | 38 ++++++-------
gdb/moxie-tdep.c | 2 +-
gdb/mt-tdep.c | 2 +-
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gdb/nto-tdep.h | 2 +-
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gdb/ppc-linux-tdep.c | 2 +-
gdb/printcmd.c | 2 +-
gdb/procfs.c | 16 +++---
gdb/prologue-value.h | 2 +-
gdb/remote-fileio.c | 2 +-
gdb/remote.c | 22 ++++----
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gdb/rs6000-lynx178-tdep.c | 2 +-
gdb/rs6000-tdep.c | 4 +-
gdb/rust-lang.h | 2 +-
gdb/s390-linux-tdep.c | 30 +++++-----
gdb/ser-base.c | 4 +-
gdb/ser-go32.c | 2 +-
gdb/ser-mingw.c | 4 +-
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gdb/sh64-tdep.c | 2 +-
gdb/sol-thread.c | 2 +-
gdb/solib-svr4.c | 18 +++---
gdb/solib.c | 2 +-
gdb/sparc-sol2-tdep.c | 2 +-
gdb/sparc-tdep.c | 4 +-
gdb/sparc64-tdep.c | 4 +-
gdb/stabsread.c | 4 +-
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gdb/stubs/ia64vms-stub.c | 4 +-
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gdb/stubs/m68k-stub.c | 2 +-
gdb/symfile.c | 4 +-
gdb/symtab.c | 4 +-
gdb/target.c | 4 +-
gdb/target.h | 12 ++--
gdb/target/waitstatus.h | 2 +-
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gdb/testsuite/gdb.ada/exec_changed.exp | 2 +-
gdb/testsuite/gdb.arch/e500-prologue.exp | 2 +-
gdb/testsuite/gdb.arch/i386-mpx.exp | 2 +-
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gdb/testsuite/gdb.base/dbx.exp | 2 +-
gdb/testsuite/gdb.base/default.exp | 2 +-
.../gdb.base/double-prompt-target-event-error.exp | 4 +-
gdb/testsuite/gdb.base/exitsignal.exp | 2 +-
gdb/testsuite/gdb.base/gdb11531.exp | 2 +-
gdb/testsuite/gdb.base/gnu-ifunc.exp | 2 +-
gdb/testsuite/gdb.base/gnu_vector.exp | 2 +-
gdb/testsuite/gdb.base/killed-outside.exp | 2 +-
gdb/testsuite/gdb.base/lineinc.exp | 2 +-
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gdb/testsuite/gdb.base/overlays.exp | 2 +-
gdb/testsuite/gdb.base/ovlymgr.c | 4 +-
gdb/testsuite/gdb.base/remote.exp | 6 +-
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gdb/testsuite/gdb.base/scope.exp | 2 +-
gdb/testsuite/gdb.base/scope0.c | 2 +-
gdb/testsuite/gdb.base/sigbpt.exp | 2 +-
gdb/testsuite/gdb.base/signals.exp | 2 +-
gdb/testsuite/gdb.base/signull.exp | 2 +-
gdb/testsuite/gdb.base/sigrepeat.c | 2 +-
gdb/testsuite/gdb.base/store.exp | 2 +-
gdb/testsuite/gdb.base/structs.exp | 6 +-
.../gdb.base/watchpoint-stops-at-right-insn.exp | 2 +-
gdb/testsuite/gdb.cell/mem-access.exp | 6 +-
gdb/testsuite/gdb.cp/rtti.exp | 2 +-
gdb/testsuite/gdb.cp/static-print-quit.exp | 2 +-
gdb/testsuite/gdb.cp/virtfunc.exp | 2 +-
gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp | 2 +-
gdb/testsuite/gdb.dwarf2/fission-reread.S | 2 +-
gdb/testsuite/gdb.dwarf2/pr13961.S | 4 +-
gdb/testsuite/gdb.fortran/types.exp | 2 +-
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gdb/testsuite/gdb.go/integers.exp | 2 +-
gdb/testsuite/gdb.mi/mi-breakpoint-changed.exp | 2 +-
gdb/testsuite/gdb.multi/multi-arch-exec.exp | 2 +-
gdb/testsuite/gdb.pascal/floats.exp | 2 +-
gdb/testsuite/gdb.pascal/integers.exp | 2 +-
gdb/testsuite/gdb.pascal/types.exp | 2 +-
gdb/testsuite/gdb.reverse/step-precsave.exp | 8 +--
gdb/testsuite/gdb.reverse/step-reverse.exp | 8 +--
gdb/testsuite/gdb.threads/thread_check.exp | 2 +-
gdb/testsuite/gdb.trace/collection.exp | 4 +-
gdb/testsuite/gdb.trace/mi-tracepoint-changed.exp | 2 +-
gdb/testsuite/lib/compiler.c | 2 +-
gdb/testsuite/lib/compiler.cc | 2 +-
gdb/testsuite/lib/gdb.exp | 8 +--
gdb/testsuite/lib/prelink-support.exp | 4 +-
gdb/thread.c | 4 +-
gdb/tilegx-linux-nat.c | 6 +-
gdb/tracepoint.c | 4 +-
gdb/tui/tui-file.c | 2 +-
gdb/tui/tui-win.c | 14 ++---
gdb/tui/tui-wingeneral.c | 2 +-
gdb/tui/tui.h | 2 +-
gdb/utils.c | 2 +-
gdb/v850-tdep.c | 4 +-
gdb/valops.c | 6 +-
gdb/windows-nat.c | 2 +-
gdb/xtensa-tdep.c | 6 +-
gold/aarch64-reloc.def | 2 +-
gold/aarch64.cc | 4 +-
gold/arm.cc | 2 +-
gold/configure | 2 +-
gold/icf.cc | 4 +-
gold/layout.cc | 2 +-
gold/layout.h | 2 +-
gold/mips.cc | 2 +-
gold/output.h | 2 +-
gold/plugin.h | 2 +-
gold/script-sections.h | 2 +-
gold/script.h | 2 +-
gold/stringpool.h | 2 +-
gold/tilegx.cc | 6 +-
gprof/basic_blocks.c | 2 +-
gprof/cg_arcs.c | 2 +-
gprof/cg_print.c | 2 +-
gprof/configure | 2 +-
gprof/corefile.c | 2 +-
include/ansidecl.h | 2 +-
include/aout/aout64.h | 2 +-
include/aout/encap.h | 2 +-
include/aout/ranlib.h | 2 +-
include/coff/internal.h | 4 +-
include/coff/sym.h | 12 ++--
include/coff/xcoff.h | 4 +-
include/elf/common.h | 18 +++---
include/elf/ia64.h | 2 +-
include/elf/metag.h | 2 +-
include/elf/nds32.h | 2 +-
include/gdb/callback.h | 2 +-
include/gdb/remote-sim.h | 14 ++---
include/mach-o/arm.h | 2 +-
include/opcode/alpha.h | 4 +-
include/opcode/arc.h | 2 +-
include/opcode/hppa.h | 2 +-
include/opcode/ppc.h | 2 +-
include/opcode/tic4x.h | 10 ++--
include/opcode/tic6x-insn-formats.h | 2 +-
include/opcode/tic80.h | 2 +-
include/safe-ctype.h | 2 +-
include/splay-tree.h | 2 +-
intl/dcigettext.c | 2 +-
intl/plural.c | 2 +-
ld/configure | 2 +-
ld/deffile.h | 4 +-
ld/deffilep.y | 4 +-
ld/emulparams/elf32mcore.sh | 4 +-
ld/emultempl/avrelf.em | 2 +-
ld/emultempl/elf32.em | 4 +-
ld/emultempl/pe.em | 2 +-
ld/emultempl/pep.em | 2 +-
ld/emultempl/spuelf.em | 2 +-
ld/ld.h | 2 +-
ld/ldlang.c | 4 +-
ld/ldmisc.c | 2 +-
ld/pe-dll.c | 2 +-
ld/scripttempl/ia64vms.sc | 2 +-
ld/scripttempl/ip2k.sc | 2 +-
ld/scripttempl/v850.sc | 4 +-
ld/scripttempl/v850_rh850.sc | 4 +-
ld/testsuite/ld-arm/stm32l4xx-fix-all.s | 4 +-
ld/testsuite/ld-arm/thumb2-b-interwork.s | 2 +-
ld/testsuite/ld-arm/thumb2-bl.s | 2 +-
ld/testsuite/ld-s390/tlspic1.s | 4 +-
ld/testsuite/ld-s390/tlspic1_64.s | 4 +-
ld/testsuite/ld-scripts/section-match-1.d | 2 +-
ld/testsuite/ld-sh/arch/arch.exp | 2 +-
ld/testsuite/ld-sh/rd-sh.exp | 2 +-
ld/testsuite/ld-sh/sh64/rd-sh64.exp | 2 +-
ld/testsuite/ld-undefined/undefined.exp | 2 +-
libdecnumber/decBasic.c | 2 +-
libiberty/bcopy.c | 2 +-
libiberty/configure | 10 ++--
libiberty/configure.ac | 10 ++--
libiberty/cp-demangle.c | 2 +-
libiberty/cplus-dem.c | 4 +-
libiberty/make-relative-prefix.c | 2 +-
libiberty/pex-win32.c | 4 +-
libiberty/random.c | 2 +-
libiberty/regex.c | 2 +-
libiberty/simple-object-mach-o.c | 2 +-
libiberty/strsignal.c | 2 +-
opcodes/aarch64-asm.c | 2 +-
opcodes/aarch64-dis.c | 4 +-
opcodes/arc-dis.c | 6 +-
opcodes/arm-dis.c | 8 +--
opcodes/cgen-asm.c | 4 +-
opcodes/cgen-asm.in | 2 +-
opcodes/cgen-dis.c | 4 +-
opcodes/cgen-dis.in | 2 +-
opcodes/cgen-opc.c | 2 +-
opcodes/configure | 2 +-
opcodes/dis-buf.c | 2 +-
opcodes/epiphany-asm.c | 2 +-
opcodes/epiphany-dis.c | 2 +-
opcodes/fr30-asm.c | 2 +-
opcodes/fr30-dis.c | 2 +-
opcodes/frv-asm.c | 2 +-
opcodes/frv-dis.c | 2 +-
opcodes/frv-opc.c | 2 +-
opcodes/hppa-dis.c | 2 +-
opcodes/i386-dis.c | 2 +-
opcodes/i386-opc.h | 2 +-
opcodes/i386-opc.tbl | 2 +-
opcodes/ip2k-asm.c | 2 +-
opcodes/ip2k-dis.c | 2 +-
opcodes/iq2000-asm.c | 2 +-
opcodes/iq2000-dis.c | 2 +-
opcodes/lm32-asm.c | 2 +-
opcodes/lm32-dis.c | 2 +-
opcodes/m32c-asm.c | 2 +-
opcodes/m32c-dis.c | 2 +-
opcodes/m32r-asm.c | 2 +-
opcodes/m32r-dis.c | 2 +-
opcodes/m68hc11-opc.c | 2 +-
opcodes/m68k-dis.c | 2 +-
opcodes/m68k-opc.c | 2 +-
opcodes/mep-asm.c | 2 +-
opcodes/mep-dis.c | 6 +-
opcodes/metag-dis.c | 2 +-
opcodes/msp430-decode.c | 2 +-
opcodes/msp430-decode.opc | 2 +-
opcodes/msp430-dis.c | 2 +-
opcodes/mt-asm.c | 2 +-
opcodes/mt-dis.c | 2 +-
opcodes/ns32k-dis.c | 2 +-
opcodes/opintl.h | 2 +-
opcodes/or1k-asm.c | 2 +-
opcodes/or1k-desc.h | 2 +-
opcodes/or1k-dis.c | 2 +-
opcodes/ppc-opc.c | 6 +-
opcodes/sh-dis.c | 2 +-
opcodes/sh64-dis.c | 2 +-
opcodes/tic30-dis.c | 2 +-
opcodes/v850-opc.c | 2 +-
opcodes/xc16x-asm.c | 2 +-
opcodes/xc16x-dis.c | 2 +-
opcodes/xstormy16-asm.c | 2 +-
opcodes/xstormy16-dis.c | 2 +-
opcodes/xtensa-dis.c | 2 +-
readline/display.c | 2 +-
readline/examples/rlfe/Makefile.in | 2 +-
readline/examples/rlfe/config.h.in | 2 +-
readline/examples/rlfe/rlfe.c | 2 +-
readline/examples/rlptytest.c | 2 +-
readline/histexpand.c | 4 +-
readline/history.h | 2 +-
readline/input.c | 2 +-
readline/readline.c | 2 +-
readline/rlprivate.h | 2 +-
readline/text.c | 2 +-
sim/aarch64/memory.c | 2 +-
sim/aarch64/simulator.c | 2 +-
sim/arm/armcopro.c | 6 +-
sim/arm/armemu.c | 2 +-
sim/arm/iwmmxt.c | 2 +-
sim/bfin/devices.h | 2 +-
sim/bfin/dv-bfin_cec.c | 2 +-
sim/common/dv-glue.c | 4 +-
sim/common/dv-pal.c | 8 +--
sim/common/hw-base.h | 2 +-
sim/common/hw-device.h | 2 +-
sim/common/hw-instances.h | 2 +-
sim/common/hw-ports.c | 2 +-
sim/common/hw-tree.c | 4 +-
sim/common/sim-alu.h | 4 +-
sim/common/sim-arange.c | 8 +--
sim/common/sim-basics.h | 2 +-
sim/common/sim-bits.h | 4 +-
sim/common/sim-config.h | 4 +-
sim/common/sim-core.h | 10 ++--
sim/common/sim-engine.h | 2 +-
sim/common/sim-events.h | 2 +-
sim/common/sim-inline.h | 2 +-
sim/common/sim-io.c | 2 +-
sim/common/sim-resume.c | 2 +-
sim/d10v/interp.c | 4 +-
sim/erc32/exec.c | 2 +-
sim/erc32/float.c | 2 +-
sim/erc32/sis.h | 2 +-
sim/frv/frv-sim.h | 4 +-
sim/frv/interrupts.c | 2 +-
sim/frv/profile.c | 4 +-
sim/frv/registers.c | 4 +-
sim/frv/traps.c | 2 +-
sim/h8300/compile.c | 2 +-
sim/igen/gen-engine.c | 4 +-
sim/igen/gen-icache.c | 4 +-
sim/igen/gen-idecode.c | 4 +-
sim/igen/gen-semantics.c | 2 +-
sim/igen/gen-semantics.h | 6 +-
sim/igen/gen.c | 6 +-
sim/igen/igen.c | 2 +-
sim/igen/igen.h | 2 +-
sim/igen/ld-decode.h | 4 +-
sim/igen/ld-insn.c | 8 +--
sim/igen/lf.h | 2 +-
sim/lm32/dv-lm32uart.c | 2 +-
sim/m32r/dv-m32r_uart.h | 2 +-
sim/m32r/mloop2.in | 2 +-
sim/m32r/mloopx.in | 2 +-
sim/m68hc11/dv-m68hc11sio.c | 2 +-
sim/m68hc11/dv-m68hc11spi.c | 2 +-
sim/m68hc11/dv-m68hc11tim.c | 2 +-
sim/mips/Makefile.in | 2 +-
sim/mips/configure | 4 +-
sim/mips/configure.ac | 4 +-
sim/mips/m16.igen | 4 +-
sim/mips/mips.igen | 6 +-
sim/mips/sim-main.h | 4 +-
sim/mn10300/interp.c | 2 +-
sim/ppc/altivec_registers.h | 2 +-
sim/ppc/basics.h | 2 +-
sim/ppc/bits.h | 2 +-
sim/ppc/corefile.h | 10 ++--
sim/ppc/cpu.c | 2 +-
sim/ppc/cpu.h | 6 +-
sim/ppc/device.h | 6 +-
sim/ppc/emul_bugapi.c | 4 +-
sim/ppc/emul_chirp.h | 2 +-
sim/ppc/emul_unix.c | 2 +-
sim/ppc/events.c | 4 +-
sim/ppc/gen-icache.c | 6 +-
sim/ppc/gen-idecode.c | 6 +-
sim/ppc/gen-semantics.h | 6 +-
sim/ppc/hw_cpu.c | 2 +-
sim/ppc/hw_eeprom.c | 4 +-
sim/ppc/hw_glue.c | 4 +-
sim/ppc/hw_ide.c | 6 +-
sim/ppc/hw_init.c | 4 +-
sim/ppc/hw_opic.c | 2 +-
sim/ppc/hw_pal.c | 2 +-
sim/ppc/hw_phb.c | 8 +--
sim/ppc/hw_trace.c | 2 +-
sim/ppc/idecode_expression.h | 2 +-
sim/ppc/igen.h | 4 +-
sim/ppc/interrupts.h | 4 +-
sim/ppc/ld-decode.h | 4 +-
sim/ppc/main.c | 2 +-
sim/ppc/os_emul.h | 4 +-
sim/ppc/psim.c | 4 +-
sim/ppc/sim-endian.h | 2 +-
sim/ppc/sim_calls.c | 2 +-
sim/ppc/std-config.h | 12 ++--
sim/ppc/tree.c | 4 +-
sim/ppc/tree.h | 4 +-
sim/ppc/vm.c | 2 +-
sim/ppc/vm.h | 4 +-
sim/sh/interp.c | 6 +-
sim/sh/sim-main.h | 2 +-
sim/testsuite/d10v-elf/t-macros.i | 2 +-
sim/testsuite/sim/bfin/divq.s | 2 +-
sim/testsuite/sim/bfin/se_illegalcombination.S | 2 +-
sim/testsuite/sim/bfin/se_undefinedinstruction1.S | 2 +-
sim/testsuite/sim/bfin/se_undefinedinstruction2.S | 4 +-
sim/testsuite/sim/fr30/addsp.cgs | 6 +-
sim/testsuite/sim/fr30/bc.cgs | 64 +++++++++++-----------
sim/testsuite/sim/fr30/beq.cgs | 64 +++++++++++-----------
sim/testsuite/sim/fr30/bge.cgs | 64 +++++++++++-----------
sim/testsuite/sim/fr30/bgt.cgs | 64 +++++++++++-----------
sim/testsuite/sim/fr30/bhi.cgs | 64 +++++++++++-----------
sim/testsuite/sim/fr30/ble.cgs | 64 +++++++++++-----------
sim/testsuite/sim/fr30/bls.cgs | 64 +++++++++++-----------
sim/testsuite/sim/fr30/blt.cgs | 64 +++++++++++-----------
sim/testsuite/sim/fr30/bn.cgs | 64 +++++++++++-----------
sim/testsuite/sim/fr30/bnc.cgs | 64 +++++++++++-----------
sim/testsuite/sim/fr30/bne.cgs | 64 +++++++++++-----------
sim/testsuite/sim/fr30/bno.cgs | 64 +++++++++++-----------
sim/testsuite/sim/fr30/bnv.cgs | 64 +++++++++++-----------
sim/testsuite/sim/fr30/bp.cgs | 64 +++++++++++-----------
sim/testsuite/sim/fr30/bra.cgs | 64 +++++++++++-----------
sim/testsuite/sim/fr30/bv.cgs | 64 +++++++++++-----------
sim/testsuite/sim/fr30/copld.cgs | 4 +-
sim/testsuite/sim/fr30/copop.cgs | 4 +-
sim/testsuite/sim/fr30/copst.cgs | 4 +-
sim/testsuite/sim/fr30/copsv.cgs | 4 +-
sim/testsuite/sim/fr30/enter.cgs | 4 +-
sim/testsuite/sim/fr30/extsb.cgs | 8 +--
sim/testsuite/sim/fr30/extsh.cgs | 12 ++--
sim/testsuite/sim/fr30/extub.cgs | 10 ++--
sim/testsuite/sim/fr30/extuh.cgs | 14 ++---
sim/testsuite/sim/fr30/ldres.cgs | 4 +-
sim/testsuite/sim/fr30/leave.cgs | 2 +-
sim/testsuite/sim/fr30/nop.cgs | 2 +-
sim/testsuite/sim/fr30/stres.cgs | 4 +-
sim/testsuite/sim/fr30/xchb.cgs | 2 +-
sim/testsuite/sim/frv/testutils.inc | 2 +-
sim/testsuite/sim/h8300/ldc.s | 4 +-
sim/testsuite/sim/h8300/stc.s | 4 +-
sim/testsuite/sim/h8300/testutils.inc | 2 +-
sim/testsuite/sim/mips/hilo-hazard-3.s | 2 +-
sim/testsuite/sim/mips/hilo-hazard-4.s | 2 +-
sim/testsuite/sim/sh/fipr.s | 2 +-
sim/v850/sim-main.h | 2 +-
sim/v850/simops.c | 2 +-
sim/v850/v850.igen | 4 +-
zlib/contrib/ada/zlib-streams.ads | 6 +-
zlib/contrib/ada/zlib-thin.ads | 2 +-
zlib/contrib/ada/zlib.ads | 2 +-
zlib/contrib/inflate86/inffast.S | 2 +-
zlib/contrib/minizip/ioapi.h | 2 +-
zlib/contrib/minizip/miniunz.c | 2 +-
zlib/contrib/minizip/minizip.c | 4 +-
zlib/contrib/minizip/unzip.c | 8 +--
zlib/contrib/minizip/unzip.h | 4 +-
zlib/contrib/minizip/zip.c | 2 +-
zlib/examples/enough.c | 2 +-
zlib/examples/zran.c | 2 +-
668 files changed, 1650 insertions(+), 1650 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 03/23] Fix spelling mistakes in comments in C source files (sim)
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
` (2 preceding siblings ...)
2016-11-20 17:39 ` [PATCH 02/23] Fix spelling mistakes in comments in C source files (gdb) Ambrogino Modigliani
@ 2016-11-20 17:39 ` Ambrogino Modigliani
2016-11-20 17:39 ` [PATCH 07/23] Fix spelling mistakes in comments in shell scripts Ambrogino Modigliani
` (18 subsequent siblings)
22 siblings, 0 replies; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:39 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
sim/aarch64/ChangeLog:
* sim/aarch64/memory.c: Fix spelling in comments.
* sim/aarch64/simulator.c: Fix spelling in comments.
sim/arm/ChangeLog:
* sim/arm/armcopro.c: Fix spelling in comments.
* sim/arm/armemu.c: Fix spelling in comments.
* sim/arm/iwmmxt.c: Fix spelling in comments.
sim/bfin/ChangeLog:
* sim/bfin/devices.h: Fix spelling in comments.
* sim/bfin/dv-bfin_cec.c: Fix spelling in comments.
sim/common/ChangeLog:
* sim/common/dv-glue.c: Fix spelling in comments.
* sim/common/dv-pal.c: Fix spelling in comments.
* sim/common/hw-base.h: Fix spelling in comments.
* sim/common/hw-device.h: Fix spelling in comments.
* sim/common/hw-instances.h: Fix spelling in comments.
* sim/common/hw-ports.c: Fix spelling in comments.
* sim/common/hw-tree.c: Fix spelling in comments.
* sim/common/sim-alu.h: Fix spelling in comments.
* sim/common/sim-arange.h: Fix spelling in comments.
* sim/common/sim-basics.h: Fix spelling in comments.
* sim/common/sim-bits.h: Fix spelling in comments.
* sim/common/sim-config.h: Fix spelling in comments.
* sim/common/sim-core.h: Fix spelling in comments.
* sim/common/sim-engine.h: Fix spelling in comments.
* sim/common/sim-events.h: Fix spelling in comments.
* sim/common/sim-inline.h: Fix spelling in comments.
* sim/common/sim-io.h: Fix spelling in comments.
* sim/common/sim-resume.h: Fix spelling in comments.
sim/d10v/ChangeLog:
* sim/d10v/interp.c: Fix spelling in comments.
sim/erc32/ChangeLog:
* sim/erc32/exec.c: Fix spelling in comments.
* sim/erc32/float.c: Fix spelling in comments.
* sim/erc32/sis.h: Fix spelling in comments.
sim/frv/ChangeLog:
* sim/frv/frv-sim.h: Fix spelling in comments.
* sim/frv/interrupts.c: Fix spelling in comments.
* sim/frv/profile.c: Fix spelling in comments.
* sim/frv/registers.c: Fix spelling in comments.
* sim/frv/traps.c: Fix spelling in comments.
sim/h8300/ChangeLog:
* sim/h8300/compile.c: Fix spelling in comments.
sim/igen/ChangeLog:
* sim/igen/gen-engine.c: Fix spelling in comments.
* sim/igen/gen-icache.c: Fix spelling in comments.
* sim/igen/gen-idecode.c: Fix spelling in comments.
* sim/igen/gen-semantics.c: Fix spelling in comments.
* sim/igen/gen-semantics.h: Fix spelling in comments.
* sim/igen/gen.c: Fix spelling in comments.
* sim/igen/igen.c: Fix spelling in comments.
* sim/igen/igen.h: Fix spelling in comments.
* sim/igen/ld-decode.h: Fix spelling in comments.
* sim/igen/ld-insn.c: Fix spelling in comments.
* sim/igen/lf.h: Fix spelling in comments.
sim/lm32/ChangeLog:
* sim/lm32/dv-lm32uart.c: Fix spelling in comments.
sim/m32r/ChangeLog:
* sim/m32r/dv-m32r_uart.h: Fix spelling in comments.
sim/m68hc11/ChangeLog:
* sim/m68hc11/dv-m68hc11sio.c: Fix spelling in comments.
* sim/m68hc11/dv-m68hc11spi.c: Fix spelling in comments.
* sim/m68hc11/dv-m68hc11tim.c: Fix spelling in comments.
sim/mips/ChangeLog:
* sim/mips/sim-main.h: Fix spelling in comments.
sim/mn10300/ChangeLog:
* sim/mn10300/interp.c: Fix spelling in comments.
sim/ppc/ChangeLog:
* sim/ppc/altivec_registers.h: Fix spelling in comments.
* sim/ppc/basics.h: Fix spelling in comments.
* sim/ppc/bits.h: Fix spelling in comments.
* sim/ppc/corefile.h: Fix spelling in comments.
* sim/ppc/cpu.c: Fix spelling in comments.
* sim/ppc/cpu.h: Fix spelling in comments.
* sim/ppc/device.h: Fix spelling in comments.
* sim/ppc/emul_bugapi.c: Fix spelling in comments.
* sim/ppc/emul_chirp.h: Fix spelling in comments.
* sim/ppc/emul_unix.c: Fix spelling in comments.
* sim/ppc/events.c: Fix spelling in comments.
* sim/ppc/gen-icache.c: Fix spelling in comments.
* sim/ppc/gen-idecode.c: Fix spelling in comments.
* sim/ppc/gen-semantics.h: Fix spelling in comments.
* sim/ppc/hw_cpu.c: Fix spelling in comments.
* sim/ppc/hw_eeprom.c: Fix spelling in comments.
* sim/ppc/hw_glue.c: Fix spelling in comments.
* sim/ppc/hw_ide.c: Fix spelling in comments.
* sim/ppc/hw_init.c: Fix spelling in comments.
* sim/ppc/hw_opic.c: Fix spelling in comments.
* sim/ppc/hw_pal.c: Fix spelling in comments.
* sim/ppc/hw_phb.c: Fix spelling in comments.
* sim/ppc/hw_trace.c: Fix spelling in comments.
* sim/ppc/idecode_expression.h: Fix spelling in comments.
* sim/ppc/igen.h: Fix spelling in comments.
* sim/ppc/interrupts.h: Fix spelling in comments.
* sim/ppc/ld-decode.h: Fix spelling in comments.
* sim/ppc/main.c: Fix spelling in comments.
* sim/ppc/os_emul.h: Fix spelling in comments.
* sim/ppc/psim.c: Fix spelling in comments.
* sim/ppc/sim-endian.h: Fix spelling in comments.
* sim/ppc/sim_calls.c: Fix spelling in comments.
* sim/ppc/std-config.h: Fix spelling in comments.
* sim/ppc/tree.c: Fix spelling in comments.
* sim/ppc/tree.h: Fix spelling in comments.
* sim/ppc/vm.c: Fix spelling in comments.
* sim/ppc/vm.h: Fix spelling in comments.
sim/sh/ChangeLog:
* sim/sh/interp.c: Fix spelling in comments.
* sim/sh/sim-main.h: Fix spelling in comments.
sim/v850/ChangeLog:
* sim/v850/sim-main.h: Fix spelling in comments.
* sim/v850/simops.c: Fix spelling in comments.
---
sim/aarch64/memory.c | 2 +-
sim/aarch64/simulator.c | 2 +-
sim/arm/armcopro.c | 6 +++---
sim/arm/armemu.c | 2 +-
sim/arm/iwmmxt.c | 2 +-
sim/bfin/devices.h | 2 +-
sim/bfin/dv-bfin_cec.c | 2 +-
sim/common/dv-glue.c | 4 ++--
sim/common/dv-pal.c | 8 ++++----
sim/common/hw-base.h | 2 +-
sim/common/hw-device.h | 2 +-
sim/common/hw-instances.h | 2 +-
sim/common/hw-ports.c | 2 +-
sim/common/hw-tree.c | 4 ++--
sim/common/sim-alu.h | 4 ++--
sim/common/sim-arange.c | 8 ++++----
sim/common/sim-basics.h | 2 +-
sim/common/sim-bits.h | 4 ++--
sim/common/sim-config.h | 4 ++--
sim/common/sim-core.h | 10 +++++-----
sim/common/sim-engine.h | 2 +-
sim/common/sim-events.h | 2 +-
sim/common/sim-inline.h | 2 +-
sim/common/sim-io.c | 2 +-
sim/common/sim-resume.c | 2 +-
sim/d10v/interp.c | 4 ++--
sim/erc32/exec.c | 2 +-
sim/erc32/float.c | 2 +-
sim/erc32/sis.h | 2 +-
sim/frv/frv-sim.h | 4 ++--
sim/frv/interrupts.c | 2 +-
sim/frv/profile.c | 4 ++--
sim/frv/registers.c | 4 ++--
sim/frv/traps.c | 2 +-
sim/h8300/compile.c | 2 +-
sim/igen/gen-engine.c | 4 ++--
sim/igen/gen-icache.c | 4 ++--
sim/igen/gen-idecode.c | 4 ++--
sim/igen/gen-semantics.c | 2 +-
sim/igen/gen-semantics.h | 6 +++---
sim/igen/gen.c | 6 +++---
sim/igen/igen.c | 2 +-
sim/igen/igen.h | 2 +-
sim/igen/ld-decode.h | 4 ++--
sim/igen/ld-insn.c | 8 ++++----
sim/igen/lf.h | 2 +-
sim/lm32/dv-lm32uart.c | 2 +-
sim/m32r/dv-m32r_uart.h | 2 +-
sim/m68hc11/dv-m68hc11sio.c | 2 +-
sim/m68hc11/dv-m68hc11spi.c | 2 +-
sim/m68hc11/dv-m68hc11tim.c | 2 +-
sim/mips/sim-main.h | 4 ++--
sim/mn10300/interp.c | 2 +-
sim/ppc/altivec_registers.h | 2 +-
sim/ppc/basics.h | 2 +-
sim/ppc/bits.h | 2 +-
sim/ppc/corefile.h | 10 +++++-----
sim/ppc/cpu.c | 2 +-
sim/ppc/cpu.h | 6 +++---
sim/ppc/device.h | 6 +++---
sim/ppc/emul_bugapi.c | 4 ++--
sim/ppc/emul_chirp.h | 2 +-
sim/ppc/emul_unix.c | 2 +-
sim/ppc/events.c | 4 ++--
sim/ppc/gen-icache.c | 6 +++---
sim/ppc/gen-idecode.c | 6 +++---
sim/ppc/gen-semantics.h | 6 +++---
sim/ppc/hw_cpu.c | 2 +-
sim/ppc/hw_eeprom.c | 4 ++--
sim/ppc/hw_glue.c | 4 ++--
sim/ppc/hw_ide.c | 6 +++---
sim/ppc/hw_init.c | 4 ++--
sim/ppc/hw_opic.c | 2 +-
sim/ppc/hw_pal.c | 2 +-
sim/ppc/hw_phb.c | 8 ++++----
sim/ppc/hw_trace.c | 2 +-
sim/ppc/idecode_expression.h | 2 +-
sim/ppc/igen.h | 4 ++--
sim/ppc/interrupts.h | 4 ++--
sim/ppc/ld-decode.h | 4 ++--
sim/ppc/main.c | 2 +-
sim/ppc/os_emul.h | 4 ++--
sim/ppc/psim.c | 4 ++--
sim/ppc/sim-endian.h | 2 +-
sim/ppc/sim_calls.c | 2 +-
sim/ppc/std-config.h | 12 ++++++------
sim/ppc/tree.c | 4 ++--
sim/ppc/tree.h | 4 ++--
sim/ppc/vm.c | 2 +-
sim/ppc/vm.h | 4 ++--
sim/sh/interp.c | 6 +++---
sim/sh/sim-main.h | 2 +-
sim/v850/sim-main.h | 2 +-
sim/v850/simops.c | 2 +-
94 files changed, 166 insertions(+), 166 deletions(-)
diff --git a/sim/aarch64/memory.c b/sim/aarch64/memory.c
index 744a76d..7599a1b 100644
--- a/sim/aarch64/memory.c
+++ b/sim/aarch64/memory.c
@@ -155,7 +155,7 @@ aarch64_get_mem_ptr (sim_cpu *cpu, uint64_t address)
an out-of-memory condition by noticing a stack/heap collision.
The heap starts at the end of loaded memory and carries on up
- to an arbitary 2Gb limit. */
+ to an arbitrary 2Gb limit. */
uint64_t
aarch64_get_heap_start (sim_cpu *cpu)
diff --git a/sim/aarch64/simulator.c b/sim/aarch64/simulator.c
index e5ada18..26a6b04 100644
--- a/sim/aarch64/simulator.c
+++ b/sim/aarch64/simulator.c
@@ -1695,7 +1695,7 @@ set_flags_for_add64 (sim_cpu *cpu, uint64_t value1, uint64_t value2)
}
else
{
- /* Postive plus positive - overflow has happened if the
+ /* Positive plus positive - overflow has happened if the
result is smaller than either of the operands. */
if (result < value1 || result < value2)
flags |= V | C;
diff --git a/sim/arm/armcopro.c b/sim/arm/armcopro.c
index 9227fc0..c535911 100644
--- a/sim/arm/armcopro.c
+++ b/sim/arm/armcopro.c
@@ -131,7 +131,7 @@ check_cp15_access (ARMul_State * state,
return ARMul_CANT;
break;
case 7:
- /* Permissable combinations:
+ /* Permissible combinations:
Opcode_2 CRm
0 5
0 6
@@ -154,7 +154,7 @@ check_cp15_access (ARMul_State * state,
break;
case 8:
- /* Permissable combinations:
+ /* Permissible combinations:
Opcode_2 CRm
0 5
0 6
@@ -229,7 +229,7 @@ write_cp15_reg (ARMul_State * state,
/* Writes are not allowed. */
return;
- case 1: /* Auxillary Control. */
+ case 1: /* Auxiliary Control. */
/* Only BITS (5, 4) and BITS (1, 0) can be written. */
value &= 0x33;
break;
diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c
index 76f398b..abe3db1 100644
--- a/sim/arm/armemu.c
+++ b/sim/arm/armemu.c
@@ -5974,7 +5974,7 @@ Multiply64 (ARMul_State * state, ARMword instr, int msigned, int scc)
hi = (((Rs >> 16) & 0xFFFF) * ((Rm >> 16) & 0xFFFF));
/* We now need to add all of these results together, taking
- care to propogate the carries from the additions. */
+ care to propagate the carries from the additions. */
RdLo = Add32 (lo, (mid1 << 16), &carry);
RdHi = carry;
RdLo = Add32 (RdLo, (mid2 << 16), &carry);
diff --git a/sim/arm/iwmmxt.c b/sim/arm/iwmmxt.c
index 5d289a0..25b5bde 100644
--- a/sim/arm/iwmmxt.c
+++ b/sim/arm/iwmmxt.c
@@ -3539,7 +3539,7 @@ WXOR (ARMword instr)
return ARMul_DONE;
}
-/* This switch table is moved to a seperate function in order
+/* This switch table is moved to a separate function in order
to work around a compiler bug in the host compiler... */
static int
diff --git a/sim/bfin/devices.h b/sim/bfin/devices.h
index 019f44e..404c8b2 100644
--- a/sim/bfin/devices.h
+++ b/sim/bfin/devices.h
@@ -26,7 +26,7 @@
#include "hw-device.h"
#include "hw-tree.h"
-/* We keep the same inital structure layout with DMA enabled devices. */
+/* We keep the same initial structure layout with DMA enabled devices. */
struct dv_bfin {
bu32 base;
struct hw *dma_master;
diff --git a/sim/bfin/dv-bfin_cec.c b/sim/bfin/dv-bfin_cec.c
index d4f96b2..915abbf 100644
--- a/sim/bfin/dv-bfin_cec.c
+++ b/sim/bfin/dv-bfin_cec.c
@@ -570,7 +570,7 @@ _cec_raise (SIM_CPU *cpu, struct bfin_cec *cec, int ivg)
/* XXX: what happens with 'raise 0' ? */
SET_RETEREG (oldpc);
excp_to_sim_halt (sim_stopped, SIM_SIGTRAP);
- /* XXX: Need an easy way for gdb to signal it isnt here. */
+ /* XXX: Need an easy way for gdb to signal it isn't here. */
cec->ipend &= ~IVG_EMU_B;
break;
case IVG_RST:
diff --git a/sim/common/dv-glue.c b/sim/common/dv-glue.c
index a1e2507..2790ab6 100644
--- a/sim/common/dv-glue.c
+++ b/sim/common/dv-glue.c
@@ -62,10 +62,10 @@
<<glue>>: In addition to driving its output interrupt port with any
value written to an interrupt input port is stored in the
corresponding <<output>> register. Such input interrupts, however,
- are not propogated to an output interrupt port.
+ are not propagated to an output interrupt port.
<<glue-and>>: The bit-wise AND of the interrupt inputs is computed
- and then both stored in <<output>> register zero and propogated to
+ and then both stored in <<output>> register zero and propagated to
output interrupt output port zero.
diff --git a/sim/common/dv-pal.c b/sim/common/dv-pal.c
index 43d0635..97c3ce1 100644
--- a/sim/common/dv-pal.c
+++ b/sim/common/dv-pal.c
@@ -52,7 +52,7 @@
DESCRIPTION
- Typical hardware dependant hack. This device allows the firmware
+ Typical hardware dependent hack. This device allows the firmware
to gain access to all the things the firmware needs (but the OS
doesn't).
@@ -104,8 +104,8 @@
zero value to this register clears the countdown timer. Writing a
non-zero 32 bit big-endian value to this register sets the
countdown timer to expire in VALUE ticks (ticks is target
- dependant). Reading the countdown register returns the last value
- writen.
+ dependent). Reading the countdown register returns the last value
+ written.
COUNTDOWN VALUE (read): Reading this 32 bit big-endian register
returns the number of ticks remaining until the countdown timer
@@ -115,7 +115,7 @@
interrupt source. Writing a 32 bit big-endian zero value to this
register clears the periodic timer. Writing a 32 bit non-zero
value to this register sets the periodic timer to triger every
- VALUE ticks (ticks is target dependant). Reading the timer
+ VALUE ticks (ticks is target dependent). Reading the timer
register returns the last value written.
TIMER VALUE (read): Reading this 32 bit big-endian register returns
diff --git a/sim/common/hw-base.h b/sim/common/hw-base.h
index e46a127..4994502 100644
--- a/sim/common/hw-base.h
+++ b/sim/common/hw-base.h
@@ -23,7 +23,7 @@
#ifndef HW_BASE
#define HW_BASE
-/* Create a primative device */
+/* Create a primitive device */
struct hw *hw_create
(struct sim_state *sd,
diff --git a/sim/common/hw-device.h b/sim/common/hw-device.h
index bf1e9e51..179b30c 100644
--- a/sim/common/hw-device.h
+++ b/sim/common/hw-device.h
@@ -167,7 +167,7 @@ typedef unsigned (hw_reset_method)
/* Hardware operations:
Connecting a parent to its children is a common bus. The parent
- node is described as the bus owner and is responisble for
+ node is described as the bus owner and is responsible for
co-ordinating bus operations. On the bus, a SPACE:ADDR pair is used
to specify an address. A device that is both a bus owner (parent)
and bus client (child) are referred to as a bridging device.
diff --git a/sim/common/hw-instances.h b/sim/common/hw-instances.h
index 9396ba9..15ee0eb 100644
--- a/sim/common/hw-instances.h
+++ b/sim/common/hw-instances.h
@@ -33,7 +33,7 @@
disks file system. The operations would be implemented using the
basic block I/O model provided by the disk.
- This model includes methods that faciliate the creation of device
+ This model includes methods that facilitate the creation of device
instance and (should a given device support it) standard operations
on those instances.
diff --git a/sim/common/hw-ports.c b/sim/common/hw-ports.c
index 861fd9b..571f057 100644
--- a/sim/common/hw-ports.c
+++ b/sim/common/hw-ports.c
@@ -130,7 +130,7 @@ detach_hw_port_edge (struct hw *me,
&& old_edge->my_port == my_port)
{
if (old_edge->disposition == permenant_object)
- hw_abort (me, "attempt to delete permenant port edge");
+ hw_abort (me, "attempt to delete permanent port edge");
*list = old_edge->next;
hw_free (me, old_edge);
return;
diff --git a/sim/common/hw-tree.c b/sim/common/hw-tree.c
index bf47d7b..d0e29c9 100644
--- a/sim/common/hw-tree.c
+++ b/sim/common/hw-tree.c
@@ -477,7 +477,7 @@ count_entries (struct hw *current,
-/* parse: <address> ::= <token> ; device dependant */
+/* parse: <address> ::= <token> ; device dependent */
static const char *
parse_address (struct hw *current,
@@ -1273,7 +1273,7 @@ hw_tree_find_device (struct hw *root,
/* parse the path */
split_device_specifier (root, path_to_device, &spec);
if (spec.value != NULL)
- return NULL; /* something wierd */
+ return NULL; /* something weird */
/* now find it */
node = split_find_device (root, &spec);
diff --git a/sim/common/sim-alu.h b/sim/common/sim-alu.h
index fa24720..4fd5d90 100644
--- a/sim/common/sim-alu.h
+++ b/sim/common/sim-alu.h
@@ -453,7 +453,7 @@ do { \
#define ALU8_CARRY_BORROW_RESULT ((unsigned8) alu8_cr)
#define ALU8_OVERFLOW_RESULT ((unsigned8) alu8_vr)
-/* #define ALU8_END ????? - target dependant */
+/* #define ALU8_END ????? - target dependent */
@@ -485,7 +485,7 @@ do { \
#define ALU16_CARRY_BORROW_RESULT ((unsigned16) alu16_cr)
#define ALU16_OVERFLOW_RESULT ((unsigned16) alu16_vr)
-/* #define ALU16_END ????? - target dependant */
+/* #define ALU16_END ????? - target dependent */
diff --git a/sim/common/sim-arange.c b/sim/common/sim-arange.c
index f7557d0..780be5a 100644
--- a/sim/common/sim-arange.c
+++ b/sim/common/sim-arange.c
@@ -88,12 +88,12 @@ frob_range (ADDR_RANGE *ar, address_word start, address_word end, int delete_p)
{
if (! delete_p)
{
- /* Try next range if current range preceeds new one and not
+ /* Try next range if current range precedes new one and not
adjacent or overlapping. */
if (asr->end < caller->start - 1)
goto next_range;
- /* Break out if new range preceeds current one and not
+ /* Break out if new range precedes current one and not
adjacent or overlapping. */
if (asr->start > caller->end + 1)
break;
@@ -120,11 +120,11 @@ frob_range (ADDR_RANGE *ar, address_word start, address_word end, int delete_p)
}
else /* deleting a range */
{
- /* Try next range if current range preceeds new one. */
+ /* Try next range if current range precedes new one. */
if (asr->end < caller->start)
goto next_range;
- /* Break out if new range preceeds current one. */
+ /* Break out if new range precedes current one. */
if (asr->start > caller->end)
break;
diff --git a/sim/common/sim-basics.h b/sim/common/sim-basics.h
index 9f34e2f..1f0f315 100644
--- a/sim/common/sim-basics.h
+++ b/sim/common/sim-basics.h
@@ -30,7 +30,7 @@
#include "config.h"
#endif
-/* Basic host dependant mess - hopefully <stdio.h> + <stdarg.h> will
+/* Basic host dependent mess - hopefully <stdio.h> + <stdarg.h> will
bring potential conflicts out in the open */
#include <stdarg.h>
diff --git a/sim/common/sim-bits.h b/sim/common/sim-bits.h
index d47f69f..457a632 100644
--- a/sim/common/sim-bits.h
+++ b/sim/common/sim-bits.h
@@ -441,7 +441,7 @@ INLINE_SIM_BITS(unsigned_word) MSEXTRACTED (unsigned_word val, int start, int st
/* move a single bit around */
-/* NB: the wierdness (N>O?N-O:0) is to stop a warning from GCC */
+/* NB: the weirdness (N>O?N-O:0) is to stop a warning from GCC */
#define _SHUFFLEDn(N, WORD, OLD, NEW) \
((OLD) < (NEW) \
? (((unsigned##N)(WORD) \
@@ -552,7 +552,7 @@ do { \
/* some rotate functions. The generic macro's ROT, ROTL, ROTR are
- intentionally omited. */
+ intentionally omitted. */
INLINE_SIM_BITS(unsigned8) ROT8 (unsigned8 val, int shift);
diff --git a/sim/common/sim-config.h b/sim/common/sim-config.h
index 88ecfd8..5e40508 100644
--- a/sim/common/sim-config.h
+++ b/sim/common/sim-config.h
@@ -24,7 +24,7 @@
#define SIM_CONFIG_H
-/* Host dependant:
+/* Host dependent:
The CPP below defines information about the compilation host. In
particular it defines the macro's:
@@ -146,7 +146,7 @@ extern enum bfd_endian current_target_byte_order;
expect to see (VEA includes things like coherency and the time
base) while OEA is what an operating system expects to see. By
setting these to specific values, the build process is able to
- eliminate non relevent environment code.
+ eliminate non relevant environment code.
STATE_ENVIRONMENT(sd) specifies which of vea or oea is required for
the current runtime.
diff --git a/sim/common/sim-core.h b/sim/common/sim-core.h
index 25e7cf3..aa8135b 100644
--- a/sim/common/sim-core.h
+++ b/sim/common/sim-core.h
@@ -129,7 +129,7 @@ extern SIM_RC sim_core_install (SIM_DESC sd);
such that the byte alignmed of OPTIONAL_BUFFER matches ADDR vis
(OPTIONAL_BUFFER % 8) == (ADDR % 8)). It is defined to be a sub-optimal
hook that allows clients to do nasty things that the interface doesn't
- accomodate. */
+ accommodate. */
extern void sim_core_attach
(SIM_DESC sd,
@@ -160,7 +160,7 @@ extern void sim_core_detach
Transfer a variable sized block of raw data between the host and
target. Should any problems occur, the number of bytes
- successfully transfered is returned.
+ successfully transferred is returned.
No host/target byte endian conversion is performed. No xor-endian
conversion is performed.
@@ -206,7 +206,7 @@ extern void sim_core_set_xor
Transfer a variable sized block of raw data between the host and
target. Should any problems occur, the number of bytes
- successfully transfered is returned.
+ successfully transferred is returned.
No host/target byte endian conversion is performed. If applicable
(WITH_XOR_ENDIAN and xor-endian set), xor-endian conversion *is*
@@ -244,11 +244,11 @@ extern void *sim_core_trans_addr
/* Fixed sized, processor oriented, read/write.
Transfer a fixed amout of memory between the host and target. The
- data transfered is translated from/to host to/from target byte
+ data transferred is translated from/to host to/from target byte
order (including xor endian). Should the transfer fail, the
operation shall abort (no return).
- ALIGNED assumes yhat the specified ADDRESS is correctly alligned
+ ALIGNED assumes yhat the specified ADDRESS is correctly aligned
for an N byte transfer (no alignment checks are made). Passing an
incorrectly aligned ADDRESS is erroneous.
diff --git a/sim/common/sim-engine.h b/sim/common/sim-engine.h
index 382093b..172a329 100644
--- a/sim/common/sim-engine.h
+++ b/sim/common/sim-engine.h
@@ -131,7 +131,7 @@ extern void sim_engine_vabort
/* Called by the generic sim_resume to run the simulation within the
- above safty net.
+ above safety net.
An example implementation of sim_engine_run can be found in the
file sim-run.c */
diff --git a/sim/common/sim-events.h b/sim/common/sim-events.h
index c01cea0..5098c89 100644
--- a/sim/common/sim-events.h
+++ b/sim/common/sim-events.h
@@ -140,7 +140,7 @@ extern void sim_events_schedule_after_signal
/* Schedule an event milli-seconds from NOW. The exact interpretation
- of wallclock is host dependant. */
+ of wallclock is host dependent. */
extern sim_event *sim_events_watch_clock
(SIM_DESC sd,
diff --git a/sim/common/sim-inline.h b/sim/common/sim-inline.h
index 2c5406e..57e6732 100644
--- a/sim/common/sim-inline.h
+++ b/sim/common/sim-inline.h
@@ -37,7 +37,7 @@
speed improvement (x3-x5). In the case of RISC (sparc) while the
performance gain isn't as great it is still significant.
- Each module is controled by the macro <module>_INLINE which can
+ Each module is controlled by the macro <module>_INLINE which can
have the values described below
0 (ZERO)
diff --git a/sim/common/sim-io.c b/sim/common/sim-io.c
index a04dfc2..d68d6c5 100644
--- a/sim/common/sim-io.c
+++ b/sim/common/sim-io.c
@@ -328,7 +328,7 @@ sim_io_poll_quit (SIM_DESC sd)
FIXME: Some completly new mechanism for handling the general
problem of asynchronous IO is needed.
- FIXME: This function does not supress the echoing (ECHO) of input.
+ FIXME: This function does not suppress the echoing (ECHO) of input.
Consequently polled input is always displayed.
FIXME: This function does not perform uncooked reads.
diff --git a/sim/common/sim-resume.c b/sim/common/sim-resume.c
index e9ec9c9..a23e844 100644
--- a/sim/common/sim-resume.c
+++ b/sim/common/sim-resume.c
@@ -31,7 +31,7 @@ has_stepped (SIM_DESC sd,
}
-/* Generic resume - assumes the existance of sim_engine_run */
+/* Generic resume - assumes the existence of sim_engine_run */
void
sim_resume (SIM_DESC sd,
diff --git a/sim/d10v/interp.c b/sim/d10v/interp.c
index cb8c6cf..d143e8c 100644
--- a/sim/d10v/interp.c
+++ b/sim/d10v/interp.c
@@ -960,8 +960,8 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
{
if (PSW_RP && PC == RPT_E)
{
- /* Note: The behavour of a branch instruction at RPT_E
- is implementation dependant, this simulator takes the
+ /* Note: The behaviour of a branch instruction at RPT_E
+ is implementation dependent, this simulator takes the
branch. Branching to RPT_E is valid, the instruction
must be executed before the loop is taken. */
if (RPT_C == 1)
diff --git a/sim/erc32/exec.c b/sim/erc32/exec.c
index a0ab0f9..2687b21 100644
--- a/sim/erc32/exec.c
+++ b/sim/erc32/exec.c
@@ -322,7 +322,7 @@ mul64 (uint32 n1, uint32 n2, uint32 *result_hi, uint32 *result_lo, int msigned)
hi = (((n1 >> 16) & 0xFFFF) * ((n2 >> 16) & 0xFFFF));
/* We now need to add all of these results together, taking care
- to propogate the carries from the additions: */
+ to propagate the carries from the additions: */
reg_lo = add32 (lo, (mid1 << 16), &carry);
reg_hi = carry;
reg_lo = add32 (reg_lo, (mid2 << 16), &carry);
diff --git a/sim/erc32/float.c b/sim/erc32/float.c
index c96b208..d117752 100644
--- a/sim/erc32/float.c
+++ b/sim/erc32/float.c
@@ -20,7 +20,7 @@
FPU. IEEE trap handling is done as follows:
1. In the host, all IEEE traps are masked
2. After each simulated FPU instruction, check if any exception
- occured by reading the exception bits from the host FPU status
+ occurred by reading the exception bits from the host FPU status
register (get_accex()).
3. Propagate any exceptions to the simulated FSR.
4. Clear host exception bits.
diff --git a/sim/erc32/sis.h b/sim/erc32/sis.h
index 5a909f5..396a104 100644
--- a/sim/erc32/sis.h
+++ b/sim/erc32/sis.h
@@ -121,7 +121,7 @@ struct pstate {
uint64 pwdtime; /* Cycles in power-down mode */
uint64 nstore; /* Number of load instructions */
uint64 nload; /* Number of store instructions */
- uint64 nannul; /* Number of annuled instructions */
+ uint64 nannul; /* Number of annulled instructions */
uint64 nbranch; /* Number of branch instructions */
uint32 ildreg; /* Destination of last load instruction */
uint64 ildtime; /* Last time point for load dependency */
diff --git a/sim/frv/frv-sim.h b/sim/frv/frv-sim.h
index 1e2fbc6..8a34f37 100644
--- a/sim/frv/frv-sim.h
+++ b/sim/frv/frv-sim.h
@@ -266,7 +266,7 @@ enum frv_ec
/* FR-V Interrupt.
This struct contains enough information to describe a particular interrupt
- occurance. */
+ occurrence. */
struct frv_interrupt
{
enum frv_interrupt_kind kind;
@@ -282,7 +282,7 @@ struct frv_interrupt
extern struct frv_interrupt frv_interrupt_table[];
/* FR-V Interrupt State.
- Interrupts are queued during execution of parallel insns and the interupt(s)
+ Interrupts are queued during execution of parallel insns and the interrupt(s)
to be handled determined by analysing the queue after each VLIW insn. */
#define FRV_INTERRUPT_QUEUE_SIZE (4 * 4) /* 4 interrupts x 4 insns for now. */
diff --git a/sim/frv/interrupts.c b/sim/frv/interrupts.c
index 3f071b8..3d0e0fb 100644
--- a/sim/frv/interrupts.c
+++ b/sim/frv/interrupts.c
@@ -830,7 +830,7 @@ set_exception_status_registers (
{
case FRV_DIVISION_EXCEPTION:
set_isr_exception_fields (current_cpu, item);
- /* fall thru to set reg_index. */
+ /* fall through to set reg_index. */
case FRV_COMMIT_EXCEPTION:
/* For fr550, always use ESR0. */
if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_fr550)
diff --git a/sim/frv/profile.c b/sim/frv/profile.c
index 64c94a6..ebbd222 100644
--- a/sim/frv/profile.c
+++ b/sim/frv/profile.c
@@ -595,14 +595,14 @@ request_complete (SIM_CPU *cpu, CACHE_QUEUE_ELEMENT *q)
}
/* Run the insn and data caches through the given number of cycles, taking
- note of load requests which are fullfilled as a result. */
+ note of load requests which are fulfilled as a result. */
static void
run_caches (SIM_CPU *cpu, int cycles)
{
FRV_CACHE* data_cache = CPU_DATA_CACHE (cpu);
FRV_CACHE* insn_cache = CPU_INSN_CACHE (cpu);
int i;
- /* For each cycle, run the caches, noting which requests have been fullfilled
+ /* For each cycle, run the caches, noting which requests have been fulfilled
and submitting new requests on their designated cycles. */
for (i = 0; i < cycles; ++i)
{
diff --git a/sim/frv/registers.c b/sim/frv/registers.c
index 47154db..663d3f8 100644
--- a/sim/frv/registers.c
+++ b/sim/frv/registers.c
@@ -6432,7 +6432,7 @@ frv_initialize_spr (SIM_CPU *current_cpu)
}
}
- /* Now explicitely set PSR in order to get the correct setting for PSR.S. */
+ /* Now explicitly set PSR in order to get the correct setting for PSR.S. */
spr_control = & control->spr[H_SPR_PSR];
save_mask = spr_control->read_only_mask;
spr_control->read_only_mask = 0;
@@ -6473,7 +6473,7 @@ frv_reset_spr (SIM_CPU *current_cpu)
}
}
- /* Now explicitely set PSR in order to get the correct setting for PSR.S. */
+ /* Now explicitly set PSR in order to get the correct setting for PSR.S. */
spr_control = & control->spr[H_SPR_PSR];
mask = spr_control->reset_mask;
new_val = GET_H_SPR (H_SPR_PSR) & ~mask;
diff --git a/sim/frv/traps.c b/sim/frv/traps.c
index 39e0e34..7b2bf07 100644
--- a/sim/frv/traps.c
+++ b/sim/frv/traps.c
@@ -773,7 +773,7 @@ frvbf_check_swap_address (SIM_CPU *current_cpu, SI address)
if (STATE_ARCHITECTURE (sd)->mach != bfd_mach_fr550)
return;
- /* Adress must be aligned on a word boundary. */
+ /* Address must be aligned on a word boundary. */
if (address & 0x3)
frv_queue_data_access_exception_interrupt (current_cpu);
}
diff --git a/sim/h8300/compile.c b/sim/h8300/compile.c
index c1c61d8..6fe9a45 100644
--- a/sim/h8300/compile.c
+++ b/sim/h8300/compile.c
@@ -1906,7 +1906,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
case 0:
/*
* This opcode is a fake for when we get to an
- * instruction which hasnt been compiled
+ * instruction which hasn't been compiled
*/
compile (sd, pc);
goto top;
diff --git a/sim/igen/gen-engine.c b/sim/igen/gen-engine.c
index 829d6b0..5aced8f 100644
--- a/sim/igen/gen-engine.c
+++ b/sim/igen/gen-engine.c
@@ -67,7 +67,7 @@ print_run_body (lf *file, gen_entry *table)
{
/* Output the function to execute real code:
- Unfortunatly, there are multiple cases to consider vis:
+ Unfortunately, there are multiple cases to consider vis:
<icache> X <smp>
@@ -102,7 +102,7 @@ In this case, we can take advantage of the fact that the current\n\
instruction address (CIA) does not need to be read from / written to\n\
the CPU object after the execution of an instruction.\n\
\n\
-Instead, CIA is only saved when the main loop exits. This occures\n\
+Instead, CIA is only saved when the main loop exits. This occurs\n\
when either sim_engine_halt or sim_engine_restart is called. Both of\n\
these functions save the current instruction address before halting /\n\
restarting the simulator.\n\
diff --git a/sim/igen/gen-icache.c b/sim/igen/gen-icache.c
index 081fdb3..80151fa 100644
--- a/sim/igen/gen-icache.c
+++ b/sim/igen/gen-icache.c
@@ -150,7 +150,7 @@ print_icache_extraction (lf *file,
switch (what_to_declare)
{
case undef_variables:
- /* We've finished with the #define value - destory it */
+ /* We've finished with the #define value - destroy it */
lf_indent_suppress (file);
lf_printf (file, "#undef %s\n", entry_name);
return;
@@ -630,7 +630,7 @@ print_icache_struct (lf *file, insn_table *isa, cache_entry *cache_rules)
else
{
/* alernativly, since no cache, emit a dummy definition for
- idecode_cache so that code refering to the type can still compile */
+ idecode_cache so that code referring to the type can still compile */
lf_printf (file, "typedef void %sidecode_cache;\n",
options.module.global.prefix.l);
}
diff --git a/sim/igen/gen-idecode.c b/sim/igen/gen-idecode.c
index ad9d228..88db06f 100644
--- a/sim/igen/gen-idecode.c
+++ b/sim/igen/gen-idecode.c
@@ -629,7 +629,7 @@ idecode_declare_if_switch (lf *file, gen_entry *table, int depth, void *data)
{
print_idecode_switch_function_header (file,
table,
- 0 /*isnt function definition */ ,
+ 0 /* isn't function definition */ ,
0);
}
}
@@ -862,7 +862,7 @@ print_idecode_validate (lf *file,
proper.
The PowerPC spec requires a CSI after MSR[FP] is changed and when
- ever a CSI occures we flush the instruction cache. */
+ ever a CSI occurs we flush the instruction cache. */
{
if (filter_is_member (instruction->flags, "f"))
diff --git a/sim/igen/gen-semantics.c b/sim/igen/gen-semantics.c
index 0cd4f85..fbb827e 100644
--- a/sim/igen/gen-semantics.c
+++ b/sim/igen/gen-semantics.c
@@ -244,7 +244,7 @@ print_semantic_body (lf *file,
}
/* Architecture expects a REG to be zero. Instead of having to
- check every read to see if it is refering to that REG just zap it
+ check every read to see if it is referring to that REG just zap it
at the start of every instruction */
if (options.gen.zero_reg)
{
diff --git a/sim/igen/gen-semantics.h b/sim/igen/gen-semantics.h
index ed0d3ad..2b55dd3 100644
--- a/sim/igen/gen-semantics.h
+++ b/sim/igen/gen-semantics.h
@@ -34,9 +34,9 @@
o cached - separate cracker and semantic
- Two independant functions are created. Firstly the
+ Two independent functions are created. Firstly the
function that cracks an instruction entering it into a
- cache and secondly the semantic function propper that
+ cache and secondly the semantic function proper that
uses the cache.
o cached - semantic + cracking semantic
@@ -47,7 +47,7 @@
cracker and the semantic function when there is a
cache miss).
- For each of these general forms, several refinements can occure:
+ For each of these general forms, several refinements can occur:
o do/don't duplicate/expand semantic functions
diff --git a/sim/igen/gen.c b/sim/igen/gen.c
index f49b39b..605b78f 100644
--- a/sim/igen/gen.c
+++ b/sim/igen/gen.c
@@ -386,7 +386,7 @@ insn_list_insert (insn_list **cur_insn_ptr,
case report_duplicate_insns:
/* It would appear that we have two instructions with the
same constant field values across all words and bits.
- This error can also occure when insn_field_cmp() is
+ This error can also occur when insn_field_cmp() is
failing to differentiate between two instructions that
differ only in their conditional fields. */
warning (insn->line,
@@ -635,7 +635,7 @@ insns_bit_useless (insn_list *insns, decode_table *rule, int bit_nr)
/* Given only one constant value has been found, check through all
the instructions to see if at least one conditional makes it
- usefull */
+ useful */
if (value >= 0 && is_useless)
{
for (entry = insns; entry != NULL; entry = entry->next)
@@ -972,7 +972,7 @@ gen_entry_expand_opcode (gen_entry *table,
condition->field->last);
/* this is a requirement of
a conditonal field
- refering to another field */
+ referring to another field */
ASSERT ((condition->field->first -
condition->field->last) ==
(first_pos - last_pos));
diff --git a/sim/igen/igen.c b/sim/igen/igen.c
index 9dba48a..5d985a2 100644
--- a/sim/igen/igen.c
+++ b/sim/igen/igen.c
@@ -482,7 +482,7 @@ print_itrace (lf *file, insn_entry * insn, int idecode)
{
/* NB: Here we escape each EOLN. This is so that the the compiler
treats a trace function call as a single line. Consequently any
- errors in the line are refered back to the same igen assembler
+ errors in the line are referred back to the same igen assembler
source line */
const char *phase = (idecode) ? "DECODE" : "INSN";
lf_printf (file, "\n");
diff --git a/sim/igen/igen.h b/sim/igen/igen.h
index f5ccb21..d2980dd 100644
--- a/sim/igen/igen.h
+++ b/sim/igen/igen.h
@@ -136,7 +136,7 @@ struct _igen_decode_options
int combine;
/* Instruction expansion? Should the semantic code for each
- instruction, when the oportunity arrises, be expanded according
+ instruction, when the opportunity arrises, be expanded according
to the variable opcode files that the instruction decode process
renders constant */
int duplicate;
diff --git a/sim/igen/ld-decode.h b/sim/igen/ld-decode.h
index f66c7dc..93808cf 100644
--- a/sim/igen/ld-decode.h
+++ b/sim/igen/ld-decode.h
@@ -87,7 +87,7 @@
If an instruction field was found, enlarge the field size so that
it is forced to at least include bits starting from <force_first>
- (<force_last>). To stop this occuring, use <force_first> = <last>
+ (<force_last>). To stop this occurring, use <force_first> = <last>
+ 1 and <force_last> = <first> - 1.
<force_reserved>
@@ -99,7 +99,7 @@
Treat any contained register (string) fields as constant when
determining the instruction field. For the instruction decode (and
- controled by IDECODE_EXPAND_SEMANTICS) this forces the expansion of
+ controlled by IDECODE_EXPAND_SEMANTICS) this forces the expansion of
what would otherwize be non constant bits of an instruction.
<use_switch>
diff --git a/sim/igen/ld-insn.c b/sim/igen/ld-insn.c
index d30d083..6c061f0 100644
--- a/sim/igen/ld-insn.c
+++ b/sim/igen/ld-insn.c
@@ -201,7 +201,7 @@ parse_insn_word (line_ref *line, char *string, int word_nr)
{
if (strlen_pos == 0)
{
- /* when the length/pos field is omited, an integer field
+ /* when the length/pos field is omitted, an integer field
is always binary */
unsigned64 val = 0;
int i;
@@ -409,7 +409,7 @@ parse_insn_words (insn_entry * insn, char *formats)
insn->word[i] = word;
}
- /* Go over all fields that have conditionals refering to other
+ /* Go over all fields that have conditionals referring to other
fields. Link the fields up. Verify that the two fields have the
same size. Verify that the two fields are different */
{
@@ -442,9 +442,9 @@ parse_insn_words (insn_entry * insn, char *formats)
&& strcmp (refered_field->val_string,
cond->string) == 0)
{
- /* found field being refered to by conditonal */
+ /* found field being referred to by conditonal */
cond->field = refered_field;
- /* check refered to and this field are
+ /* check referred to and this field are
the same size */
if (f->width != refered_field->width)
error (insn->line,
diff --git a/sim/igen/lf.h b/sim/igen/lf.h
index f180c3c..8a0dfa5 100644
--- a/sim/igen/lf.h
+++ b/sim/igen/lf.h
@@ -43,7 +43,7 @@ lf_file_references;
/* Open the file NAME for writing ("-" for stdout). Use REAL_NAME
- when refering to the opened file. Line number information (in the
+ when referring to the opened file. Line number information (in the
output) can be suppressed with FILE_REFERENCES ==
LF_OMIT_REFERENCES. TYPE is to determine the formatting of some of
the print messages below. */
diff --git a/sim/lm32/dv-lm32uart.c b/sim/lm32/dv-lm32uart.c
index 121d9a8..db5d180 100644
--- a/sim/lm32/dv-lm32uart.c
+++ b/sim/lm32/dv-lm32uart.c
@@ -93,7 +93,7 @@ do_uart_tx_event (struct hw *me, void *data)
hw_port_event (me, INT_PORT, 1);
}
- /* Indicate which interrupt has occured. */
+ /* Indicate which interrupt has occurred. */
uart->iir = MICOUART_IIR_TXRDY;
/* Indicate THR is empty. */
diff --git a/sim/m32r/dv-m32r_uart.h b/sim/m32r/dv-m32r_uart.h
index ec0464a..f6ba624 100644
--- a/sim/m32r/dv-m32r_uart.h
+++ b/sim/m32r/dv-m32r_uart.h
@@ -21,7 +21,7 @@
#ifndef DV_M32R_UART_H
#define DV_M32R_UART_H
-/* Should move these settings to a flag to the uart device, and the adresses to
+/* Should move these settings to a flag to the uart device, and the addresses to
the sim-model framework. */
/* Serial device addresses. */
diff --git a/sim/m68hc11/dv-m68hc11sio.c b/sim/m68hc11/dv-m68hc11sio.c
index fe850e4..13e6edb 100644
--- a/sim/m68hc11/dv-m68hc11sio.c
+++ b/sim/m68hc11/dv-m68hc11sio.c
@@ -87,7 +87,7 @@ struct m68hc11sio
is used to find the number of cpu cycles to send/receive a data. */
unsigned int data_length;
- /* Information about next character to be transmited. */
+ /* Information about next character to be transmitted. */
unsigned char tx_has_char;
unsigned char tx_char;
diff --git a/sim/m68hc11/dv-m68hc11spi.c b/sim/m68hc11/dv-m68hc11spi.c
index f078f61..b930082 100644
--- a/sim/m68hc11/dv-m68hc11spi.c
+++ b/sim/m68hc11/dv-m68hc11spi.c
@@ -78,7 +78,7 @@ static const struct hw_port_descriptor m68hc11spi_ports[] =
/* SPI */
struct m68hc11spi
{
- /* Information about next character to be transmited. */
+ /* Information about next character to be transmitted. */
unsigned char tx_char;
int tx_bit;
unsigned char mode;
diff --git a/sim/m68hc11/dv-m68hc11tim.c b/sim/m68hc11/dv-m68hc11tim.c
index 17553b1..a93f2d8 100644
--- a/sim/m68hc11/dv-m68hc11tim.c
+++ b/sim/m68hc11/dv-m68hc11tim.c
@@ -343,7 +343,7 @@ m68hc11tim_timer_event (struct hw *me, void *data)
compare = (cpu->ios[i] << 8) + cpu->ios[i + 1];
- /* See if compare is reached; handle wrap arround. */
+ /* See if compare is reached; handle wrap around. */
if ((compare >= tcnt_prev && compare <= tcnt && tcnt_prev < tcnt)
|| (compare >= tcnt_prev && tcnt_prev > tcnt)
|| (compare < tcnt && tcnt_prev > tcnt))
diff --git a/sim/mips/sim-main.h b/sim/mips/sim-main.h
index 0ea1234..9400559 100644
--- a/sim/mips/sim-main.h
+++ b/sim/mips/sim-main.h
@@ -108,7 +108,7 @@ typedef enum {
/* For some MIPS targets, the HI/LO registers have certain timing
restrictions in that, for instance, a read of a HI register must be
- separated by at least three instructions from a preceeding read.
+ separated by at least three instructions from the preceding read.
The struct below is used to record the last access by each of A MT,
MF or other OP instruction to a HI/LO register. See mips.igen for
@@ -281,7 +281,7 @@ struct _sim_cpu {
#define simPCOC1 (1 << 18) /* COC[1] from previous */
#define simDELAYSLOT (1 << 24) /* 0 = do nothing; 1 = delay slot entry exists */
#define simSKIPNEXT (1 << 25) /* 0 = do nothing; 1 = skip instruction */
-#define simSIGINT (1 << 28) /* 0 = do nothing; 1 = SIGINT has occured */
+#define simSIGINT (1 << 28) /* 0 = do nothing; 1 = SIGINT has occurred */
#define simJALDELAYSLOT (1 << 29) /* 1 = in jal delay slot */
#ifndef ENGINE_ISSUE_PREFIX_HOOK
diff --git a/sim/mn10300/interp.c b/sim/mn10300/interp.c
index 7f0655f..dbab458 100644
--- a/sim/mn10300/interp.c
+++ b/sim/mn10300/interp.c
@@ -180,7 +180,7 @@ sim_open (SIM_OPEN_KIND kind,
sim_hw_parse (sd, "/mn103cpu@0x20000000");
sim_hw_parse (sd, "/mn103cpu@0x20000000/reg 0x20000000 0x42");
- /* DEBUG: ACK output wired upto a glue device */
+ /* DEBUG: ACK output wired up to a glue device */
sim_hw_parse (sd, "/glue@0x20002000");
sim_hw_parse (sd, "/glue@0x20002000/reg 0x20002000 4");
sim_hw_parse (sd, "/mn103cpu > ack int0 /glue@0x20002000");
diff --git a/sim/ppc/altivec_registers.h b/sim/ppc/altivec_registers.h
index 5b2bd02..8155daa 100644
--- a/sim/ppc/altivec_registers.h
+++ b/sim/ppc/altivec_registers.h
@@ -46,7 +46,7 @@ struct altivec_regs {
/* AltiVec endian helpers, wrong endian hosts vs targets need to be
sure to get the right bytes/halfs/words when the order matters.
Note that many AltiVec instructions do not depend on byte order and
- work on N independant bits of data. This is only for the
+ work on N independent bits of data. This is only for the
instructions that actually move data around. */
#if (WITH_HOST_BYTE_ORDER == BIG_ENDIAN)
diff --git a/sim/ppc/basics.h b/sim/ppc/basics.h
index 2b923ea..d92eccb 100644
--- a/sim/ppc/basics.h
+++ b/sim/ppc/basics.h
@@ -90,7 +90,7 @@ typedef enum {
#include "inline.h"
-/* Basic host dependant mess - hopefully <stdio.h> + <stdarg.h> will
+/* Basic host dependent mess - hopefully <stdio.h> + <stdarg.h> will
bring potential conflicts out in the open */
#include <stdarg.h>
diff --git a/sim/ppc/bits.h b/sim/ppc/bits.h
index 58173f7..f31c57a 100644
--- a/sim/ppc/bits.h
+++ b/sim/ppc/bits.h
@@ -197,7 +197,7 @@ INLINE_BITS\
int stop);
/* move a single bit around */
-/* NB: the wierdness (N>O?N-O:0) is to stop a warning from GCC */
+/* NB: the weirdness (N>O?N-O:0) is to stop a warning from GCC */
#define _SHUFFLEDn(N, WORD, OLD, NEW) \
((OLD) < (NEW) \
? (((unsigned##N)(WORD) \
diff --git a/sim/ppc/corefile.h b/sim/ppc/corefile.h
index 9297f3e..e468109 100644
--- a/sim/ppc/corefile.h
+++ b/sim/ppc/corefile.h
@@ -85,7 +85,7 @@ INLINE_CORE\
restarting it.
For callback maps it is possible to further order them by
- specifiying specifying a callback level (eg callback + 1).
+ specifying specifying a callback level (eg callback + 1).
When the core is resolving an access it searches each of the maps
in order. First raw-memory and then callback maps (in assending
@@ -119,7 +119,7 @@ INLINE_CORE\
The operation of mapping between an address and its destination
device or memory array is currently implemented using a simple
linked list. The posibility of replacing this list with a more
- powerfull data structure exists.
+ powerful data structure exists.
*/
@@ -170,8 +170,8 @@ INLINE_CORE\
/* Variable sized read/write
Transfer (zero) a variable size block of data between the host and
- target (possibly byte swapping it). Should any problems occure,
- the number of bytes actually transfered is returned. */
+ target (possibly byte swapping it). Should any problems occur,
+ the number of bytes actually transferred is returned. */
INLINE_CORE\
(unsigned) core_map_read_buffer
@@ -192,7 +192,7 @@ INLINE_CORE\
Transfer a fixed amout of memory between the host and target. The
memory always being translated and the operation always aborting
- should a problem occure */
+ should a problem occur */
#define DECLARE_CORE_WRITE_N(N) \
INLINE_CORE\
diff --git a/sim/ppc/cpu.c b/sim/ppc/cpu.c
index c7e8bdf..9f93ffd 100644
--- a/sim/ppc/cpu.c
+++ b/sim/ppc/cpu.c
@@ -276,7 +276,7 @@ cpu_set_decrementer(cpu *processor,
processor->decrementer_local_time = (event_queue_time(processor->events)
+ decrementer);
if (decrementer < 0 && old_decrementer >= 0)
- /* A decrementer interrupt occures if the sign of the decrement
+ /* A decrementer interrupt occurs if the sign of the decrement
register is changed from positive to negative by the load
instruction */
decrementer_interrupt(processor);
diff --git a/sim/ppc/cpu.h b/sim/ppc/cpu.h
index cb141f2..63f938d 100644
--- a/sim/ppc/cpu.h
+++ b/sim/ppc/cpu.h
@@ -137,7 +137,7 @@ INLINE_CPU\
#if WITH_IDECODE_CACHE_SIZE
-/* Return the cache entry that matches the given CIA. No guarentee
+/* Return the cache entry that matches the given CIA. No guarantee
that the cache entry actually contains the instruction for that
address */
@@ -158,7 +158,7 @@ INLINE_CPU\
inner vm maps, to have the cpu its self provide memory manipulation
functions. (eg cpu_instruction_fetch() cpu_data_read_4())
- Unfortunatly in addition to these functions is the need (for the
+ Unfortunately in addition to these functions is the need (for the
debugger) to be able to read/write to memory in ways that violate
the vm protection (eg store breakpoint instruction in the
instruction map). */
@@ -204,7 +204,7 @@ INLINE_CPU\
/* Registers:
This model exploits the PowerPC's requirement for a synchronization
- to occure after (or before) the update of any context controlling
+ to occurs after (or before) the update of any context controlling
register. All context sync points must call the sync function
below to when ever a synchronization point is reached */
diff --git a/sim/ppc/device.h b/sim/ppc/device.h
index 6fd198d..a4a1e90 100644
--- a/sim/ppc/device.h
+++ b/sim/ppc/device.h
@@ -430,7 +430,7 @@ INLINE_DEVICE\
disks file system. The operations would be implemented using the
basic block I/O model provided by the disk.
- This model includes methods that faciliate the creation of device
+ This model includes methods that facilitate the creation of device
instance and (should a given device support it) standard operations
on those instances.
@@ -514,10 +514,10 @@ INLINE_DEVICE\
cpu *processor,
unsigned_word cia);
-/* This interrupt event will then be propogated to any attached
+/* This interrupt event will then be propagated to any attached
interrupt destinations.
- Any interpretation of PORT and VALUE is model dependant. However
+ Any interpretation of PORT and VALUE is model dependent. However
as guidelines the following are recommended: PCI interrupts a-d
correspond to lines 0-3; level sensative interrupts be requested
with a value of one and withdrawn with a value of 0; edge sensative
diff --git a/sim/ppc/emul_bugapi.c b/sim/ppc/emul_bugapi.c
index e33d0cf..306b177 100644
--- a/sim/ppc/emul_bugapi.c
+++ b/sim/ppc/emul_bugapi.c
@@ -46,7 +46,7 @@
/* EMULATION
- BUG - Motorola's embeded firmware BUG interface
+ BUG - Motorola's embedded firmware BUG interface
DESCRIPTION
@@ -71,7 +71,7 @@
#define _NETWR 0x019 /* Write to host */
#define _NETCFIG 0x01a /* Configure network parameters */
#define _NETOPN 0x01b /* Open file for reading */
-#define _NETFRD 0x01c /* Retreive specified file blocks */
+#define _NETFRD 0x01c /* Retrieve specified file blocks */
#define _NETCTRL 0x01d /* Implement special control functions */
#define _OUTCHR 0x020 /* Output character (pointer / pointer format) */
#define _OUTSTR 0x021 /* Output string (pointer / pointer format) */
diff --git a/sim/ppc/emul_chirp.h b/sim/ppc/emul_chirp.h
index 6e431ba..b4e7016 100644
--- a/sim/ppc/emul_chirp.h
+++ b/sim/ppc/emul_chirp.h
@@ -46,7 +46,7 @@
instruction. By doing this, emul_chirp is able to catch and handle
any invalid data accesses it makes while emulating a client call.
- When such an exception occures, emul_chirp is able to recover by
+ When such an exception occurs, emul_chirp is able to recover by
restoring the processor and then calling the clients callback
interface so that the client can recover from the data exception.
diff --git a/sim/ppc/emul_unix.c b/sim/ppc/emul_unix.c
index 1475474..7ca33e7 100644
--- a/sim/ppc/emul_unix.c
+++ b/sim/ppc/emul_unix.c
@@ -160,7 +160,7 @@ struct _os_emul_data {
\f
/* Emulation of simple UNIX system calls that are common on all systems. */
-/* Structures that are common agmonst the UNIX varients */
+/* Structures that are common among the UNIX variants */
struct unix_timeval {
signed32 tv_sec; /* seconds */
signed32 tv_usec; /* microseconds */
diff --git a/sim/ppc/events.c b/sim/ppc/events.c
index 130b28b..53fa8cc 100644
--- a/sim/ppc/events.c
+++ b/sim/ppc/events.c
@@ -37,7 +37,7 @@
variables.
TIME_OF_EVENT: this holds the time at which the next event is ment
- to occure. If no next event it will hold the time of the last
+ to occur. If no next event it will hold the time of the last
event.
TIME_FROM_EVENT: The current distance from TIME_OF_EVENT. If an
@@ -195,7 +195,7 @@ insert_event_entry(event_queue *events,
if (delta < 0)
error("what is past is past!\n");
- /* compute when the event should occure */
+ /* compute when the event should occur */
time_of_event = event_queue_time(events) + delta;
/* find the queue insertion point - things are time ordered */
diff --git a/sim/ppc/gen-icache.c b/sim/ppc/gen-icache.c
index 8acf3fb..81c4283 100644
--- a/sim/ppc/gen-icache.c
+++ b/sim/ppc/gen-icache.c
@@ -99,7 +99,7 @@ print_icache_extraction(lf *file,
/* Define a storage area for the cache element */
if (what_to_declare == undef_variables) {
- /* We've finished with the value - destory it */
+ /* We've finished with the value - destroy it */
lf_indent_suppress(file);
lf_printf(file, "#undef %s\n", entry_name);
return;
@@ -478,8 +478,8 @@ print_icache_struct(insn_table *instructions,
lf_printf(file, "} idecode_cache;\n");
}
else {
- /* alernativly, since no cache, emit a dummy definition for
- idecode_cache so that code refering to the type can still compile */
+ /* alernatively, since no cache, emit a dummy definition for
+ idecode_cache so that code referring to the type can still compile */
lf_printf(file, "typedef void idecode_cache;\n");
}
lf_printf(file, "\n");
diff --git a/sim/ppc/gen-idecode.c b/sim/ppc/gen-idecode.c
index 256ba75..20398ab 100644
--- a/sim/ppc/gen-idecode.c
+++ b/sim/ppc/gen-idecode.c
@@ -596,7 +596,7 @@ idecode_declare_if_switch(insn_table *table,
&& table->parent->opcode_rule->gen == array_gen) {
print_idecode_switch_function_header(file,
table,
- 0/*isnt function definition*/);
+ 0/* isn't function definition */);
}
}
@@ -691,7 +691,7 @@ print_run_until_stop_body(lf *file,
{
/* Output the function to execute real code:
- Unfortunatly, there are multiple cases to consider vis:
+ Unfortunately, there are multiple cases to consider vis:
<icache> X <smp> X <events> X <keep-running-flag> X ...
@@ -1422,7 +1422,7 @@ print_idecode_validate(lf *file,
proper.
The PowerPC spec requires a CSI after MSR[FP] is changed and when
- ever a CSI occures we flush the instruction cache. */
+ ever a CSI occurs we flush the instruction cache. */
{
if (it_is("f", instruction->file_entry->fields[insn_flags])) {
diff --git a/sim/ppc/gen-semantics.h b/sim/ppc/gen-semantics.h
index 8d1804b..c6b83de 100644
--- a/sim/ppc/gen-semantics.h
+++ b/sim/ppc/gen-semantics.h
@@ -32,9 +32,9 @@
o cached - separate cracker and semantic
- Two independant functions are created. Firstly the
+ Two independent functions are created. Firstly the
function that cracks an instruction entering it into a
- cache and secondly the semantic function propper that
+ cache and secondly the semantic function proper that
uses the cache.
o cached - semantic + cracking semantic
@@ -45,7 +45,7 @@
cracker and the semantic function when there is a
cache miss).
- For each of these general forms, several refinements can occure:
+ For each of these general forms, several refinements can occur:
o do/don't duplicate/expand semantic functions
diff --git a/sim/ppc/hw_cpu.c b/sim/ppc/hw_cpu.c
index df807c1..8857fed 100644
--- a/sim/ppc/hw_cpu.c
+++ b/sim/ppc/hw_cpu.c
@@ -118,7 +118,7 @@ hw_cpu_init_address(device *me)
/* Take the interrupt and synchronize its delivery with the clock. If
we've not yet scheduled an interrupt for the next clock tick, take
- the oportunity to do it now */
+ the opportunity to do it now */
static void
hw_cpu_interrupt_event(device *me,
diff --git a/sim/ppc/hw_eeprom.c b/sim/ppc/hw_eeprom.c
index 3406be9..e9c33fe 100644
--- a/sim/ppc/hw_eeprom.c
+++ b/sim/ppc/hw_eeprom.c
@@ -35,7 +35,7 @@
/* DEVICE
- eeprom - JEDEC? compatible electricaly erasable programable device
+ eeprom - JEDEC? compatible electricaly erasable programmable device
DESCRIPTION
@@ -43,7 +43,7 @@
This device implements a small byte addressable EEPROM.
Programming is performed using the same write sequences as used by
- standard modern EEPROM components. Writes occure in real time, the
+ standard modern EEPROM components. Writes occur in real time, the
device returning a progress value until the programing has been
completed.
diff --git a/sim/ppc/hw_glue.c b/sim/ppc/hw_glue.c
index c824773..b895638 100644
--- a/sim/ppc/hw_glue.c
+++ b/sim/ppc/hw_glue.c
@@ -55,10 +55,10 @@
<<glue>>: In addition to driving its output interrupt port with any
value written to an interrupt input port is stored in the
corresponding <<output>> register. Such input interrupts, however,
- are not propogated to an output interrupt port.
+ are not propagated to an output interrupt port.
<<glue-and>>: The bit-wise AND of the interrupt inputs is computed
- and then both stored in <<output>> register zero and propogated to
+ and then both stored in <<output>> register zero and propagated to
output interrupt output port zero.
diff --git a/sim/ppc/hw_ide.c b/sim/ppc/hw_ide.c
index 9d3a711..c849005 100644
--- a/sim/ppc/hw_ide.c
+++ b/sim/ppc/hw_ide.c
@@ -37,7 +37,7 @@
This device models the primary/secondary <<ide>> controller
described in the [CHRPIO] document.
- The controller has separate independant interrupt outputs for each
+ The controller has separate independent interrupt outputs for each
<<ide>> bus.
@@ -91,7 +91,7 @@
| i0,0,1c,6 1 \
| i0,0,20,0 8' \
- Note: the fouth and fifth reg entries specify that the register is
+ Note: the fourth and fifth reg entries specify that the register is
at an offset into the address specified by the base register
(<<assigned-addresses>>); Apart from restrictions placed by the
<<pci>> specification, no restrictions are placed on the number of
@@ -508,7 +508,7 @@ get_status(device *me,
}
-/* The address presented to the IDE controler is decoded and then
+/* The address presented to the IDE controller is decoded and then
mapped onto a controller:reg pair */
enum {
diff --git a/sim/ppc/hw_init.c b/sim/ppc/hw_init.c
index 0e7403b..327ff14 100644
--- a/sim/ppc/hw_init.c
+++ b/sim/ppc/hw_init.c
@@ -182,7 +182,7 @@ static device_callbacks const hw_file_callbacks = {
eeprom requires a complex sequence of accesses). The
<<real-address>> is specified as <<0x0c00>> which is the offset
into the eeprom. For brevity, most of the eeprom properties have
- been omited.
+ been omitted.
| /iobus/eeprom@0xfff00000/reg 0xfff00000 0x80000
| /openprom/init/data@0xfff00c00/real-address 0x0c00
@@ -576,7 +576,7 @@ create_ppc_elf_stack_frame(device *me,
const unsigned sizeof_argv = sizeof_arguments(argv);
const unsigned_word start_argv = start_envp - sizeof_argv;
- /* link register save address - alligned to a 16byte boundary */
+ /* link register save address - aligned to a 16byte boundary */
const unsigned_word top_of_stack = ((start_argv
- 2 * sizeof(unsigned_word))
& ~0xf);
diff --git a/sim/ppc/hw_opic.c b/sim/ppc/hw_opic.c
index 69d956b..5df02fc 100644
--- a/sim/ppc/hw_opic.c
+++ b/sim/ppc/hw_opic.c
@@ -883,7 +883,7 @@ do_end_of_interrupt_register_N_write(device *me,
DTRACE(opic, ("eoi %d - ignoring nonzero value\n", dest->nr));
}
- /* user doing wierd things? */
+ /* user doing weird things? */
if (dest->current_in_service == NULL) {
DTRACE(opic, ("eoi %d - strange, no current interrupt\n", dest->nr));
return;
diff --git a/sim/ppc/hw_pal.c b/sim/ppc/hw_pal.c
index 0789929..c91f239 100644
--- a/sim/ppc/hw_pal.c
+++ b/sim/ppc/hw_pal.c
@@ -54,7 +54,7 @@
DESCRIPTION
- Typical hardware dependant hack. This device allows the firmware
+ Typical hardware dependent hack. This device allows the firmware
to gain access to all the things the firmware needs (but the OS
doesn't).
diff --git a/sim/ppc/hw_phb.c b/sim/ppc/hw_phb.c
index 8e3fb17..e8f3ac4 100644
--- a/sim/ppc/hw_phb.c
+++ b/sim/ppc/hw_phb.c
@@ -65,7 +65,7 @@
Define a number of mappings from the parent bus to one of this
devices PCI busses. The exact format of the <<parent-phys-addr>>
- is parent bus dependant. The format of <<my-phys-addr>> is
+ is parent bus dependent. The format of <<my-phys-addr>> is
described in the Open Firmware PCI bindings document (note that the
address must be non-relocatable).
@@ -93,7 +93,7 @@
Since device tree entries that are specified on the command line
are added before most of the device tree has been built it is often
- necessary to explictly add certain device properties and thus
+ necessary to explicitly add certain device properties and thus
ensure they are already present in the device tree. For the
<<phb>> one such property is parent busses <<#address-cells>>.
@@ -157,7 +157,7 @@
The Open Firmware PCI bus bindings document (rev 1.6) suggests that
the register field of non-relocatable PCI address should be zero.
- Unfortunatly, PCI addresses specified in the <<assigned-addresses>>
+ Unfortunately, PCI addresses specified in the <<assigned-addresses>>
property must be both non-relocatable and have non-zero register
fields.
@@ -319,7 +319,7 @@ hw_phb_attach_address(device *me,
&& type != hw_phb_subtractive_decode)
device_error(me, "attach type (%d) specified by %s invalid",
type, device_path(client));
- /* attach it to the relevent bus */
+ /* attach it to the relevant bus */
DTRACE(phb, ("attach %s - %s %s:0x%lx (0x%lx bytes)\n",
device_path(client),
hw_phb_decode_name(type),
diff --git a/sim/ppc/hw_trace.c b/sim/ppc/hw_trace.c
index 9490bfb..f7c72fd 100644
--- a/sim/ppc/hw_trace.c
+++ b/sim/ppc/hw_trace.c
@@ -32,7 +32,7 @@
The properties of this device are used, during initialization, to
specify the value various simulation trace options. The
- initialization can occure implicitly (during device tree init) or
+ initialization can occur implicitly (during device tree init) or
explicitly using this devices ioctl method.
The actual options and their default values (for a given target)
diff --git a/sim/ppc/idecode_expression.h b/sim/ppc/idecode_expression.h
index 13f6020..88a55ba 100644
--- a/sim/ppc/idecode_expression.h
+++ b/sim/ppc/idecode_expression.h
@@ -46,7 +46,7 @@
/* 64bit target expressions:
- Unfortunatly 128bit arrithemetic isn't that common. Consequently
+ Unfortunately, 128bit arithmetics isn't that common. Consequently
the 32/64 bit trick can not be used. Instead all calculations are
required to retain carry/overflow information in separate
variables. Even with this restriction it is still possible for the
diff --git a/sim/ppc/igen.h b/sim/ppc/igen.h
index 052806a..813632c 100644
--- a/sim/ppc/igen.h
+++ b/sim/ppc/igen.h
@@ -41,7 +41,7 @@ typedef enum {
generate_calls = 0x100,
- /* In addition, when refering to fields access them directly instead
+ /* In addition, when referring to fields access them directly instead
of via variables */
generate_calls_with_direct_access
@@ -116,7 +116,7 @@ extern int icache_size;
/* Instruction expansion?
- Should the semantic code for each instruction, when the oportunity
+ Should the semantic code for each instruction, when the opportunity
arrises, be expanded according to the variable opcode files that
the instruction decode process renders constant */
diff --git a/sim/ppc/interrupts.h b/sim/ppc/interrupts.h
index 7171129..708d47c 100644
--- a/sim/ppc/interrupts.h
+++ b/sim/ppc/interrupts.h
@@ -31,9 +31,9 @@
Interrupts that must immediately force either an abort or restart
of a current instruction are implemented by forcing an instruction
restart. (or to put it another way, long jump). In looking at the
- code it may occure to you that, for some interrupts, they could
+ code it may occur to you that, for some interrupts, they could
return instead of restarting the cpu (eg system_call). While true
- (it once was like that) I've decided to make the behavour of all
+ (it once was like that) I've decided to make the behaviour of all
interrupt routines roughly identical.
Because, a cpu's recorded state (ie what is in the cpu structure)
diff --git a/sim/ppc/ld-decode.h b/sim/ppc/ld-decode.h
index 3e64477..9833393 100644
--- a/sim/ppc/ld-decode.h
+++ b/sim/ppc/ld-decode.h
@@ -52,7 +52,7 @@
If an instruction field was found, enlarge the field size so that
it is forced to at least include bits starting from <force_first>
- (<force_last>). To stop this occuring, use <force_first> = <last>
+ (<force_last>). To stop this occurring, use <force_first> = <last>
+ 1 and <force_last> = <first> - 1.
<force_slash>
@@ -64,7 +64,7 @@
Treat any contained register (string) fields as constant when
determining the instruction field. For the instruction decode (and
- controled by IDECODE_EXPAND_SEMANTICS) this forces the expansion of
+ controlled by IDECODE_EXPAND_SEMANTICS) this forces the expansion of
what would otherwize be non constant bits of an instruction.
<use_switch>
diff --git a/sim/ppc/main.c b/sim/ppc/main.c
index 667c02f..9ca371d 100644
--- a/sim/ppc/main.c
+++ b/sim/ppc/main.c
@@ -252,7 +252,7 @@ zalloc(long size)
return memory;
}
-/* When a CNTRL-C occures, queue an event to shut down the simulation */
+/* When a CNTRL-C occurs, queue an event to shut down the simulation */
static RETSIGTYPE
cntrl_c(int sig)
diff --git a/sim/ppc/os_emul.h b/sim/ppc/os_emul.h
index fdc2579..1ac10e0 100644
--- a/sim/ppc/os_emul.h
+++ b/sim/ppc/os_emul.h
@@ -35,7 +35,7 @@ INLINE_OS_EMUL\
/* System-call emulation - for user code. Instead of trapping system
- calls to kernel mode, the simulator emulates the kernels behavour */
+ calls to kernel mode, the simulator emulates the kernels behaviour */
INLINE_OS_EMUL\
(void) os_emul_system_call
@@ -47,7 +47,7 @@ INLINE_OS_EMUL\
instructions are added to the instruction table that when executed
call this emulation function. The instruction call emulator should
verify the address that the instruction appears before emulating
- the required behavour. If the verification fails, a zero value
+ the required behaviour. If the verification fails, a zero value
should be returned (indicating instruction illegal). */
INLINE_OS_EMUL\
diff --git a/sim/ppc/psim.c b/sim/ppc/psim.c
index 3e322e3..78ccfed 100644
--- a/sim/ppc/psim.c
+++ b/sim/ppc/psim.c
@@ -390,7 +390,7 @@ psim_options(device *root,
argp += 1;
}
/* force the trace node to process its options now *before* the tree
- initialization occures */
+ initialization occurs */
device_ioctl(tree_find_device(root, "/openprom/trace"),
NULL, 0,
device_ioctl_set_trace);
@@ -990,7 +990,7 @@ psim_write_register(psim *system,
processor = system->processors[which_cpu];
- /* If the data is comming in raw (target order), need to cook it
+ /* If the data is coming in raw (target order), need to cook it
into host order before putting it into PSIM's internal structures */
if (mode == raw_transfer) {
switch (description.size) {
diff --git a/sim/ppc/sim-endian.h b/sim/ppc/sim-endian.h
index 9a87333..8d7a893 100644
--- a/sim/ppc/sim-endian.h
+++ b/sim/ppc/sim-endian.h
@@ -60,7 +60,7 @@ INLINE_PSIM_ENDIAN(unsigned_4) endian_le2h_4(unsigned_4 x);
INLINE_PSIM_ENDIAN(unsigned_8) endian_le2h_8(unsigned_8 x);
-/* Host dependant:
+/* Host dependent:
The CPP below defines information about the compilation host. In
particular it defines the macro's:
diff --git a/sim/ppc/sim_calls.c b/sim/ppc/sim_calls.c
index 470c958..25f5f04 100644
--- a/sim/ppc/sim_calls.c
+++ b/sim/ppc/sim_calls.c
@@ -18,7 +18,7 @@
*/
-#include <signal.h> /* FIXME - should be machine dependant version */
+#include <signal.h> /* FIXME - should be machine dependent version */
#include <stdarg.h>
#include <ctype.h>
diff --git a/sim/ppc/std-config.h b/sim/ppc/std-config.h
index 7e6b8c2..2c2e751 100644
--- a/sim/ppc/std-config.h
+++ b/sim/ppc/std-config.h
@@ -102,7 +102,7 @@ extern int current_target_byte_order;
expect to see (VEA includes things like coherency and the time
base) while OEA is what an operating system expects to see. By
setting these to specific values, the build process is able to
- eliminate non relevent environment code
+ eliminate non relevant environment code
CURRENT_ENVIRONMENT specifies which of vea or oea is required for
the current runtime. */
@@ -126,7 +126,7 @@ extern int current_environment;
/* Events. Devices modeling real H/W need to be able to efficiently
schedule things to do at known times in the future. The event
- queue implements this. Unfortunatly this adds the need to check
+ queue implements this. Unfortunately this adds the need to check
for any events once each full instruction cycle. */
#define WITH_EVENTS (WITH_ENVIRONMENT != USER_ENVIRONMENT)
@@ -182,7 +182,7 @@ extern int current_environment;
This model. Instead allows both little and big endian modes to
either take exceptions or handle miss aligned transfers.
- If 0 is specified then for big-endian mode miss alligned accesses
+ If 0 is specified then for big-endian mode miss aligned accesses
are permitted (NONSTRICT_ALIGNMENT) while in little-endian mode the
processor will fault on them (STRICT_ALIGNMENT). */
@@ -285,7 +285,7 @@ extern int current_stdio;
speed improvement (x3-x5). In the case of RISC (sparc) while the
performance gain isn't as great it is still significant.
- Each module is controled by the macro <module>_INLINE which can
+ Each module is controlled by the macro <module>_INLINE which can
have the values described below
0 Do not inline any thing for the given module
@@ -385,7 +385,7 @@ extern int current_stdio;
Prefix to any declaration of a global object (function or
variable) that should not be inlined and should have only one
definition. The #ifndef wrapper goes around the definition
- propper to ensure that only one copy is generated.
+ proper to ensure that only one copy is generated.
nb: this will not work when a module is being inlined for every
use.
@@ -494,7 +494,7 @@ extern int current_stdio;
#define MON_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0)
#endif
-/* Code called on the rare occasions that an interrupt occures. */
+/* Code called on the rare occasions that an interrupt occurs. */
#ifndef INTERRUPTS_INLINE
#define INTERRUPTS_INLINE DEFAULT_INLINE
diff --git a/sim/ppc/tree.c b/sim/ppc/tree.c
index 5d20bf4..45fdc93 100644
--- a/sim/ppc/tree.c
+++ b/sim/ppc/tree.c
@@ -454,7 +454,7 @@ count_entries(device *current,
-/* parse: <address> ::= <token> ; device dependant */
+/* parse: <address> ::= <token> ; device dependent */
STATIC_INLINE_TREE\
(const char *)
@@ -1230,7 +1230,7 @@ tree_find_device(device *root,
/* parse the path */
split_device_specifier(root, path_to_device, &spec);
if (spec.value != NULL)
- return NULL; /* something wierd */
+ return NULL; /* something weird */
/* now find it */
node = split_find_device(root, &spec);
diff --git a/sim/ppc/tree.h b/sim/ppc/tree.h
index 165612c..6f2eed2 100644
--- a/sim/ppc/tree.h
+++ b/sim/ppc/tree.h
@@ -35,7 +35,7 @@
This function accepts a printf style formatted string as the
argument that describes the entry. Any properties or interrupt
connections added to a device tree using this function are marked
- as having a permenant disposition. When the tree is (re)
+ as having a permanent disposition. When the tree is (re)
initialized they will be restored to their initial value.
*/
@@ -129,7 +129,7 @@ INLINE_TREE\
Once a device tree has been created the <<device_tree_init()>>
function is used to initialize it. The exact sequence of events
- that occure during initialization are described separatly.
+ that occur during initialization is described separately.
*/
diff --git a/sim/ppc/vm.c b/sim/ppc/vm.c
index 8cf4e8f..71e2c73 100644
--- a/sim/ppc/vm.c
+++ b/sim/ppc/vm.c
@@ -444,7 +444,7 @@ om_write_word(om_map *map,
}
-/* Bring things into existance */
+/* Bring things into existence */
INLINE_VM\
(vm *)
diff --git a/sim/ppc/vm.h b/sim/ppc/vm.h
index 63dc23c..f010664 100644
--- a/sim/ppc/vm.h
+++ b/sim/ppc/vm.h
@@ -59,8 +59,8 @@ INLINE_VM\
unsigned_word cia);
-/* generic block transfers. Dependant on the presence of the
- PROCESSOR arg, either returns the number of bytes transfered or (if
+/* generic block transfers. Dependent on the presence of the
+ PROCESSOR arg, either returns the number of bytes transferred or (if
PROCESSOR is non NULL) aborts the simulation */
INLINE_VM\
diff --git a/sim/sh/interp.c b/sim/sh/interp.c
index 32618ba..6793997 100644
--- a/sim/sh/interp.c
+++ b/sim/sh/interp.c
@@ -158,7 +158,7 @@ static int maskl = 0;
/* Alternate bank of registers r0-r7 */
-/* Note: code controling SR handles flips between BANK0 and BANK1 */
+/* Note: code controlling SR handles flips between BANK0 and BANK1 */
#define Rn_BANK(n) (saved_state.asregs.cregs.named.bank[(n)])
#define SET_Rn_BANK(n, EXP) do { saved_state.asregs.cregs.named.bank[(n)] = (EXP); } while (0)
@@ -738,7 +738,7 @@ static int nsamples;
#define SSR1 (0x05FFFECC) /* Channel 1 serial status register */
#define RDR1 (0x05FFFECD) /* Channel 1 receive data register */
-#define SCI_RDRF 0x40 /* Recieve data register full */
+#define SCI_RDRF 0x40 /* Receive data register full */
#define SCI_TDRE 0x80 /* Transmit data register empty */
static int
@@ -1269,7 +1269,7 @@ macl (int *regs, unsigned char *memory, int n, int m)
mach |= 0xffff8000; /* Sign extend higher 16 bits */
}
else
- mach = mach & 0x00007fff; /* Postive Result */
+ mach = mach & 0x00007fff; /* Positive Result */
}
MACL = macl;
diff --git a/sim/sh/sim-main.h b/sim/sh/sim-main.h
index 4af7b03..b07a029 100644
--- a/sim/sh/sim-main.h
+++ b/sim/sh/sim-main.h
@@ -40,7 +40,7 @@ typedef union
out-of-bounds accesses of sregs.i . This wart of the code could be
fixed by making fregs part of sregs, and including pc too - to avoid
alignment repercussions - but this would cause very onerous union /
- structure nesting, which would only be managable with anonymous
+ structure nesting, which would only be manageable with anonymous
unions and structs. */
union
{
diff --git a/sim/v850/sim-main.h b/sim/v850/sim-main.h
index e7276a6..41bb2eb 100644
--- a/sim/v850/sim-main.h
+++ b/sim/v850/sim-main.h
@@ -35,7 +35,7 @@ typedef struct _v850_regs {
reg_t mpu0_sregs[28]; /* mpu0 system registers */
reg_t mpu1_sregs[28]; /* mpu1 system registers */
reg_t fpu_sregs[28]; /* fpu system registers */
- reg_t selID_sregs[7][32]; /* system registers, selID 1 thru selID 7 */
+ reg_t selID_sregs[7][32]; /* system registers, selID 1 through selID 7 */
reg64_t vregs[32]; /* vector registers. */
} v850_regs;
diff --git a/sim/v850/simops.c b/sim/v850/simops.c
index 40d578e..7714dd9 100644
--- a/sim/v850/simops.c
+++ b/sim/v850/simops.c
@@ -360,7 +360,7 @@ Multiply64 (int sign, unsigned long op0)
hi = (((op0 >> 16) & 0xFFFF) * ((op1 >> 16) & 0xFFFF));
/* We now need to add all of these results together, taking care
- to propogate the carries from the additions: */
+ to propagate the carries from the additions: */
RdLo = Add32 (lo, (mid1 << 16), & carry);
RdHi = carry;
RdLo = Add32 (RdLo, (mid2 << 16), & carry);
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 05/23] Fix spelling mistakes in comments in configure scripts
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
` (5 preceding siblings ...)
2016-11-20 17:39 ` [PATCH 04/23] Fix spelling mistakes in comments in C source files (rest of modules) Ambrogino Modigliani
@ 2016-11-20 17:39 ` Ambrogino Modigliani
2016-11-22 15:55 ` Pedro Alves
2016-11-20 17:39 ` [PATCH 06/23] Fix spelling mistakes in comments in makefiles Ambrogino Modigliani
` (15 subsequent siblings)
22 siblings, 1 reply; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:39 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
All changes are limited to comments, and no run-time behavior is
affected.
bfd/ChangeLog:
* bfd/configure: Fix spelling in comments.
* bfd/configure.ac: Fix spelling in comments.
binutils/ChangeLog:
* binutils/configure: Fix spelling in comments.
gdb/ChangeLog:
* gdb/configure: Fix spelling in comments.
* gdb/configure.ac: Fix spelling in comments.
gas/ChangeLog:
* gas/configure: Fix spelling in comments.
gold/ChangeLog:
* gold/configure: Fix spelling in comments.
gprof/ChangeLog:
* gprof/configure: Fix spelling in comments.
ld/ChangeLog:
* ld/configure: Fix spelling in comments.
libiberty/ChangeLog:
* libiberty/configure: Fix spelling in comments.
* libiberty/configure.ac: Fix spelling in comments.
opcodes/ChangeLog:
* opcodes/configure: Fix spelling in comments.
sim/mips/ChangeLog:
* sim/mips/configure: Fix spelling in comments.
* sim/mips/configure.ac: Fix spelling in comments.
---
bfd/configure | 4 ++--
bfd/configure.ac | 2 +-
binutils/configure | 2 +-
gas/configure | 2 +-
gdb/configure | 2 +-
gdb/configure.ac | 2 +-
gold/configure | 2 +-
gprof/configure | 2 +-
ld/configure | 2 +-
libiberty/configure | 10 +++++-----
libiberty/configure.ac | 10 +++++-----
opcodes/configure | 2 +-
sim/mips/configure | 4 ++--
sim/mips/configure.ac | 4 ++--
14 files changed, 25 insertions(+), 25 deletions(-)
diff --git a/bfd/configure b/bfd/configure
index 68db12f..ab239fe 100755
--- a/bfd/configure
+++ b/bfd/configure
@@ -12291,7 +12291,7 @@ fi
rm -f conftest*
-# Verify CC_FOR_BUILD to be compatible with waring flags
+# Verify CC_FOR_BUILD to be compatible with warning flags
# Add -Wshadow if the compiler is a sufficiently recent version of GCC.
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
@@ -15805,7 +15805,7 @@ fi
-# Determine the host dependant file_ptr a.k.a. off_t type. In order
+# Determine the host dependent file_ptr a.k.a. off_t type. In order
# prefer: off64_t - if ftello64 and fseeko64, off_t - if ftello and
# fseeko, long. This assumes that sizeof off_t is .ge. sizeof long.
# Hopefully a reasonable assumption since fseeko et.al. should be
diff --git a/bfd/configure.ac b/bfd/configure.ac
index 6f11d29..3254dae 100644
--- a/bfd/configure.ac
+++ b/bfd/configure.ac
@@ -1156,7 +1156,7 @@ fi
AC_SUBST(supports_plugins)
AC_SUBST(lt_cv_dlopen_libs)
-# Determine the host dependant file_ptr a.k.a. off_t type. In order
+# Determine the host dependent file_ptr a.k.a. off_t type. In order
# prefer: off64_t - if ftello64 and fseeko64, off_t - if ftello and
# fseeko, long. This assumes that sizeof off_t is .ge. sizeof long.
# Hopefully a reasonable assumption since fseeko et.al. should be
diff --git a/binutils/configure b/binutils/configure
index 610d07e..fe314e4 100755
--- a/binutils/configure
+++ b/binutils/configure
@@ -11996,7 +11996,7 @@ fi
rm -f conftest*
-# Verify CC_FOR_BUILD to be compatible with waring flags
+# Verify CC_FOR_BUILD to be compatible with warning flags
# Add -Wshadow if the compiler is a sufficiently recent version of GCC.
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
diff --git a/gas/configure b/gas/configure
index 08d4ed0..9203320 100755
--- a/gas/configure
+++ b/gas/configure
@@ -11772,7 +11772,7 @@ fi
rm -f conftest*
-# Verify CC_FOR_BUILD to be compatible with waring flags
+# Verify CC_FOR_BUILD to be compatible with warning flags
# Add -Wshadow if the compiler is a sufficiently recent version of GCC.
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
diff --git a/gdb/configure b/gdb/configure
index 2abfbff..6df88d9 100755
--- a/gdb/configure
+++ b/gdb/configure
@@ -8855,7 +8855,7 @@ fi
# Since GDB uses Readline, we need termcap functionality. In many
# cases this will be provided by the curses library, but some systems
-# have a seperate termcap library, or no curses library at all.
+# have a separate termcap library, or no curses library at all.
case $host_os in
cygwin*)
diff --git a/gdb/configure.ac b/gdb/configure.ac
index 585f147..4b931bf 100644
--- a/gdb/configure.ac
+++ b/gdb/configure.ac
@@ -597,7 +597,7 @@ fi
# Since GDB uses Readline, we need termcap functionality. In many
# cases this will be provided by the curses library, but some systems
-# have a seperate termcap library, or no curses library at all.
+# have a separate termcap library, or no curses library at all.
case $host_os in
cygwin*)
diff --git a/gold/configure b/gold/configure
index a3ed5c9..cb020be 100755
--- a/gold/configure
+++ b/gold/configure
@@ -6774,7 +6774,7 @@ fi
rm -f conftest*
-# Verify CC_FOR_BUILD to be compatible with waring flags
+# Verify CC_FOR_BUILD to be compatible with warning flags
# Add -Wshadow if the compiler is a sufficiently recent version of GCC.
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
diff --git a/gprof/configure b/gprof/configure
index 97363ee..0d5f8a2 100755
--- a/gprof/configure
+++ b/gprof/configure
@@ -12152,7 +12152,7 @@ fi
rm -f conftest*
-# Verify CC_FOR_BUILD to be compatible with waring flags
+# Verify CC_FOR_BUILD to be compatible with warning flags
# Add -Wshadow if the compiler is a sufficiently recent version of GCC.
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
diff --git a/ld/configure b/ld/configure
index 3f82f35..e6bed08 100755
--- a/ld/configure
+++ b/ld/configure
@@ -15609,7 +15609,7 @@ fi
rm -f conftest*
-# Verify CC_FOR_BUILD to be compatible with waring flags
+# Verify CC_FOR_BUILD to be compatible with warning flags
# Add -Wshadow if the compiler is a sufficiently recent version of GCC.
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
diff --git a/libiberty/configure b/libiberty/configure
index 5c4dda5..9227d66 100755
--- a/libiberty/configure
+++ b/libiberty/configure
@@ -5440,7 +5440,7 @@ _ACEOF
-# Check for presense of long long
+# Check for presence of long long
ac_fn_c_check_type "$LINENO" "long long" "ac_cv_type_long_long" "$ac_includes_default"
if test "x$ac_cv_type_long_long" = x""yes; then :
@@ -5943,8 +5943,8 @@ _ACEOF
esac
done
- # newlib doesnt provide any of the variables in $vars, so we
- # dont have to check them here.
+ # newlib doesn't provide any of the variables in $vars, so we
+ # don't have to check them here.
# Of the functions in $checkfuncs, newlib only has strerror.
$as_echo "#define HAVE_STRERROR 1" >>confdefs.h
@@ -6106,8 +6106,8 @@ _ACEOF
esac
done
- # Mingw doesnt provide any of the variables in $vars, so we
- # dont have to check them here.
+ # Mingw doesn't provide any of the variables in $vars, so we
+ # don't have to check them here.
# Of the functions in $checkfuncs, Mingw only has strerror.
$as_echo "#define HAVE_STRERROR 1" >>confdefs.h
diff --git a/libiberty/configure.ac b/libiberty/configure.ac
index 1aa0c7c..0d2dccd 100644
--- a/libiberty/configure.ac
+++ b/libiberty/configure.ac
@@ -279,7 +279,7 @@ AC_CHECK_SIZEOF([int])
AC_CHECK_SIZEOF([long])
AC_CHECK_SIZEOF([size_t])
-# Check for presense of long long
+# Check for presence of long long
AC_CHECK_TYPE([long long],
[AC_DEFINE(HAVE_LONG_LONG, 1, [Define if you have the `long long' type.]) AC_CHECK_SIZEOF([long long])],
[])
@@ -457,8 +457,8 @@ if test -n "${with_target_subdir}"; then
esac
done
- # newlib doesnt provide any of the variables in $vars, so we
- # dont have to check them here.
+ # newlib doesn't provide any of the variables in $vars, so we
+ # don't have to check them here.
# Of the functions in $checkfuncs, newlib only has strerror.
AC_DEFINE(HAVE_STRERROR)
@@ -506,8 +506,8 @@ if test -n "${with_target_subdir}"; then
esac
done
- # Mingw doesnt provide any of the variables in $vars, so we
- # dont have to check them here.
+ # Mingw doesn't provide any of the variables in $vars, so we
+ # don't have to check them here.
# Of the functions in $checkfuncs, Mingw only has strerror.
AC_DEFINE(HAVE_STRERROR)
diff --git a/opcodes/configure b/opcodes/configure
index 6ef3844..0e1dd18 100755
--- a/opcodes/configure
+++ b/opcodes/configure
@@ -11559,7 +11559,7 @@ fi
rm -f conftest*
-# Verify CC_FOR_BUILD to be compatible with waring flags
+# Verify CC_FOR_BUILD to be compatible with warning flags
# Add -Wshadow if the compiler is a sufficiently recent version of GCC.
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
diff --git a/sim/mips/configure b/sim/mips/configure
index 94e75a5..3a86322 100755
--- a/sim/mips/configure
+++ b/sim/mips/configure
@@ -14076,7 +14076,7 @@ __EOF__
for fc in ${sim_multi_configs}; do
# Split up the entry. ${c} contains the first three elements.
- # Note: outer sqaure brackets are m4 quotes.
+ # Note: outer square brackets are m4 quotes.
c=`echo ${fc} | sed 's/:[^:]*$//'`
bfdmachs=`echo ${fc} | sed 's/.*://'`
name=`echo ${c} | sed 's/:.*//'`
@@ -14188,7 +14188,7 @@ __EOF__
for fc in ${sim_multi_configs}; do
# Split up the entry. ${c} contains the first three elements.
- # Note: outer sqaure brackets are m4 quotes.
+ # Note: outer square brackets are m4 quotes.
c=`echo ${fc} | sed 's/:[^:]*$//'`
bfdmachs=`echo ${fc} | sed 's/.*://'`
diff --git a/sim/mips/configure.ac b/sim/mips/configure.ac
index 823a00c..67a6f25 100644
--- a/sim/mips/configure.ac
+++ b/sim/mips/configure.ac
@@ -272,7 +272,7 @@ __EOF__
for fc in ${sim_multi_configs}; do
# Split up the entry. ${c} contains the first three elements.
- # Note: outer sqaure brackets are m4 quotes.
+ # Note: outer square brackets are m4 quotes.
c=`echo ${fc} | sed ['s/:[^:]*$//']`
bfdmachs=`echo ${fc} | sed 's/.*://'`
name=`echo ${c} | sed 's/:.*//'`
@@ -384,7 +384,7 @@ __EOF__
for fc in ${sim_multi_configs}; do
# Split up the entry. ${c} contains the first three elements.
- # Note: outer sqaure brackets are m4 quotes.
+ # Note: outer square brackets are m4 quotes.
c=`echo ${fc} | sed ['s/:[^:]*$//']`
bfdmachs=`echo ${fc} | sed 's/.*://'`
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 04/23] Fix spelling mistakes in comments in C source files (rest of modules)
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
` (4 preceding siblings ...)
2016-11-20 17:39 ` [PATCH 07/23] Fix spelling mistakes in comments in shell scripts Ambrogino Modigliani
@ 2016-11-20 17:39 ` Ambrogino Modigliani
2016-11-20 17:39 ` [PATCH 05/23] Fix spelling mistakes in comments in configure scripts Ambrogino Modigliani
` (16 subsequent siblings)
22 siblings, 0 replies; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:39 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
binutils/ChangeLog:
* binutils/dwarf.c: Fix spelling in comments.
* binutils/dwarf.h: Fix spelling in comments.
* binutils/objcopy.c: Fix spelling in comments.
* binutils/od-macho.c: Fix spelling in comments.
* binutils/rclex.c: Fix spelling in comments.
* binutils/readelf.c: Fix spelling in comments.
* binutils/stabs.c: Fix spelling in comments.
gas/ChangeLog:
* gas/as.h: Fix spelling in comments.
* gas/config/obj-ecoff.c: Fix spelling in comments.
* gas/config/obj-macho.c: Fix spelling in comments.
* gas/config/tc-aarch64.c: Fix spelling in comments.
* gas/config/tc-arc.c: Fix spelling in comments.
* gas/config/tc-arm.c: Fix spelling in comments.
* gas/config/tc-avr.c: Fix spelling in comments.
* gas/config/tc-cr16.c: Fix spelling in comments.
* gas/config/tc-epiphany.c: Fix spelling in comments.
* gas/config/tc-frv.c: Fix spelling in comments.
* gas/config/tc-hppa.c: Fix spelling in comments.
* gas/config/tc-hppa.h: Fix spelling in comments.
* gas/config/tc-i370.c: Fix spelling in comments.
* gas/config/tc-m68hc11.c: Fix spelling in comments.
* gas/config/tc-m68k.c: Fix spelling in comments.
* gas/config/tc-mcore.c: Fix spelling in comments.
* gas/config/tc-mep.c: Fix spelling in comments.
* gas/config/tc-metag.c: Fix spelling in comments.
* gas/config/tc-mips.c: Fix spelling in comments.
* gas/config/tc-mn10200.c: Fix spelling in comments.
* gas/config/tc-mn10300.c: Fix spelling in comments.
* gas/config/tc-nds32.c: Fix spelling in comments.
* gas/config/tc-nios2.c: Fix spelling in comments.
* gas/config/tc-ns32k.c: Fix spelling in comments.
* gas/config/tc-pdp11.c: Fix spelling in comments.
* gas/config/tc-ppc.c: Fix spelling in comments.
* gas/config/tc-riscv.c: Fix spelling in comments.
* gas/config/tc-rx.c: Fix spelling in comments.
* gas/config/tc-score.c: Fix spelling in comments.
* gas/config/tc-score7.c: Fix spelling in comments.
* gas/config/tc-sparc.c: Fix spelling in comments.
* gas/config/tc-tic54x.c: Fix spelling in comments.
* gas/config/tc-vax.c: Fix spelling in comments.
* gas/config/tc-xgate.h: Fix spelling in comments.
* gas/config/tc-xtensa.c: Fix spelling in comments.
* gas/config/tc-z80.c: Fix spelling in comments.
* gas/dwarf2dbg.c: Fix spelling in comments.
* gas/input-file.h: Fix spelling in comments.
* gas/itbl-ops.c: Fix spelling in comments.
* gas/read.c: Fix spelling in comments.
* gas/stabs.c: Fix spelling in comments.
* gas/symbols.c: Fix spelling in comments.
* gas/testsuite/gas/all/itbl-test.c: Fix spelling in comments.
* gas/testsuite/gas/tic4x/opclasses.h: Fix spelling in comments.
* gas/write.c: Fix spelling in comments.
gold/ChangeLog:
* gold/aarch64.cc: Fix spelling in comments.
* gold/arm.cc: Fix spelling in comments.
* gold/icf.cc: Fix spelling in comments.
* gold/layout.cc: Fix spelling in comments.
* gold/layout.h: Fix spelling in comments.
* gold/mips.cc: Fix spelling in comments.
* gold/output.h: Fix spelling in comments.
* gold/plugin.h: Fix spelling in comments.
* gold/script-sections.h: Fix spelling in comments.
* gold/script.h: Fix spelling in comments.
* gold/stringpool.h: Fix spelling in comments.
* gold/tilegx.cc: Fix spelling in comments.
gprof/ChangeLog:
* gprof/basic_blocks.c: Fix spelling in comments.
* gprof/cg_arcs.c: Fix spelling in comments.
* gprof/cg_print.c: Fix spelling in comments.
* gprof/corefile.c: Fix spelling in comments.
include/ChangeLog:
* include/ansidecl.h: Fix spelling in comments.
* include/aout/aout64.h: Fix spelling in comments.
* include/aout/encap.h: Fix spelling in comments.
* include/aout/ranlib.h: Fix spelling in comments.
* include/coff/internal.h: Fix spelling in comments.
* include/coff/sym.h: Fix spelling in comments.
* include/coff/xcoff.h: Fix spelling in comments.
* include/elf/common.h: Fix spelling in comments.
* include/elf/ia64.h: Fix spelling in comments.
* include/elf/metag.h: Fix spelling in comments.
* include/elf/nds32.h: Fix spelling in comments.
* include/gdb/callback.h: Fix spelling in comments.
* include/gdb/remote-sim.h: Fix spelling in comments.
* include/mach-o/arm.h: Fix spelling in comments.
* include/opcode/alpha.h: Fix spelling in comments.
* include/opcode/arc.h: Fix spelling in comments.
* include/opcode/hppa.h: Fix spelling in comments.
* include/opcode/ppc.h: Fix spelling in comments.
* include/opcode/tic4x.h: Fix spelling in comments.
* include/opcode/tic6x-insn-formats.h: Fix spelling in comments.
* include/opcode/tic80.h: Fix spelling in comments.
* include/safe-ctype.h: Fix spelling in comments.
* include/splay-tree.h: Fix spelling in comments.
intl/ChangeLog:
* intl/dcigettext.c: Fix spelling in comments.
* intl/plural.c: Fix spelling in comments.
ld/ChangeLog:
* ld/deffile.h: Fix spelling in comments.
* ld/ld.h: Fix spelling in comments.
* ld/ldlang.c: Fix spelling in comments.
* ld/ldmisc.c: Fix spelling in comments.
* ld/pe-dll.c: Fix spelling in comments.
libdecnumber/ChangeLog:
* libdecnumber/decBasic.c: Fix spelling in comments.
libiberty/ChangeLog:
* libiberty/bcopy.c: Fix spelling in comments.
* libiberty/cp-demangle.c: Fix spelling in comments.
* libiberty/cplus-dem.c: Fix spelling in comments.
* libiberty/make-relative-prefix.c: Fix spelling in comments.
* libiberty/pex-win32.c: Fix spelling in comments.
* libiberty/random.c: Fix spelling in comments.
* libiberty/regex.c: Fix spelling in comments.
* libiberty/simple-object-mach-o.c: Fix spelling in comments.
* libiberty/strsignal.c: Fix spelling in comments.
opcodes/ChangeLog:
* opcodes/aarch64-asm.c: Fix spelling in comments.
* opcodes/aarch64-dis.c: Fix spelling in comments.
* opcodes/arc-dis.c: Fix spelling in comments.
* opcodes/arm-dis.c: Fix spelling in comments.
* opcodes/cgen-asm.c: Fix spelling in comments.
* opcodes/cgen-dis.c: Fix spelling in comments.
* opcodes/cgen-opc.c: Fix spelling in comments.
* opcodes/dis-buf.c: Fix spelling in comments.
* opcodes/epiphany-asm.c: Fix spelling in comments.
* opcodes/epiphany-dis.c: Fix spelling in comments.
* opcodes/fr30-asm.c: Fix spelling in comments.
* opcodes/fr30-dis.c: Fix spelling in comments.
* opcodes/frv-asm.c: Fix spelling in comments.
* opcodes/frv-dis.c: Fix spelling in comments.
* opcodes/frv-opc.c: Fix spelling in comments.
* opcodes/hppa-dis.c: Fix spelling in comments.
* opcodes/i386-dis.c: Fix spelling in comments.
* opcodes/i386-opc.h: Fix spelling in comments.
* opcodes/ip2k-asm.c: Fix spelling in comments.
* opcodes/ip2k-dis.c: Fix spelling in comments.
* opcodes/iq2000-asm.c: Fix spelling in comments.
* opcodes/iq2000-dis.c: Fix spelling in comments.
* opcodes/lm32-asm.c: Fix spelling in comments.
* opcodes/lm32-dis.c: Fix spelling in comments.
* opcodes/m32c-asm.c: Fix spelling in comments.
* opcodes/m32c-dis.c: Fix spelling in comments.
* opcodes/m32r-asm.c: Fix spelling in comments.
* opcodes/m32r-dis.c: Fix spelling in comments.
* opcodes/m68hc11-opc.c: Fix spelling in comments.
* opcodes/m68k-dis.c: Fix spelling in comments.
* opcodes/m68k-opc.c: Fix spelling in comments.
* opcodes/mep-asm.c: Fix spelling in comments.
* opcodes/mep-dis.c: Fix spelling in comments.
* opcodes/metag-dis.c: Fix spelling in comments.
* opcodes/msp430-decode.c: Fix spelling in comments.
* opcodes/msp430-dis.c: Fix spelling in comments.
* opcodes/mt-asm.c: Fix spelling in comments.
* opcodes/mt-dis.c: Fix spelling in comments.
* opcodes/ns32k-dis.c: Fix spelling in comments.
* opcodes/opintl.h: Fix spelling in comments.
* opcodes/or1k-asm.c: Fix spelling in comments.
* opcodes/or1k-desc.h: Fix spelling in comments.
* opcodes/or1k-dis.c: Fix spelling in comments.
* opcodes/ppc-opc.c: Fix spelling in comments.
* opcodes/sh-dis.c: Fix spelling in comments.
* opcodes/sh64-dis.c: Fix spelling in comments.
* opcodes/tic30-dis.c: Fix spelling in comments.
* opcodes/v850-opc.c: Fix spelling in comments.
* opcodes/xc16x-asm.c: Fix spelling in comments.
* opcodes/xc16x-dis.c: Fix spelling in comments.
* opcodes/xstormy16-asm.c: Fix spelling in comments.
* opcodes/xstormy16-dis.c: Fix spelling in comments.
* opcodes/xtensa-dis.c: Fix spelling in comments.
readline/ChangeLog:
* readline/display.c: Fix spelling in comments.
* readline/examples/rlfe/rlfe.c: Fix spelling in comments.
* readline/examples/rlptytest.c: Fix spelling in comments.
* readline/histexpand.c: Fix spelling in comments.
* readline/history.h: Fix spelling in comments.
* readline/input.c: Fix spelling in comments.
* readline/readline.c: Fix spelling in comments.
* readline/rlprivate.h: Fix spelling in comments.
* readline/text.c: Fix spelling in comments.
zlib/ChangeLog:
* zlib/contrib/minizip/ioapi.h: Fix spelling in comments.
* zlib/contrib/minizip/miniunz.c: Fix spelling in comments.
* zlib/contrib/minizip/minizip.c: Fix spelling in comments.
* zlib/contrib/minizip/unzip.c: Fix spelling in comments.
* zlib/contrib/minizip/unzip.h: Fix spelling in comments.
* zlib/contrib/minizip/zip.c: Fix spelling in comments.
* zlib/examples/enough.c: Fix spelling in comments.
* zlib/examples/zran.c: Fix spelling in comments.
---
binutils/dwarf.c | 4 ++--
binutils/dwarf.h | 2 +-
binutils/objcopy.c | 2 +-
binutils/od-macho.c | 2 +-
binutils/rclex.c | 2 +-
binutils/readelf.c | 2 +-
binutils/stabs.c | 2 +-
gas/as.h | 2 +-
gas/config/obj-ecoff.c | 2 +-
gas/config/obj-macho.c | 2 +-
gas/config/tc-aarch64.c | 2 +-
gas/config/tc-arc.c | 2 +-
gas/config/tc-arm.c | 10 +++++-----
gas/config/tc-avr.c | 2 +-
gas/config/tc-cr16.c | 4 ++--
gas/config/tc-epiphany.c | 8 ++++----
gas/config/tc-frv.c | 4 ++--
gas/config/tc-hppa.c | 2 +-
gas/config/tc-hppa.h | 2 +-
gas/config/tc-i370.c | 4 ++--
gas/config/tc-m68hc11.c | 2 +-
gas/config/tc-m68k.c | 6 +++---
gas/config/tc-mcore.c | 2 +-
gas/config/tc-mep.c | 8 ++++----
gas/config/tc-metag.c | 6 +++---
gas/config/tc-mips.c | 6 +++---
gas/config/tc-mn10200.c | 2 +-
gas/config/tc-mn10300.c | 4 ++--
gas/config/tc-nds32.c | 8 ++++----
gas/config/tc-nios2.c | 2 +-
gas/config/tc-ns32k.c | 8 ++++----
gas/config/tc-pdp11.c | 2 +-
gas/config/tc-ppc.c | 12 ++++++------
gas/config/tc-riscv.c | 4 ++--
gas/config/tc-rx.c | 4 ++--
gas/config/tc-score.c | 2 +-
gas/config/tc-score7.c | 2 +-
gas/config/tc-sparc.c | 2 +-
gas/config/tc-tic54x.c | 2 +-
gas/config/tc-vax.c | 2 +-
gas/config/tc-xgate.h | 2 +-
gas/config/tc-xtensa.c | 4 ++--
gas/config/tc-z80.c | 2 +-
gas/dwarf2dbg.c | 4 ++--
gas/input-file.h | 2 +-
gas/itbl-ops.c | 2 +-
gas/read.c | 4 ++--
gas/stabs.c | 2 +-
gas/symbols.c | 8 ++++----
gas/testsuite/gas/all/itbl-test.c | 2 +-
gas/testsuite/gas/tic4x/opclasses.h | 10 +++++-----
gas/write.c | 4 ++--
gold/aarch64.cc | 4 ++--
gold/arm.cc | 2 +-
gold/icf.cc | 4 ++--
gold/layout.cc | 2 +-
gold/layout.h | 2 +-
gold/mips.cc | 2 +-
gold/output.h | 2 +-
gold/plugin.h | 2 +-
gold/script-sections.h | 2 +-
gold/script.h | 2 +-
gold/stringpool.h | 2 +-
gold/tilegx.cc | 6 +++---
gprof/basic_blocks.c | 2 +-
gprof/cg_arcs.c | 2 +-
gprof/cg_print.c | 2 +-
gprof/corefile.c | 2 +-
include/ansidecl.h | 2 +-
include/aout/aout64.h | 2 +-
include/aout/encap.h | 2 +-
include/aout/ranlib.h | 2 +-
include/coff/internal.h | 4 ++--
include/coff/sym.h | 12 ++++++------
include/coff/xcoff.h | 4 ++--
include/elf/common.h | 18 +++++++++---------
include/elf/ia64.h | 2 +-
include/elf/metag.h | 2 +-
include/elf/nds32.h | 2 +-
include/gdb/callback.h | 2 +-
include/gdb/remote-sim.h | 14 +++++++-------
include/mach-o/arm.h | 2 +-
include/opcode/alpha.h | 4 ++--
include/opcode/arc.h | 2 +-
include/opcode/hppa.h | 2 +-
include/opcode/ppc.h | 2 +-
include/opcode/tic4x.h | 10 +++++-----
include/opcode/tic6x-insn-formats.h | 2 +-
include/opcode/tic80.h | 2 +-
include/safe-ctype.h | 2 +-
include/splay-tree.h | 2 +-
intl/dcigettext.c | 2 +-
intl/plural.c | 2 +-
ld/deffile.h | 4 ++--
ld/ld.h | 2 +-
ld/ldlang.c | 4 ++--
ld/ldmisc.c | 2 +-
ld/pe-dll.c | 2 +-
libdecnumber/decBasic.c | 2 +-
libiberty/bcopy.c | 2 +-
libiberty/cp-demangle.c | 2 +-
libiberty/cplus-dem.c | 4 ++--
libiberty/make-relative-prefix.c | 2 +-
libiberty/pex-win32.c | 4 ++--
libiberty/random.c | 2 +-
libiberty/regex.c | 2 +-
libiberty/simple-object-mach-o.c | 2 +-
libiberty/strsignal.c | 2 +-
opcodes/aarch64-asm.c | 2 +-
opcodes/aarch64-dis.c | 4 ++--
opcodes/arc-dis.c | 6 +++---
opcodes/arm-dis.c | 8 ++++----
opcodes/cgen-asm.c | 4 ++--
opcodes/cgen-dis.c | 4 ++--
opcodes/cgen-opc.c | 2 +-
opcodes/dis-buf.c | 2 +-
opcodes/epiphany-asm.c | 2 +-
opcodes/epiphany-dis.c | 2 +-
opcodes/fr30-asm.c | 2 +-
opcodes/fr30-dis.c | 2 +-
opcodes/frv-asm.c | 2 +-
opcodes/frv-dis.c | 2 +-
opcodes/frv-opc.c | 2 +-
opcodes/hppa-dis.c | 2 +-
opcodes/i386-dis.c | 2 +-
opcodes/i386-opc.h | 2 +-
opcodes/ip2k-asm.c | 2 +-
opcodes/ip2k-dis.c | 2 +-
opcodes/iq2000-asm.c | 2 +-
opcodes/iq2000-dis.c | 2 +-
opcodes/lm32-asm.c | 2 +-
opcodes/lm32-dis.c | 2 +-
opcodes/m32c-asm.c | 2 +-
opcodes/m32c-dis.c | 2 +-
opcodes/m32r-asm.c | 2 +-
opcodes/m32r-dis.c | 2 +-
opcodes/m68hc11-opc.c | 2 +-
opcodes/m68k-dis.c | 2 +-
opcodes/m68k-opc.c | 2 +-
opcodes/mep-asm.c | 2 +-
opcodes/mep-dis.c | 6 +++---
opcodes/metag-dis.c | 2 +-
opcodes/msp430-decode.c | 2 +-
opcodes/msp430-dis.c | 2 +-
opcodes/mt-asm.c | 2 +-
opcodes/mt-dis.c | 2 +-
opcodes/ns32k-dis.c | 2 +-
opcodes/opintl.h | 2 +-
opcodes/or1k-asm.c | 2 +-
opcodes/or1k-desc.h | 2 +-
opcodes/or1k-dis.c | 2 +-
opcodes/ppc-opc.c | 6 +++---
opcodes/sh-dis.c | 2 +-
opcodes/sh64-dis.c | 2 +-
opcodes/tic30-dis.c | 2 +-
opcodes/v850-opc.c | 2 +-
opcodes/xc16x-asm.c | 2 +-
opcodes/xc16x-dis.c | 2 +-
opcodes/xstormy16-asm.c | 2 +-
opcodes/xstormy16-dis.c | 2 +-
opcodes/xtensa-dis.c | 2 +-
readline/display.c | 2 +-
readline/examples/rlfe/rlfe.c | 2 +-
readline/examples/rlptytest.c | 2 +-
readline/histexpand.c | 4 ++--
readline/history.h | 2 +-
readline/input.c | 2 +-
readline/readline.c | 2 +-
readline/rlprivate.h | 2 +-
readline/text.c | 2 +-
zlib/contrib/minizip/ioapi.h | 2 +-
zlib/contrib/minizip/miniunz.c | 2 +-
zlib/contrib/minizip/minizip.c | 4 ++--
zlib/contrib/minizip/unzip.c | 8 ++++----
zlib/contrib/minizip/unzip.h | 4 ++--
zlib/contrib/minizip/zip.c | 2 +-
zlib/examples/enough.c | 2 +-
zlib/examples/zran.c | 2 +-
178 files changed, 275 insertions(+), 275 deletions(-)
diff --git a/binutils/dwarf.c b/binutils/dwarf.c
index fee6a60..66ad1fd 100644
--- a/binutils/dwarf.c
+++ b/binutils/dwarf.c
@@ -200,7 +200,7 @@ dwarf_vmatoa_1 (const char *fmtch, dwarf_vma value, unsigned num_bytes)
if (num_bytes)
{
- /* Printf does not have a way of specifiying a maximum field width for an
+ /* Printf does not have a way of specifying a maximum field width for an
integer value, so we print the full value into a buffer and then select
the precision we need. */
snprintf (ret, sizeof (buf[0].place), DWARF_VMA_FMT_LONG, value);
@@ -7563,7 +7563,7 @@ dwarf_select_sections_by_names (const char *names)
{ "macro", & do_debug_macinfo, 1 },
{ "pubnames", & do_debug_pubnames, 1 },
{ "pubtypes", & do_debug_pubtypes, 1 },
- /* This entry is for compatability
+ /* This entry is for compatibility
with earlier versions of readelf. */
{ "ranges", & do_debug_aranges, 1 },
{ "rawline", & do_debug_lines, FLAG_DEBUG_LINES_RAW },
diff --git a/binutils/dwarf.h b/binutils/dwarf.h
index ed86810..ac316bb 100644
--- a/binutils/dwarf.h
+++ b/binutils/dwarf.h
@@ -224,7 +224,7 @@ extern void * xcrealloc (void *, size_t, size_t);
extern dwarf_vma read_leb128 (unsigned char *, unsigned int *, bfd_boolean, const unsigned char * const);
-/* A callback into the client. Retuns TRUE if there is a
+/* A callback into the client. Returns TRUE if there is a
relocation against the given debug section at the given
offset. */
extern bfd_boolean reloc_at (struct dwarf_section *, dwarf_vma);
diff --git a/binutils/objcopy.c b/binutils/objcopy.c
index d40cfcb..4910fcf 100644
--- a/binutils/objcopy.c
+++ b/binutils/objcopy.c
@@ -1748,7 +1748,7 @@ add_redefine_syms_file (const char *filename)
free (buf);
}
-/* Copy unkown object file IBFD onto OBFD.
+/* Copy unknown object file IBFD onto OBFD.
Returns TRUE upon success, FALSE otherwise. */
static bfd_boolean
diff --git a/binutils/od-macho.c b/binutils/od-macho.c
index d1a4e0f..0a46adc 100644
--- a/binutils/od-macho.c
+++ b/binutils/od-macho.c
@@ -259,7 +259,7 @@ bfd_mach_o_print_flags (const bfd_mach_o_xlat_name *table,
printf ("-");
}
-/* Print a bfd_uint64_t, using a platform independant style. */
+/* Print a bfd_uint64_t, using a platform independent style. */
static void
printf_uint64 (bfd_uint64_t v)
diff --git a/binutils/rclex.c b/binutils/rclex.c
index 96ed393..564d40f 100644
--- a/binutils/rclex.c
+++ b/binutils/rclex.c
@@ -40,7 +40,7 @@
static int rcdata_mode;
-/* Whether we are supressing lines from cpp (including windows.h or
+/* Whether we are suppressing lines from cpp (including windows.h or
headers from your C sources may bring in externs and typedefs).
When active, we return IGNORED_TOKEN, which lets us ignore these
outside of resource constructs. Thus, it isn't required to protect
diff --git a/binutils/readelf.c b/binutils/readelf.c
index e782e95..547b439 100644
--- a/binutils/readelf.c
+++ b/binutils/readelf.c
@@ -9937,7 +9937,7 @@ process_version_sections (FILE * file)
int j;
int isum;
- /* Check for very large indicies. */
+ /* Check for very large indices. */
if (idx > (size_t) (endbuf - (char *) edefs))
break;
diff --git a/binutils/stabs.c b/binutils/stabs.c
index d209094..38b210e 100644
--- a/binutils/stabs.c
+++ b/binutils/stabs.c
@@ -2691,7 +2691,7 @@ parse_stab_members (void *dhandle, struct stab_handle *info,
case '*':
/* virtual member function, followed by index. The sign
bit is supposedly set to distinguish
- pointers-to-methods from virtual function indicies. */
+ pointers-to-methods from virtual function indices. */
++*pp;
voffset = parse_number (pp, (bfd_boolean *) NULL);
if (**pp != ';')
diff --git a/gas/as.h b/gas/as.h
index 9fa9389..cbc5c7c 100644
--- a/gas/as.h
+++ b/gas/as.h
@@ -533,7 +533,7 @@ int generic_force_reloc (struct fix *);
#include "expr.h" /* Before targ-*.h */
-/* This one starts the chain of target dependant headers. */
+/* This one starts the chain of target dependent headers. */
#include "targ-env.h"
#ifdef OBJ_MAYBE_ELF
diff --git a/gas/config/obj-ecoff.c b/gas/config/obj-ecoff.c
index b994986..e337ff1 100644
--- a/gas/config/obj-ecoff.c
+++ b/gas/config/obj-ecoff.c
@@ -53,7 +53,7 @@ ecoff_frob_file_before_fix (void)
This output ordering of sections is magic, on the Alpha, at
least. The .lita section must come before .lit8 and .lit4,
otherwise the OSF/1 linker may silently trash the .lit{4,8}
- section contents. Also, .text must preceed .rdata. These differ
+ section contents. Also, .text must precede .rdata. These differ
from the order described in some parts of the DEC OSF/1 Assembly
Language Programmer's Guide, but that order doesn't seem to work
with their linker.
diff --git a/gas/config/obj-macho.c b/gas/config/obj-macho.c
index 13d0043..9d64ac6 100644
--- a/gas/config/obj-macho.c
+++ b/gas/config/obj-macho.c
@@ -29,7 +29,7 @@
which subsections are generated like __text, __const etc.
The well-known as short-hand section switch directives like .text, .data
- etc. are mapped onto predefined segment/section pairs using facilites
+ etc. are mapped onto predefined segment/section pairs using facilities
supplied by the mach-o port of bfd.
A number of additional mach-o short-hand section switch directives are
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 7c518c7..c71b32b 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -647,7 +647,7 @@ first_error (const char *error)
set_syntax_error (error);
}
-/* Similiar to first_error, but this function accepts formatted error
+/* Similar to first_error, but this function accepts formatted error
message. */
static void
first_error_fmt (const char *format, ...)
diff --git a/gas/config/tc-arc.c b/gas/config/tc-arc.c
index 376ac43..4eb6d6d 100644
--- a/gas/config/tc-arc.c
+++ b/gas/config/tc-arc.c
@@ -2659,7 +2659,7 @@ md_pcrel_from_section (fixS *fixP,
/* The hardware calculates relative to the start of the
insn, but this relocation is relative to location of the
LIMM, compensate. The base always needs to be
- substracted by 4 as we do not support this type of PCrel
+ subtracted by 4 as we do not support this type of PCrel
relocation for short instructions. */
base -= 4;
/* Fall through. */
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 9a12bcc..6cfd95d 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -3045,7 +3045,7 @@ s_ccs_ref (int unused ATTRIBUTE_UNUSED)
}
/* If name is not NULL, then it is used for marking the beginning of a
- function, wherease if it is NULL then it means the function end. */
+ function, whereas if it is NULL then it means the function end. */
static void
asmfunc_debug (const char * name)
{
@@ -7306,7 +7306,7 @@ parse_operands (char *str, const unsigned int *pattern, bfd_boolean thumb)
The only binary encoding difference is the Coprocessor number. Coprocessor
9 is used for half-precision calculations or conversions. The format of the
- instruction is the same as the equivalent Coprocessor 10 instuction that
+ instruction is the same as the equivalent Coprocessor 10 instruction that
exists for Single-Precision operation. */
static void
@@ -13080,7 +13080,7 @@ do_t_swi (void)
if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v6m))
{
if (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_os)
- /* This only applies to the v6m howver, not later architectures. */
+ /* This only applies to the v6m however, not later architectures. */
&& ! ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v7))
as_bad (_("SVC is not permitted on this architecture"));
ARM_MERGE_FEATURE_SETS (thumb_arch_used, thumb_arch_used, arm_ext_os);
@@ -17947,7 +17947,7 @@ now_it_add_mask (int cond)
for covering other cases.
Calling handle_it_state () may not transition the IT block state to
- OUTSIDE_IT_BLOCK immediatelly, since the (current) state could be
+ OUTSIDE_IT_BLOCK immediately, since the (current) state could be
still queried. Instead, if the FSM determines that the state should
be transitioned to OUTSIDE_IT_BLOCK, a flag is marked to be closed
after the tencode () function: that's what it_fsm_post_encode () does.
@@ -18038,7 +18038,7 @@ handle_it_state (void)
switch (inst.it_insn_type)
{
case OUTSIDE_IT_INSN:
- /* The closure of the block shall happen immediatelly,
+ /* The closure of the block shall happen immediately,
so any in_it_block () call reports the block as closed. */
force_automatic_it_block_close ();
break;
diff --git a/gas/config/tc-avr.c b/gas/config/tc-avr.c
index ee3140d..568316a 100644
--- a/gas/config/tc-avr.c
+++ b/gas/config/tc-avr.c
@@ -398,7 +398,7 @@ static struct exp_mod_s exp_mod[] =
{"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
};
-/* A union used to store indicies into the exp_mod[] array
+/* A union used to store indices into the exp_mod[] array
in a hash table which expects void * data types. */
typedef union
{
diff --git a/gas/config/tc-cr16.c b/gas/config/tc-cr16.c
index 186cfb9..7a3e9d8 100644
--- a/gas/config/tc-cr16.c
+++ b/gas/config/tc-cr16.c
@@ -1471,7 +1471,7 @@ gettrap (char *s)
if (strcasecmp (trap->name, s) == 0)
return trap->entry;
- /* To make compatable with CR16 4.1 tools, the below 3-lines of
+ /* To make compatible with CR16 4.1 tools, the below 3-lines of
* code added. Refer: Development Tracker item #123 */
for (trap = cr16_traps; trap < (cr16_traps + NUMTRAPS); trap++)
if (trap->entry == (unsigned int) atoi (s))
@@ -2385,7 +2385,7 @@ next_insn:
for (i = 0; i < insn->nargs; i++)
{
- /* For BAL (ra),disp17 instuction only. And also set the
+ /* For BAL (ra),disp17 instruction only. And also set the
DISP24a relocation type. */
if (IS_INSN_MNEMONIC ("bal") && (instruction->size == 2) && i == 0)
{
diff --git a/gas/config/tc-epiphany.c b/gas/config/tc-epiphany.c
index d14c3a0..d7153c5 100644
--- a/gas/config/tc-epiphany.c
+++ b/gas/config/tc-epiphany.c
@@ -288,7 +288,7 @@ epiphany_apply_fix (fixS *fixP, valueT *valP, segT seg)
case BFD_RELOC_EPIPHANY_HIGH:
value >>= 16;
- /* fall thru */
+ /* fall through */
case BFD_RELOC_EPIPHANY_LOW:
value = (((value & 0xff) << 5) | insn[0])
| (insn[1] << 8)
@@ -340,7 +340,7 @@ epiphany_handle_align (fragS *fragp)
}
\f
/* Read a comma separated incrementing list of register names
- and form a bit mask of upto 15 registers 0..14. */
+ and form a bit mask of up to 15 registers 0..14. */
static const char *
parse_reglist (const char * s, int * mask)
@@ -502,7 +502,7 @@ epiphany_assemble (const char *str)
return;
}
}
- /* fall-thru. */
+ /* Fall through. */
case OP4_LDSTRX:
{
@@ -994,7 +994,7 @@ md_cgen_lookup_reloc (const CGEN_INSN *insn ATTRIBUTE_UNUSED,
return BFD_RELOC_EPIPHANY_LOW;
else
as_bad ("unknown imm16 operand");
- /* fall-thru */
+ /* fall through */
default:
break;
diff --git a/gas/config/tc-frv.c b/gas/config/tc-frv.c
index f49096d..1767fd9 100644
--- a/gas/config/tc-frv.c
+++ b/gas/config/tc-frv.c
@@ -727,7 +727,7 @@ frv_tomcat_shuffle (enum vliw_nop_type this_nop_type,
buffer[0] |= 0x80;
}
/* The branch is in the middle. Split this vliw insn into first
- and second parts. Insert the NOP inbetween. */
+ and second parts. Insert the NOP between. */
second_part->insn_list = insert_before_insn;
second_part->insn_list->type = VLIW_BRANCH_HAS_NOPS;
@@ -767,7 +767,7 @@ frv_tomcat_shuffle (enum vliw_nop_type this_nop_type,
}
/* The branch is in the middle. Split this vliw insn into first
- and second parts. Insert the NOP inbetween. */
+ and second parts. Insert the NOP between. */
second_part->insn_list = insert_before_insn;
second_part->insn_list->type = VLIW_BRANCH_HAS_NOPS;
second_part->next = vliw_to_split->next;
diff --git a/gas/config/tc-hppa.c b/gas/config/tc-hppa.c
index 2ed06a2..912ce5c 100644
--- a/gas/config/tc-hppa.c
+++ b/gas/config/tc-hppa.c
@@ -1440,7 +1440,7 @@ tc_gen_reloc (asection *section, fixS *fixp)
/* Facilitate hand-crafted unwind info. */
if (strcmp (section->name, UNWIND_SECTION_NAME) == 0)
code = R_PARISC_SEGREL32;
- /* Fall thru */
+ /* Fall through */
default:
reloc->addend = fixp->fx_offset;
diff --git a/gas/config/tc-hppa.h b/gas/config/tc-hppa.h
index 4f3a7cd..aaeff64 100644
--- a/gas/config/tc-hppa.h
+++ b/gas/config/tc-hppa.h
@@ -166,7 +166,7 @@ int hppa_fix_adjustable (struct fix *);
limitations as those for the 32-bit SOM target. */
#define DIFF_EXPR_OK 1
-/* Handle .type psuedo. Given a type string of `millicode', set the
+/* Handle .type pseudo. Given a type string of `millicode', set the
internal elf symbol type to STT_PARISC_MILLI, and return
BSF_FUNCTION for the BFD symbol type. */
#define md_elf_symbol_type(name, sym, elf) \
diff --git a/gas/config/tc-i370.c b/gas/config/tc-i370.c
index 6299cc7..6290f24 100644
--- a/gas/config/tc-i370.c
+++ b/gas/config/tc-i370.c
@@ -1376,7 +1376,7 @@ symbol_locate (symbolS *symbolP,
}
/* i370_addr_offset() will convert operand expressions
- that appear to be absolute into thier base-register
+ that appear to be absolute into their base-register
relative form. These expressions come in two types:
(1) of the form "* + const" * where "*" means
@@ -1482,7 +1482,7 @@ i370_addr_cons (expressionS *exp)
expression (exp);
/* We use a simple string name to collapse together
- multiple refrences to the same address literal. */
+ multiple references to the same address literal. */
name_len = strcspn (sym_name, ", ");
delim = *(sym_name + name_len);
*(sym_name + name_len) = 0x0;
diff --git a/gas/config/tc-m68hc11.c b/gas/config/tc-m68hc11.c
index 1fc52b1..8f1bbf0 100644
--- a/gas/config/tc-m68hc11.c
+++ b/gas/config/tc-m68hc11.c
@@ -555,7 +555,7 @@ md_parse_option (int c, const char *arg)
current_architecture = cpu6812 | cpu6812s | cpu9s12x;
else if ((strcasecmp (arg, "m9s12xg") == 0)
|| (strcasecmp (arg, "xgate") == 0))
- /* xgate for backwards compatability */
+ /* xgate for backwards compatibility */
current_architecture = cpuxgate;
else
as_bad (_("Option `%s' is not recognized."), arg);
diff --git a/gas/config/tc-m68k.c b/gas/config/tc-m68k.c
index 4f64f5c..56e5599 100644
--- a/gas/config/tc-m68k.c
+++ b/gas/config/tc-m68k.c
@@ -513,7 +513,7 @@ struct m68k_cpu
unsigned long arch; /* Architecture features. */
const enum m68k_register *control_regs; /* Control regs on chip */
const char *name; /* Name */
- int alias; /* Alias for a cannonical name. If 1, then
+ int alias; /* Alias for a canonical name. If 1, then
succeeds canonical name, if -1 then
succeeds canonical name, if <-1 ||>1 this is a
deprecated name, and the next/previous name
@@ -1469,7 +1469,7 @@ m68k_ip (char *instring)
char *old = input_line_pointer;
*old = '\n';
input_line_pointer = p;
- /* Ahh - it's a motorola style psuedo op. */
+ /* Ahh - it's a motorola style pseudo op. */
mote_pseudo_table[opcode->m_opnum].poc_handler
(mote_pseudo_table[opcode->m_opnum].poc_val);
input_line_pointer = old;
@@ -4597,7 +4597,7 @@ md_begin (void)
m68k_rel32 = 0;
}
- /* First sort the opcode table into alphabetical order to seperate
+ /* First sort the opcode table into alphabetical order to separate
the order that the assembler wants to see the opcodes from the
order that the disassembler wants to see them. */
m68k_sorted_opcodes = XNEWVEC (const struct m68k_opcode *, m68k_numopcodes);
diff --git a/gas/config/tc-mcore.c b/gas/config/tc-mcore.c
index ec03a29..0eea818 100644
--- a/gas/config/tc-mcore.c
+++ b/gas/config/tc-mcore.c
@@ -1766,7 +1766,7 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
case C (COND_JUMP, DISP32):
case C (COND_JUMP, UNDEF_WORD_DISP):
{
- /* A conditional branch wont fit into 12 bits so:
+ /* A conditional branch won't fit into 12 bits so:
b!cond 1f
jmpi 0f
.align 2
diff --git a/gas/config/tc-mep.c b/gas/config/tc-mep.c
index dac10c9..bec757f 100644
--- a/gas/config/tc-mep.c
+++ b/gas/config/tc-mep.c
@@ -1146,7 +1146,7 @@ mep_check_ivc2_scheduling (void)
/* The scheduling functions are just filters for invalid combinations.
If there is a violation, they terminate assembly. Otherise they
- just fall through. Succesful combinations cause no side effects
+ just fall through. Successful combinations cause no side effects
other than valid nop insertion. */
static void
@@ -1219,7 +1219,7 @@ md_assemble (char * str)
+ copro insn
We want to handle the general case where more than
- one instruction can be preceeded by a +. This will
+ one instruction can be preceded by a +. This will
happen later if we add support for internally parallel
coprocessors. We'll make the parsing nice and general
so that it can handle an arbitrary number of insns
@@ -1299,7 +1299,7 @@ md_assemble (char * str)
/* Check for a + with a core insn and abort if found. */
if (!thisInsnIsCopro)
{
- as_fatal("A core insn cannot be preceeded by a +.\n");
+ as_fatal("A core insn cannot be preceded by a +.\n");
return;
}
@@ -2185,7 +2185,7 @@ mep_cleanup (void)
{
/* Take care of any insns left to be parallelized when the file ends.
This is mainly here to handle the case where the file ends with an
- insn preceeded by a + or the file ends unexpectedly. */
+ insn preceded by a + or the file ends unexpectedly. */
if (mode == VLIW)
mep_process_saved_insns ();
}
diff --git a/gas/config/tc-metag.c b/gas/config/tc-metag.c
index b56f9d2..3e81629 100644
--- a/gas/config/tc-metag.c
+++ b/gas/config/tc-metag.c
@@ -4717,7 +4717,7 @@ parse_dtemplate (const char *line, metag_insn *insn,
return l;
}
-/* Parse a DSP Template definiton memory reference, e.g
+/* Parse a DSP Template definition memory reference, e.g
[A0.7+A0.5++]. DSPRAM is set to true by this function if this
template definition is a DSP RAM template definition. */
static const char *
@@ -4739,7 +4739,7 @@ template_mem_ref(const char *line, metag_addr *addr,
return l;
}
-/* Sets LOAD to TRUE if this is a Template load definiton (otherwise
+/* Sets LOAD to TRUE if this is a Template load definition (otherwise
it's a store). Fills out ADDR, TEMPLATE_REG and ADDR_UNIT. */
static const char *
parse_template_regs (const char *line, bfd_boolean *load,
@@ -5626,7 +5626,7 @@ parse_dalu (const char *line, metag_insn *insn,
if ((template->meta_opcode >> 26) & 0x1)
ls_shift = INVALID_SHIFT;
- /* The Condition Is Always (CA) bit must be set if we're targetting a
+ /* The Condition Is Always (CA) bit must be set if we're targeting a
Ux.r register as the destination. This means that we can't have
any other condition bits set. */
if (!is_same_data_unit (regs[1]->unit, regs[0]->unit))
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 283ed80..a9d6f6b 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -4711,7 +4711,7 @@ struct mips_arg_info
unsigned int last_op_int;
/* If true, match routines should assume that no later instruction
- alternative matches and should therefore be as accomodating as
+ alternative matches and should therefore be as accommodating as
possible. Match routines should not report errors if something
is only invalid for !LAX_MATCH. */
bfd_boolean lax_match;
@@ -9785,7 +9785,7 @@ small_offset_p (unsigned int range, unsigned int align, unsigned int offbits)
* optimizing code generation.
* One interesting optimization is when several store macros appear
* consecutively that would load AT with the upper half of the same address.
- * The ensuing load upper instructions are ommited. This implies some kind
+ * The ensuing load upper instructions are omitted. This implies some kind
* of global optimization. We currently only optimize within a single macro.
* For many of the load and store macros if the address is specified as a
* constant expression in the first 64k of memory (ie ld $2,0x4000c) we
@@ -11809,7 +11809,7 @@ macro (struct mips_cl_insn *ip, char *str)
else if (offbits != 16)
{
/* The offset field is too narrow to be used for a low-part
- relocation, so load the whole address into the auxillary
+ relocation, so load the whole address into the auxiliary
register. */
load_address (tempreg, &offset_expr, &used_at);
if (breg != 0)
diff --git a/gas/config/tc-mn10200.c b/gas/config/tc-mn10200.c
index 8275c1a..2db07ef 100644
--- a/gas/config/tc-mn10200.c
+++ b/gas/config/tc-mn10200.c
@@ -1161,7 +1161,7 @@ keep_going:
as the size of a pointer, so we need a union to convert
the opindex field of the fr_cgen structure into a char *
so that it can be stored in the frag. We do not have
- to worry about loosing accuracy as we are not going to
+ to worry about losing accuracy as we are not going to
be even close to the 32bit limit of the int. */
union
{
diff --git a/gas/config/tc-mn10300.c b/gas/config/tc-mn10300.c
index 4ce2ee4..6f9c3cc 100644
--- a/gas/config/tc-mn10300.c
+++ b/gas/config/tc-mn10300.c
@@ -1865,7 +1865,7 @@ keep_going:
as the size of a pointer, so we need a union to convert
the opindex field of the fr_cgen structure into a char *
so that it can be stored in the frag. We do not have
- to worry about loosing accuracy as we are not going to
+ to worry about losing accuracy as we are not going to
be even close to the 32bit limit of the int. */
union
{
@@ -2618,7 +2618,7 @@ mn10300_handle_align (fragS *frag)
relocs will prevent the contents from being merged. */
&& (bfd_get_section_flags (now_seg->owner, now_seg) & SEC_MERGE) == 0)
/* Create a new fixup to record the alignment request. The symbol is
- irrelevent but must be present so we use the absolute section symbol.
+ irrelevant but must be present so we use the absolute section symbol.
The offset from the symbol is used to record the power-of-two alignment
value. The size is set to 0 because the frag may already be aligned,
thus causing cvt_frag_to_fill to reduce the size of the frag to zero. */
diff --git a/gas/config/tc-nds32.c b/gas/config/tc-nds32.c
index de59f46..8696724 100644
--- a/gas/config/tc-nds32.c
+++ b/gas/config/tc-nds32.c
@@ -91,7 +91,7 @@ static int enable_relax_relocs = 1;
static int enable_relax_ex9 = 0;
/* The value will be used in RELAX_ENTRY. */
static int enable_relax_ifc = 0;
-/* Save option -O for perfomance. */
+/* Save option -O for performance. */
static int optimize = 0;
/* Save option -Os for code size. */
static int optimize_for_space = 0;
@@ -5233,7 +5233,7 @@ md_assemble (char *str)
if (!nds32_check_insn_available (insn, str))
return;
- /* Make sure the begining of text being 2-byte align. */
+ /* Make sure the beginning of text being 2-byte align. */
nds32_adjust_label (1);
fld = insn.field;
/* Try to allocate the max size to guarantee relaxable same branch
@@ -6440,7 +6440,7 @@ elf_nds32_final_processing (void)
elf_elfheader (stdoutput)->e_flags |= nds32_elf_flags;
}
-/* Implement md_apply_fix. Apply the fix-up or tranform the fix-up for
+/* Implement md_apply_fix. Apply the fix-up or transform the fix-up for
later relocation generation. */
void
@@ -6463,7 +6463,7 @@ nds32_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
fixP->fx_addnumber = value;
fixP->tc_fix_data = NULL;
- /* Tranform specific relocations here for later relocation generation.
+ /* Transform specific relocations here for later relocation generation.
Tag data here for ex9 relaxtion and tag tls data for linker. */
switch (fixP->fx_r_type)
{
diff --git a/gas/config/tc-nios2.c b/gas/config/tc-nios2.c
index 0a1286a..3e12eee 100644
--- a/gas/config/tc-nios2.c
+++ b/gas/config/tc-nios2.c
@@ -206,7 +206,7 @@ static segT nios2_current_align_seg;
static int nios2_auto_align_on = 1;
/* The last seen label in the current section. This is used to auto-align
- labels preceeding instructions. */
+ labels preceding instructions. */
static symbolS *nios2_last_label;
/* If we saw a 16-bit CDX instruction, we can align on 2-byte boundaries
diff --git a/gas/config/tc-ns32k.c b/gas/config/tc-ns32k.c
index 570916d..f3059be 100644
--- a/gas/config/tc-ns32k.c
+++ b/gas/config/tc-ns32k.c
@@ -333,7 +333,7 @@ const pseudo_typeS md_pseudo_table[] =
displacement base-adjust as there are other routines that must
consider this. Also, as we have two various offset-adjusts in the
ns32k (acb versus br/brs/jsr/bcond), two set of limits would have
- had to be used. Now we dont have to think about that. */
+ had to be used. Now we don't have to think about that. */
const relax_typeS md_relax_table[] =
{
@@ -985,10 +985,10 @@ encode_operand (int argc,
argv[i] = freeptr;
pcrel -= 1; /* Make pcrel 0 in spite of what case 'p':
wants. */
- /* fall thru */
+ /* fall through */
case 'p': /* Displacement - pc relative addressing. */
pcrel += 1;
- /* fall thru */
+ /* fall through */
case 'd': /* Displacement. */
iif.instr_size += suffixP[i] ? suffixP[i] : 4;
IIF (12, 2, suffixP[i], (unsigned long) argv[i], 0,
@@ -1818,7 +1818,7 @@ convert_iif (void)
{
/* Frag it. */
if (exprP.X_op_symbol)
- /* We cant relax this case. */
+ /* We can't relax this case. */
as_fatal (_("Can't relax difference"));
else
{
diff --git a/gas/config/tc-pdp11.c b/gas/config/tc-pdp11.c
index f6cf025..d343194 100644
--- a/gas/config/tc-pdp11.c
+++ b/gas/config/tc-pdp11.c
@@ -1286,7 +1286,7 @@ md_show_usage (FILE *stream)
{
fprintf (stream, "\
\n\
-PDP-11 instruction set extentions:\n\
+PDP-11 instruction set extensions:\n\
\n\
-m(no-)cis allow (disallow) commersial instruction set\n\
-m(no-)csm allow (disallow) CSM instruction\n\
diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c
index 5c7b09f..d9fedff 100644
--- a/gas/config/tc-ppc.c
+++ b/gas/config/tc-ppc.c
@@ -2968,7 +2968,7 @@ md_assemble (char *str)
}
break;
}
- /* Fall thru */
+ /* Fall through */
case BFD_RELOC_PPC64_ADDR16_HIGH:
ex.X_add_number = PPC_HI (ex.X_add_number);
@@ -2990,7 +2990,7 @@ md_assemble (char *str)
}
break;
}
- /* Fall thru */
+ /* Fall through */
case BFD_RELOC_PPC64_ADDR16_HIGHA:
ex.X_add_number = PPC_HA (ex.X_add_number);
@@ -6595,7 +6595,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg)
}
break;
}
- /* Fall thru */
+ /* Fall through */
case BFD_RELOC_PPC_VLE_HI16A:
case BFD_RELOC_PPC_VLE_HI16D:
@@ -6618,7 +6618,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg)
}
break;
}
- /* Fall thru */
+ /* Fall through */
case BFD_RELOC_PPC_VLE_HA16A:
case BFD_RELOC_PPC_VLE_HA16D:
@@ -6760,7 +6760,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg)
case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
gas_assert (fixP->fx_addsy != NULL);
- /* Fall thru */
+ /* Fall through */
case BFD_RELOC_PPC_TLS:
case BFD_RELOC_PPC_TLSGD:
@@ -6884,7 +6884,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg)
&& !S_IS_DEFINED (fixP->fx_addsy)
&& !S_IS_WEAK (fixP->fx_addsy))
S_SET_WEAK (fixP->fx_addsy);
- /* Fall thru */
+ /* Fall through */
case BFD_RELOC_VTABLE_ENTRY:
fixP->fx_done = 0;
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index 592c95a..3a4ddcf 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -554,7 +554,7 @@ validate_riscv_insn (const struct riscv_opcode *opc)
case 'I': break;
case 'R': USE_BITS (OP_MASK_RS3, OP_SH_RS3); break;
case 'S': USE_BITS (OP_MASK_RS1, OP_SH_RS1); break;
- case 'U': USE_BITS (OP_MASK_RS1, OP_SH_RS1); /* fallthru */
+ case 'U': USE_BITS (OP_MASK_RS1, OP_SH_RS1); /* fall through */
case 'T': USE_BITS (OP_MASK_RS2, OP_SH_RS2); break;
case 'd': USE_BITS (OP_MASK_RD, OP_SH_RD); break;
case 'm': USE_BITS (OP_MASK_RM, OP_SH_RM); break;
@@ -1545,7 +1545,7 @@ rvc_lui:
break;
case 'U':
INSERT_OPERAND (RS1, *ip, regno);
- /* fallthru */
+ /* fall through */
case 'T':
INSERT_OPERAND (RS2, *ip, regno);
break;
diff --git a/gas/config/tc-rx.c b/gas/config/tc-rx.c
index 07dccc6..575ed4b 100644
--- a/gas/config/tc-rx.c
+++ b/gas/config/tc-rx.c
@@ -1077,7 +1077,7 @@ scan_for_infix_rx_pseudo_ops (char * str)
if (dot == NULL || dot == str)
return FALSE;
- /* A real pseudo-op must be preceeded by whitespace. */
+ /* A real pseudo-op must be preceded by whitespace. */
if (dot[-1] != ' ' && dot[-1] != '\t')
return FALSE;
@@ -2671,7 +2671,7 @@ rx_elf_final_processing (void)
elf_elfheader (stdoutput)->e_flags |= elf_flags;
}
-/* Scan the current input line for occurances of Renesas
+/* Scan the current input line for occurrences of Renesas
local labels and replace them with the GAS version. */
void
diff --git a/gas/config/tc-score.c b/gas/config/tc-score.c
index f68cc6f..2b0c0a8 100644
--- a/gas/config/tc-score.c
+++ b/gas/config/tc-score.c
@@ -7250,7 +7250,7 @@ s3_apply_fix (fixS *fixP, valueT *valP, segT seg)
}
else
{
- /* In differnt section. */
+ /* In different section. */
if ((S_GET_SEGMENT (fixP->fx_addsy) != seg) ||
(fixP->fx_addsy != NULL && S_IS_EXTERNAL (fixP->fx_addsy)))
value = fixP->fx_offset;
diff --git a/gas/config/tc-score7.c b/gas/config/tc-score7.c
index d7dd108..ee96348 100644
--- a/gas/config/tc-score7.c
+++ b/gas/config/tc-score7.c
@@ -6787,7 +6787,7 @@ s7_apply_fix (fixS *fixP, valueT *valP, segT seg)
}
else
{
- /* In differnt section. */
+ /* In different section. */
if ((S_GET_SEGMENT (fixP->fx_addsy) != seg) ||
(fixP->fx_addsy != NULL && S_IS_EXTERNAL (fixP->fx_addsy)))
value = fixP->fx_offset;
diff --git a/gas/config/tc-sparc.c b/gas/config/tc-sparc.c
index d7b9a98..aa4c112 100644
--- a/gas/config/tc-sparc.c
+++ b/gas/config/tc-sparc.c
@@ -1271,7 +1271,7 @@ BSR (bfd_vma val, int amount)
static char *expr_end;
/* Values for `special_case'.
- Instructions that require wierd handling because they're longer than
+ Instructions that require weird handling because they're longer than
4 bytes. */
#define SPECIAL_CASE_NONE 0
#define SPECIAL_CASE_SET 1
diff --git a/gas/config/tc-tic54x.c b/gas/config/tc-tic54x.c
index 409e4a0..09fd12a 100644
--- a/gas/config/tc-tic54x.c
+++ b/gas/config/tc-tic54x.c
@@ -1670,7 +1670,7 @@ tic54x_align_words (int arg)
s_align_bytes (count << 1);
}
-/* Initialize multiple-bit fields withing a single word of memory. */
+/* Initialize multiple-bit fields within a single word of memory. */
static void
tic54x_field (int ignore ATTRIBUTE_UNUSED)
diff --git a/gas/config/tc-vax.c b/gas/config/tc-vax.c
index e358c84..7e0aa04 100644
--- a/gas/config/tc-vax.c
+++ b/gas/config/tc-vax.c
@@ -188,7 +188,7 @@ int flag_want_pic; /* -k */
#define BB (1+-128)
#define WF (2+ 32767)
#define WB (2+-32768)
-/* Dont need LF, LB because they always reach. [They are coded as 0.] */
+/* Don't need LF, LB because they always reach. [They are coded as 0.] */
#define C(a,b) ENCODE_RELAX(a,b)
/* This macro has no side-effects. */
diff --git a/gas/config/tc-xgate.h b/gas/config/tc-xgate.h
index cce73ae..ad6ccf4 100644
--- a/gas/config/tc-xgate.h
+++ b/gas/config/tc-xgate.h
@@ -75,7 +75,7 @@ extern struct relax_type md_relax_table[];
/* GAS only handles relaxations for pc-relative data targeting addresses
in the same segment, we have to encode all other cases */
-/* FIXME: impliment this. */
+/* FIXME: implement this. */
/* #define md_relax_frag(SEG, FRAGP, STRETCH) \
((FRAGP)->fr_symbol != NULL \
&& S_GET_SEGMENT ((FRAGP)->fr_symbol) == (SEG) \
diff --git a/gas/config/tc-xtensa.c b/gas/config/tc-xtensa.c
index ca261ae..b4a3222 100644
--- a/gas/config/tc-xtensa.c
+++ b/gas/config/tc-xtensa.c
@@ -5507,7 +5507,7 @@ md_assemble (char *str)
orig_insn.is_specific_opcode = (has_underbar || !use_transform ());
orig_insn.opcode = xtensa_opcode_lookup (isa, opname);
- /* Special case: Check for "CALLXn.TLS" psuedo op. If found, grab its
+ /* Special case: Check for "CALLXn.TLS" pseudo op. If found, grab its
extra argument and set the opcode to "CALLXn". */
if (orig_insn.opcode == XTENSA_UNDEFINED
&& strncasecmp (opname, "callx", 5) == 0)
@@ -5556,7 +5556,7 @@ md_assemble (char *str)
}
}
- /* Special case: Check for "j.l" psuedo op. */
+ /* Special case: Check for "j.l" pseudo op. */
if (orig_insn.opcode == XTENSA_UNDEFINED
&& strncasecmp (opname, "j.l", 3) == 0)
{
diff --git a/gas/config/tc-z80.c b/gas/config/tc-z80.c
index b7e075a..0953541 100644
--- a/gas/config/tc-z80.c
+++ b/gas/config/tc-z80.c
@@ -540,7 +540,7 @@ contains_register(symbolS *sym)
return 0;
}
-/* Parse general expression, not loooking for indexed adressing. */
+/* Parse general expression, not loooking for indexed addressing. */
static const char *
parse_exp_not_indexed (const char *s, expressionS *op)
{
diff --git a/gas/dwarf2dbg.c b/gas/dwarf2dbg.c
index 61268a8..0757edb 100644
--- a/gas/dwarf2dbg.c
+++ b/gas/dwarf2dbg.c
@@ -1223,7 +1223,7 @@ dwarf2dbg_convert_frag (fragS *frag)
if (DWARF2_USE_FIXED_ADVANCE_PC)
{
- /* If linker relaxation is enabled then the distance bewteen the two
+ /* If linker relaxation is enabled then the distance between the two
symbols in the frag->fr_symbol expression might change. Hence we
cannot rely upon the value computed by resolve_symbol_value.
Instead we leave the expression unfinalized and allow
@@ -1280,7 +1280,7 @@ process_entries (segT seg, struct line_entry *e)
char * name;
const char * sec_name;
- /* Switch to the relevent sub-section before we start to emit
+ /* Switch to the relevant sub-section before we start to emit
the line number table.
FIXME: These sub-sections do not have a normal Line Number
diff --git a/gas/input-file.h b/gas/input-file.h
index 3581046..dd18415 100644
--- a/gas/input-file.h
+++ b/gas/input-file.h
@@ -18,7 +18,7 @@
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
-/*"input_file.c":Operating-system dependant functions to read source files.*/
+/*"input_file.c":Operating-system dependent functions to read source files.*/
/*
* No matter what the operating system, this module must provide the
diff --git a/gas/itbl-ops.c b/gas/itbl-ops.c
index 488e3be..d6f99ff 100644
--- a/gas/itbl-ops.c
+++ b/gas/itbl-ops.c
@@ -540,7 +540,7 @@ itbl_assemble (char *name, char *s)
return 0; /-* error; invalid operand *-/
break;
*/
- /* If not a symbol, fall thru to IMMED */
+ /* If not a symbol, fall through to IMMED */
case e_immed:
if (*n == '0' && *(n + 1) == 'x') /* hex begins 0x... */
{
diff --git a/gas/read.c b/gas/read.c
index a940ff3..2a93c9c 100644
--- a/gas/read.c
+++ b/gas/read.c
@@ -4085,14 +4085,14 @@ s_reloc (int ignore ATTRIBUTE_UNUSED)
case O_constant:
exp.X_add_symbol = section_symbol (now_seg);
exp.X_op = O_symbol;
- /* Fall thru */
+ /* Fall through */
case O_symbol:
if (exp.X_add_number == 0)
{
reloc->u.a.offset_sym = exp.X_add_symbol;
break;
}
- /* Fall thru */
+ /* Fall through */
default:
reloc->u.a.offset_sym = make_expr_symbol (&exp);
break;
diff --git a/gas/stabs.c b/gas/stabs.c
index 916594c..2d87387 100644
--- a/gas/stabs.c
+++ b/gas/stabs.c
@@ -597,7 +597,7 @@ stabs_generate_asm_lineno (void)
/* Don't emit sequences of stabs for the same line. */
if (prev_file == NULL)
{
- /* First time thru. */
+ /* First time through. */
prev_file = xstrdup (file);
prev_lineno = lineno;
}
diff --git a/gas/symbols.c b/gas/symbols.c
index 082b2c7..17222b8 100644
--- a/gas/symbols.c
+++ b/gas/symbols.c
@@ -262,7 +262,7 @@ define_sym_at_dot (symbolS *symbolP)
symbolS *
colon (/* Just seen "x:" - rattle symbols & frags. */
- const char *sym_name /* Symbol name, as a cannonical string. */
+ const char *sym_name /* Symbol name, as a canonical string. */
/* We copy this string: OK to alter later. */)
{
symbolS *symbolP; /* Symbol we are working with. */
@@ -1541,7 +1541,7 @@ snapshot_symbol (symbolS **symbolPP, valueT *valueP, segT *segP, fragS **fragPP)
case O_register:
if (!symbol_equated_p (symbolP))
break;
- /* Fall thru. */
+ /* Fall through. */
case O_symbol:
case O_symbol_rva:
symbolP = exp.X_add_symbol;
@@ -1661,7 +1661,7 @@ define_dollar_label (long label)
/* Caller must copy returned name: we re-use the area for the next name.
- The mth occurence of label n: is turned into the symbol "Ln^Am"
+ The mth occurrence of label n: is turned into the symbol "Ln^Am"
where n is the label number and m is the instance number. "L" makes
it a label discarded unless debugging and "^A"('\1') ensures no
ordinary symbol SHOULD get the same name as a local label
@@ -1826,7 +1826,7 @@ fb_label_instance (long label)
/* Caller must copy returned name: we re-use the area for the next name.
- The mth occurence of label n: is turned into the symbol "Ln^Bm"
+ The mth occurrence of label n: is turned into the symbol "Ln^Bm"
where n is the label number and m is the instance number. "L" makes
it a label discarded unless debugging and "^B"('\2') ensures no
ordinary symbol SHOULD get the same name as a local label
diff --git a/gas/testsuite/gas/all/itbl-test.c b/gas/testsuite/gas/all/itbl-test.c
index 97b8601..f6f2fd3 100644
--- a/gas/testsuite/gas/all/itbl-test.c
+++ b/gas/testsuite/gas/all/itbl-test.c
@@ -116,7 +116,7 @@ test_reg (e_processor processor, e_type type, char *name,
printf ("name=%s found for processor=%d, type=%d, val=%d\n",
n, processor, type, val);
- /* We require that names be unique amoung processors and types. */
+ /* We require that names be unique among processors and types. */
if (! itbl_get_reg_val (name, &v)
|| v != val)
printf ("Error - reg val not found for processor=%d, type=%d, name=%s\n",
diff --git a/gas/testsuite/gas/tic4x/opclasses.h b/gas/testsuite/gas/tic4x/opclasses.h
index 3fb3524..b12cc65 100644
--- a/gas/testsuite/gas/tic4x/opclasses.h
+++ b/gas/testsuite/gas/tic4x/opclasses.h
@@ -324,7 +324,7 @@ nameb##_J: &\
.endif
-/* LL: Load-load parallell operation
+/* LL: Load-load parallel operation
Syntax: <i> src2, dst2 || <i> src1, dst1
src1 = Indirect 0,1,IR0,IR1 (J)
dst1 = Register 0-7 (K)
@@ -352,7 +352,7 @@ name##_LL_enh: &\
-/* LS: Store-store parallell operation
+/* LS: Store-store parallel operation
Syntax: <i> src2, dst2 || <i> src1, dst1
src1 = Register 0-7 (H)
dst1 = Indirect 0,1,IR0,IR1 (J)
@@ -645,7 +645,7 @@ nameb##3_##namea##3_M_enh:
nameb##3 AR0, R0, R2 &|| namea##3 R0, AR0, R0 /* i;H;M|K;j;N */ &\
.endif
-/* P: General 2-operand operation with parallell store
+/* P: General 2-operand operation with parallel store
Syntax: <ia> src2, dst1 || <ib> src3, dst2
src2 = Indirect 0,1,IR0,IR1, ENH: register (i)
dst1 = Register 0-7 (L)
@@ -671,7 +671,7 @@ namea##_##nameb##_P_enh: &\
.endif
-/* Q: General 3-operand operation with parallell store
+/* Q: General 3-operand operation with parallel store
Syntax: <ia> src1, src2, dst1 || <ib> src3, dst2
src1 = Register 0-7 (K)
src2 = Indirect 0,1,IR0,IR1, ENH: register (i)
@@ -708,7 +708,7 @@ namea##3_##nameb##_Q_enh:
.endif
-/* QC: General commutative 3-operand operation with parallell store
+/* QC: General commutative 3-operand operation with parallel store
Syntax: <ia> src2, src1, dst1 || <ib> src3, dst2
<ia> src1, src2, dst1 || <ib> src3, dst2 - Manual
src1 = Register 0-7 (K)
diff --git a/gas/write.c b/gas/write.c
index c502b08..99b4812 100644
--- a/gas/write.c
+++ b/gas/write.c
@@ -1458,7 +1458,7 @@ compress_debug (bfd *abfd, asection *sec, void *xxx ATTRIBUTE_UNUSED)
compressed_size = header_size;
/* Stream the frags through the compression engine, adding new frags
- as necessary to accomodate the compressed output. */
+ as necessary to accommodate the compressed output. */
for (f = seginfo->frchainP->frch_root;
f;
f = f->fr_next)
@@ -1835,7 +1835,7 @@ write_object_file (void)
#endif
/* From now on, we don't care about sub-segments. Build one frag chain
- for each segment. Linked thru fr_next. */
+ for each segment. Linked through fr_next. */
/* Remove the sections created by gas for its own purposes. */
{
diff --git a/gold/aarch64.cc b/gold/aarch64.cc
index 28e4d48..f38cd9a 100644
--- a/gold/aarch64.cc
+++ b/gold/aarch64.cc
@@ -156,7 +156,7 @@ public:
uint64_t imm = ((adrp >> 29) & mask2) | (((adrp >> 5) & mask19) << 2);
// Retrieve msb of 21-bit-signed imm for sign extension.
uint64_t msbt = (imm >> 20) & 1;
- // Real value is imm multipled by 4k. Value now has 33-bit information.
+ // Real value is imm multiplied by 4k. Value now has 33-bit information.
int64_t value = imm << 12;
// Sign extend to 64-bit by repeating msbt 31 (64-33) times and merge it
// with value.
@@ -1022,7 +1022,7 @@ public:
{ this->erratum_address_ = addr; }
// Comparator used to group Erratum_stubs in a set by (obj, shndx,
- // sh_offset). We do not include 'type' in the calculation, becuase there is
+ // sh_offset). We do not include 'type' in the calculation, because there is
// at most one stub type at (obj, shndx, sh_offset).
bool
operator<(const Erratum_stub<size, big_endian>& k) const
diff --git a/gold/arm.cc b/gold/arm.cc
index b51612c..e351ad9 100644
--- a/gold/arm.cc
+++ b/gold/arm.cc
@@ -11215,7 +11215,7 @@ Target_arm<big_endian>::attributes_accept_div(int arch, int profile,
{
case 0:
// Integer divide allowed if instruction contained in
- // archetecture.
+ // architecture.
if (arch == elfcpp::TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
return true;
else if (arch >= elfcpp::TAG_CPU_ARCH_V7E_M)
diff --git a/gold/icf.cc b/gold/icf.cc
index c09c746..e86436a 100644
--- a/gold/icf.cc
+++ b/gold/icf.cc
@@ -545,7 +545,7 @@ get_section_contents(bool first_iteration,
{
buffer.append("Contents = ");
buffer.append(reinterpret_cast<const char*>(contents), plen);
- // Store the section contents that dont change to avoid recomputing
+ // Store the section contents that don't change to avoid recomputing
// during the next call to this function.
(*section_contents)[section_num] = buffer;
}
@@ -670,7 +670,7 @@ match_sections(unsigned int iteration_num,
// Check section alignment here.
// The section with the larger alignment requirement
// should be kept. We assume alignment can only be
- // zero or postive integral powers of two.
+ // zero or positive integral powers of two.
uint64_t align_i = section_addraligns[i];
uint64_t align_kept = section_addraligns[kept_section];
if (align_i <= align_kept)
diff --git a/gold/layout.cc b/gold/layout.cc
index d14f27b..789bcc1 100644
--- a/gold/layout.cc
+++ b/gold/layout.cc
@@ -2581,7 +2581,7 @@ Layout::relaxation_loop_body(
return off;
}
-// Search the list of patterns and find the postion of the given section
+// Search the list of patterns and find the position of the given section
// name in the output section. If the section name matches a glob
// pattern and a non-glob name, then the non-glob position takes
// precedence. Return 0 if no match is found.
diff --git a/gold/layout.h b/gold/layout.h
index b2d699f..2263f0e 100644
--- a/gold/layout.h
+++ b/gold/layout.h
@@ -539,7 +539,7 @@ class Layout
// and ALIGN are the extra flags and alignment of the segment.
struct Unique_segment_info
{
- // Identifier for the segment. ELF segments dont have names. This
+ // Identifier for the segment. ELF segments don't have names. This
// is used as the name of the output section mapped to the segment.
const char* name;
// Additional segment flags.
diff --git a/gold/mips.cc b/gold/mips.cc
index 61b3513..2ed73b2 100644
--- a/gold/mips.cc
+++ b/gold/mips.cc
@@ -9742,7 +9742,7 @@ Target_mips<size, big_endian>::do_finalize_sections(Layout* layout,
d_val = elfcpp::RHF_NOTPOT;
odyn->add_constant(elfcpp::DT_MIPS_FLAGS, d_val);
- // Save layout for using when emiting custom dynamic tags.
+ // Save layout for using when emitting custom dynamic tags.
this->layout_ = layout;
// This member holds the base address of the segment.
diff --git a/gold/output.h b/gold/output.h
index 6b9186b..62386a6 100644
--- a/gold/output.h
+++ b/gold/output.h
@@ -2874,7 +2874,7 @@ class Output_data_dynamic : public Output_section_data
DYNAMIC_NUMBER = -1U,
// Section size.
DYNAMIC_SECTION_SIZE = -2U,
- // Symbol adress.
+ // Symbol address.
DYNAMIC_SYMBOL = -3U,
// String.
DYNAMIC_STRING = -4U,
diff --git a/gold/plugin.h b/gold/plugin.h
index 652ec58..0348eb7 100644
--- a/gold/plugin.h
+++ b/gold/plugin.h
@@ -378,7 +378,7 @@ class Plugin_manager
Mapfile* mapfile_;
Task_token* this_blocker_;
- // An extra directory to seach for the libraries passed by
+ // An extra directory to search for the libraries passed by
// add_input_library.
std::string extra_search_path_;
Lock* lock_;
diff --git a/gold/script-sections.h b/gold/script-sections.h
index 30fd96d..6e108fa 100644
--- a/gold/script-sections.h
+++ b/gold/script-sections.h
@@ -279,7 +279,7 @@ class Script_sections
size_t
total_header_size(Layout* layout) const;
- // Return the amount we have to subtract from the LMA to accomodate
+ // Return the amount we have to subtract from the LMA to accommodate
// headers of the given size.
uint64_t
header_size_adjustment(uint64_t lma, size_t sizeof_headers) const;
diff --git a/gold/script.h b/gold/script.h
index d81391b..d0cae11 100644
--- a/gold/script.h
+++ b/gold/script.h
@@ -538,7 +538,7 @@ class Script_options
// SECTIONS clause.
typedef std::vector<Symbol_assignment*> Symbol_assignments;
- // We keep a list of all assertions whcih occur outside of a
+ // We keep a list of all assertions which occur outside of a
// SECTIONS clause.
typedef std::vector<Script_assertion*> Assertions;
diff --git a/gold/stringpool.h b/gold/stringpool.h
index b7ac54f..a2b3ebd 100644
--- a/gold/stringpool.h
+++ b/gold/stringpool.h
@@ -118,7 +118,7 @@ class Chunked_vector
{
this->chunks_.resize((n + chunk_size - 1) / chunk_size);
// We need to call reserve() of all chunks since changing
- // this->chunks_ casues Element_vectors to be copied. The
+ // this->chunks_ causes Element_vectors to be copied. The
// reserved capacity of an Element_vector may be lost in copying.
for (size_t i = 0; i < this->chunks_.size(); ++i)
this->chunks_[i].reserve(chunk_size);
diff --git a/gold/tilegx.cc b/gold/tilegx.cc
index 03b1a50..7ab99ab 100644
--- a/gold/tilegx.cc
+++ b/gold/tilegx.cc
@@ -2527,7 +2527,7 @@ Target_tilegx<size, big_endian>::make_plt_section(Symbol_table* symtab,
this->got_section(symtab, layout);
// Ensure that .rela.dyn always appears before .rela.plt,
- // becuase on TILE-Gx, .rela.dyn needs to include .rela.plt
+ // because on TILE-Gx, .rela.dyn needs to include .rela.plt
// in it's range.
this->rela_dyn_section(layout);
@@ -3375,7 +3375,7 @@ Target_tilegx<size, big_endian>::Scan::local(Symbol_table* symtab,
// tilegx dynamic linker will not update local got entry,
// so, if we are generating a shared object, we need to add a
// dynamic relocation for this symbol's GOT entry to inform
- // dynamic linker plus the load base explictly.
+ // dynamic linker plus the load base explicitly.
if (parameters->options().output_is_position_independent())
{
unsigned int got_offset
@@ -3431,7 +3431,7 @@ Target_tilegx<size, big_endian>::Scan::local(Symbol_table* symtab,
//
// R_TILEGX_TLS_GD_CALL implicitly reference __tls_get_addr,
// while all other target, x86/arm/mips/powerpc/sparc
- // generate tls relocation against __tls_get_addr explictly,
+ // generate tls relocation against __tls_get_addr explicitly,
// so for TILEGX, we need the following hack.
if (opt_t == tls::TLSOPT_NONE) {
if (!target->tls_get_addr_sym_defined_) {
diff --git a/gprof/basic_blocks.c b/gprof/basic_blocks.c
index a588b2e..4e29599 100644
--- a/gprof/basic_blocks.c
+++ b/gprof/basic_blocks.c
@@ -311,7 +311,7 @@ print_exec_counts (void)
line of a file in sequential order.
Global variable bb_annotate_all_lines enables execution count
- compression (counts are supressed if identical to the last one)
+ compression (counts are suppressed if identical to the last one)
and prints counts on all executed lines. Otherwise, print
all basic-block execution counts exactly once on the line
that starts the basic-block. */
diff --git a/gprof/cg_arcs.c b/gprof/cg_arcs.c
index c51137d..fefe4b8 100644
--- a/gprof/cg_arcs.c
+++ b/gprof/cg_arcs.c
@@ -660,7 +660,7 @@ cg_assemble (void)
fractions. */
propagate_flags (top_sorted_syms);
- /* Starting from the topological bottom, propogate children times
+ /* Starting from the topological bottom, propagate children times
up to parents. */
cycle_time ();
for (sym_index = 0; sym_index < symtab.len; ++sym_index)
diff --git a/gprof/cg_print.c b/gprof/cg_print.c
index 77a0c4c..e01bdcb 100644
--- a/gprof/cg_print.c
+++ b/gprof/cg_print.c
@@ -847,7 +847,7 @@ cg_print_function_ordering (void)
tmp_arcs_count += arcs[arc_index]->count;
/* Count how many times each parent and child are used up
- to our threshhold of arcs (90%). */
+ to our threshold of arcs (90%). */
if ((double)tmp_arcs_count / (double)total_arcs > 0.90)
break;
diff --git a/gprof/corefile.c b/gprof/corefile.c
index 87de7bc..c9ec490 100644
--- a/gprof/corefile.c
+++ b/gprof/corefile.c
@@ -847,7 +847,7 @@ core_create_line_syms (void)
The old way called symtab_finalize before the is_static pass,
causing a problem since symtab_finalize uses is_static as part of
its address conflict resolution algorithm. Since global symbols
- were prefered over static symbols, and all line symbols were
+ were preferred over static symbols, and all line symbols were
global at that point, static function names that conflicted with
their own line numbers (static, but labeled as global) were
rejected in favor of the line num.
diff --git a/include/ansidecl.h b/include/ansidecl.h
index 0c71685..1b35752 100644
--- a/include/ansidecl.h
+++ b/include/ansidecl.h
@@ -1,4 +1,4 @@
-/* ANSI and traditional C compatability macros
+/* ANSI and traditional C compatibility macros
Copyright (C) 1991-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
diff --git a/include/aout/aout64.h b/include/aout/aout64.h
index 2aed5bd..4d93124 100644
--- a/include/aout/aout64.h
+++ b/include/aout/aout64.h
@@ -492,7 +492,7 @@ enum reloc_type
RELOC_DISP14, /* data[0:13] = addend - pc + sv */
/* Q .
What are the other ones,
- Since this is a clean slate, can we throw away the ones we dont
+ Since this is a clean slate, can we throw away the ones we don't
understand ? Should we sort the values ? What about using a
microcode format like the 68k ? */
NO_RELOC
diff --git a/include/aout/encap.h b/include/aout/encap.h
index 4962875..10afdbc 100644
--- a/include/aout/encap.h
+++ b/include/aout/encap.h
@@ -30,7 +30,7 @@
* A normal bsd header (struct exec) is placed after the coff headers,
* and before the real text. I defined a the new fields 'a_machtype'
* and a_flags. If a_machtype is M_386, and a_flags & A_ENCAP is
- * true, then the bsd header is preceeded by a coff header. Macros
+ * true, then the bsd header is preceded by a coff header. Macros
* like N_TXTOFF and N_TXTADDR use this field to find the bsd header.
*
* The only problem is to track down the bsd exec header. The
diff --git a/include/aout/ranlib.h b/include/aout/ranlib.h
index 8aab973..c1b20b6 100644
--- a/include/aout/ranlib.h
+++ b/include/aout/ranlib.h
@@ -54,7 +54,7 @@ struct symdef
unsigned long file_offset;
};
-/* Compatability with BSD code */
+/* Compatibility with BSD code */
#define ranlib symdef
#define ran_un s
diff --git a/include/coff/internal.h b/include/coff/internal.h
index 885ac16..fe0f3f6 100644
--- a/include/coff/internal.h
+++ b/include/coff/internal.h
@@ -67,7 +67,7 @@ struct internal_filehdr
/* coff-stgo32 EXE stub header before BFD tdata has been allocated.
Its data is kept in INTERNAL_FILEHDR.GO32STUB afterwards.
- F_GO32STUB is set iff go32stub contains a valid data. Artifical headers
+ F_GO32STUB is set iff go32stub contains a valid data. Artificial headers
created in BFD have no pre-set go32stub. */
char go32stub[GO32_STUBSIZE];
@@ -390,7 +390,7 @@ struct internal_aouthdr
#define C_THUMBEXTFUNC (C_THUMBEXT + 20) /* 150 */
#define C_THUMBSTATFUNC (C_THUMBSTAT + 20) /* 151 */
-/* True if XCOFF symbols of class CLASS have auxillary csect information. */
+/* True if XCOFF symbols of class CLASS have auxiliary csect information. */
#define CSECT_SYM_P(CLASS) \
((CLASS) == C_EXT || (CLASS) == C_AIX_WEAKEXT || (CLASS) == C_HIDEXT)
diff --git a/include/coff/sym.h b/include/coff/sym.h
index 76204af..8441401 100644
--- a/include/coff/sym.h
+++ b/include/coff/sym.h
@@ -76,8 +76,8 @@ typedef struct {
bfd_vma cbSymOffset; /* offset to start of local symbols*/
long ioptMax; /* max index into optimization symbol entries */
bfd_vma cbOptOffset; /* offset to optimization symbol entries */
- long iauxMax; /* number of auxillary symbol entries */
- bfd_vma cbAuxOffset; /* offset to start of auxillary symbol entries*/
+ long iauxMax; /* number of auxiliary symbol entries */
+ bfd_vma cbAuxOffset; /* offset to start of auxiliary symbol entries*/
long issMax; /* max index into local strings */
bfd_vma cbSsOffset; /* offset to start of local strings */
long issExtMax; /* max index into external strings */
@@ -315,7 +315,7 @@ typedef struct {
/*
- * Auxillary information occurs only if needed.
+ * Auxiliary information occurs only if needed.
* It ALWAYS occurs in this order when present.
isymMac used by stProc only
@@ -369,7 +369,7 @@ typedef struct {
unsigned ot: 8; /* optimization type */
unsigned value: 24; /* address where we are moving it to */
RNDXR rndx; /* points to a symbol or opt entry */
- unsigned long offset; /* relative offset this occured */
+ unsigned long offset; /* relative offset this occurred */
} OPTR, *pOPTR;
#define optNil ((pOPTR) 0)
#define cbOPTR sizeof(OPTR)
@@ -419,10 +419,10 @@ typedef long FIT, *pFIT;
/* Dense numbers
*
* Rather than use file index, symbol index pairs to represent symbols
- * and globals, we use dense number so that they can be easily embeded
+ * and globals, we use dense number so that they can be easily embedded
* in intermediate code and the programs that process them can
* use direct access tabls instead of hash table (which would be
- * necesary otherwise because of the sparse name space caused by
+ * necessary otherwise because of the sparse name space caused by
* file index, symbol index pairs. Dense number are represented
* by RNDXRs.
*/
diff --git a/include/coff/xcoff.h b/include/coff/xcoff.h
index 4dde058..9f4bead 100644
--- a/include/coff/xcoff.h
+++ b/include/coff/xcoff.h
@@ -68,7 +68,7 @@
#define STYP_LOADER 0x1000
/* Specifies an exception section. A section of this type provides
- information to identify the reason that a trap or ececptin occured within
+ information to identify the reason that a trap or exception occurred within
and executable object program */
#define STYP_EXCEPT 0x0100
@@ -137,7 +137,7 @@
/* Dwarf symbol. */
#define C_DWARF 112
-/* Auxillary Symbol Entries */
+/* Auxiliary Symbol Entries */
/* x_smtyp values: */
#define SMTYP_ALIGN(x) ((x) >> 3) /* log2 of alignment */
diff --git a/include/elf/common.h b/include/elf/common.h
index da79613..8b52d4d 100644
--- a/include/elf/common.h
+++ b/include/elf/common.h
@@ -357,19 +357,19 @@
/* Old, unofficial value for National Semiconductor CompactRISC - CR16 */
#define EM_CR16_OLD 115
-/* AVR magic number. Written in the absense of an ABI. */
+/* AVR magic number. Written in the absence of an ABI. */
#define EM_AVR_OLD 0x1057
-/* MSP430 magic number. Written in the absense of everything. */
+/* MSP430 magic number. Written in the absence of everything. */
#define EM_MSP430_OLD 0x1059
-/* Morpho MT. Written in the absense of an ABI. */
+/* Morpho MT. Written in the absence of an ABI. */
#define EM_MT 0x2530
/* FR30 magic number - no EABI available. */
#define EM_CYGNUS_FR30 0x3330
-/* DLX magic number. Written in the absense of an ABI. */
+/* DLX magic number. Written in the absence of an ABI. */
#define EM_DLX 0x5aa5
/* FRV magic number - no EABI available??. */
@@ -384,7 +384,7 @@
/* D30V backend magic number. Written in the absence of an ABI. */
#define EM_CYGNUS_D30V 0x7676
-/* Ubicom IP2xxx; Written in the absense of an ABI. */
+/* Ubicom IP2xxx; Written in the absence of an ABI. */
#define EM_IP2K_OLD 0x8217
/* Cygnus PowerPC ELF backend. Written in the absence of an ABI. */
@@ -396,7 +396,7 @@
/* Cygnus M32R ELF backend. Written in the absence of an ABI. */
#define EM_CYGNUS_M32R 0x9041
-/* V850 backend magic number. Written in the absense of an ABI. */
+/* V850 backend magic number. Written in the absence of an ABI. */
#define EM_CYGNUS_V850 0x9080
/* old S/390 backend magic number. Written in the absence of an ABI. */
@@ -408,7 +408,7 @@
#define EM_XSTORMY16 0xad45
/* mn10200 and mn10300 backend magic numbers.
- Written in the absense of an ABI. */
+ Written in the absence of an ABI. */
#define EM_CYGNUS_MN10300 0xbeef
#define EM_CYGNUS_MN10200 0xdead
@@ -494,7 +494,7 @@
#define SHT_FINI_ARRAY 15 /* Array of ptrs to finish functions */
#define SHT_PREINIT_ARRAY 16 /* Array of ptrs to pre-init funcs */
#define SHT_GROUP 17 /* Section contains a section group */
-#define SHT_SYMTAB_SHNDX 18 /* Indicies for SHN_XINDEX entries */
+#define SHT_SYMTAB_SHNDX 18 /* Indices for SHN_XINDEX entries */
#define SHT_LOOS 0x60000000 /* First of OS specific semantics */
#define SHT_HIOS 0x6fffffff /* Last of OS specific semantics */
@@ -816,7 +816,7 @@
DT_VALRNGHI) and virtual address range (DT_ADDRRNGLO to DT_ADDRRNGHI),
are used on Solaris. We support them everywhere. Note these values
lie outside of the (new) range for OS specific values. This is a
- deliberate special case and we maintain it for backwards compatability.
+ deliberate special case and we maintain it for backwards compatibility.
*/
#define DT_VALRNGLO 0x6ffffd00
#define DT_GNU_PRELINKED 0x6ffffdf5
diff --git a/include/elf/ia64.h b/include/elf/ia64.h
index 6b410a3..edc294c 100644
--- a/include/elf/ia64.h
+++ b/include/elf/ia64.h
@@ -102,7 +102,7 @@
/* The section contains the dwarf-3 string table. */
#define SHT_IA_64_VMS_DEBUG_STR 0x60000003
/* The section contains linkage information to perform consistency checking
- accross object modules. */
+ across object modules. */
#define SHT_IA_64_VMS_LINKAGES 0x60000004
/* The section allows the symbol vector in an image to be location through
the section table. */
diff --git a/include/elf/metag.h b/include/elf/metag.h
index 8787f7f..7bc4d0e 100644
--- a/include/elf/metag.h
+++ b/include/elf/metag.h
@@ -33,7 +33,7 @@ START_RELOC_NUMBERS (elf_metag_reloc_type)
RELOC_NUMBER (R_METAG_RELBRANCH, 4)
RELOC_NUMBER (R_METAG_GETSETOFF, 5)
- /* Backward compatability */
+ /* Backward compatibility */
RELOC_NUMBER (R_METAG_REG32OP1, 6)
RELOC_NUMBER (R_METAG_REG32OP2, 7)
RELOC_NUMBER (R_METAG_REG32OP3, 8)
diff --git a/include/elf/nds32.h b/include/elf/nds32.h
index 7279ca0..02d862e 100644
--- a/include/elf/nds32.h
+++ b/include/elf/nds32.h
@@ -242,7 +242,7 @@ END_RELOC_NUMBERS (R_NDS32_max)
#define E_NDS32_HAS_SATURATION_INST 0x00020000 /* v3, ELF 1.4. */
/* Encription instructions. */
#define E_NDS32_HAS_ENCRIPT_INST 0x00040000
-/* Doulbe Precision Floating point processor instructions. */
+/* Double Precision Floating point processor instructions. */
#define E_NDS32_HAS_FPU_DP_INST 0x00080000
/* No MAC instruction used. */
#define E_NDS32_HAS_NO_MAC_INST 0x00100000 /* Reclaimed when V2/V3. */
diff --git a/include/gdb/callback.h b/include/gdb/callback.h
index 9459129..b036e4f 100644
--- a/include/gdb/callback.h
+++ b/include/gdb/callback.h
@@ -103,7 +103,7 @@ struct host_callback_struct
non-empty. */
void (*pipe_nonempty) (host_callback *, int read_fd, int write_fd);
- /* When present, call to the client to give it the oportunity to
+ /* When present, call to the client to give it the opportunity to
poll any io devices for a request to quit (indicated by a nonzero
return value). */
int (*poll_quit) (host_callback *);
diff --git a/include/gdb/remote-sim.h b/include/gdb/remote-sim.h
index fc12898..addf400 100644
--- a/include/gdb/remote-sim.h
+++ b/include/gdb/remote-sim.h
@@ -108,7 +108,7 @@ SIM_DESC sim_open (SIM_OPEN_KIND kind, struct host_callback_struct *callback,
struct bfd *abfd, char * const *argv);
-/* Destory a simulator instance.
+/* Destroy a simulator instance.
QUITTING is non-zero if we cannot hang on errors.
@@ -139,7 +139,7 @@ void sim_close (SIM_DESC sd, int quitting);
FIXME: For some hardware targets, before a loaded program can be
executed, it requires the manipulation of VM registers and tables.
- Such manipulation should probably (?) occure in
+ Such manipulation should probably (?) occur in
sim_create_inferior. */
SIM_RC sim_load (SIM_DESC sd, const char *prog, struct bfd *abfd, int from_tty);
@@ -153,7 +153,7 @@ SIM_RC sim_load (SIM_DESC sd, const char *prog, struct bfd *abfd, int from_tty);
Hardware simulator: This function shall initialize the processor
registers to a known value. The program counter and possibly stack
pointer shall be set using information obtained from ABFD (or
- hardware reset defaults). ARGV and ENV, dependant on the target
+ hardware reset defaults). ARGV and ENV, dependent on the target
ABI, may be written to memory.
Process simulator: After a call to this function, a new process
@@ -186,7 +186,7 @@ int sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length);
Legacy implementations ignore LENGTH and always return -1.
- If LENGTH does not match the size of REGNO no data is transfered
+ If LENGTH does not match the size of REGNO no data is transferred
(the actual register size is still returned). */
int sim_fetch_register (SIM_DESC sd, int regno, unsigned char *buf, int length);
@@ -228,7 +228,7 @@ void sim_info (SIM_DESC sd, int verbose);
indicated by that signal. If a value of zero is passed in then the
simulation will continue as if there were no outstanding signal.
The effect of any other SIGGNAL value is is implementation
- dependant.
+ dependent.
Process simulator: If SIGRC is non-zero then the corresponding
signal is delivered to the simulated program and execution is then
@@ -248,7 +248,7 @@ int sim_stop (SIM_DESC sd);
/* Fetch the REASON why the program stopped.
SIM_EXITED: The program has terminated. SIGRC indicates the target
- dependant exit status.
+ dependent exit status.
SIM_STOPPED: The program has stopped. SIGRC uses the host's signal
numbering as a way of identifying the reaon: program interrupted by
@@ -258,7 +258,7 @@ int sim_stop (SIM_DESC sd);
undefined memory region (SIGSEGV); Mis-aligned memory access
(SIGBUS). For some signals information in addition to the signal
number may be retained by the simulator (e.g. offending address),
- that information is not directly accessable via this interface.
+ that information is not directly accessible via this interface.
SIM_SIGNALLED: The program has been terminated by a signal. The
simulator has encountered target code that causes the the program
diff --git a/include/mach-o/arm.h b/include/mach-o/arm.h
index 39f9214..26f2930 100644
--- a/include/mach-o/arm.h
+++ b/include/mach-o/arm.h
@@ -24,7 +24,7 @@
/* ARM relocations. */
#define BFD_MACH_O_ARM_RELOC_VANILLA 0 /* Generic relocation. */
#define BFD_MACH_O_ARM_RELOC_PAIR 1 /* Second entry in a pair. */
-#define BFD_MACH_O_ARM_RELOC_SECTDIFF 2 /* Substract with a PAIR. */
+#define BFD_MACH_O_ARM_RELOC_SECTDIFF 2 /* Subtract with a PAIR. */
#define BFD_MACH_O_ARM_RELOC_LOCAL_SECTDIFF 3 /* Like above, but local ref. */
#define BFD_MACH_O_ARM_RELOC_PB_LA_PTR 4 /* Prebound lazy pointer. */
#define BFD_MACH_O_ARM_RELOC_BR24 5 /* 24bit branch. */
diff --git a/include/opcode/alpha.h b/include/opcode/alpha.h
index 747660e..a0cee82 100644
--- a/include/opcode/alpha.h
+++ b/include/opcode/alpha.h
@@ -158,7 +158,7 @@ extern const unsigned alpha_num_operands;
instructions which want their operands to look like "Ra,disp(Rb)". */
#define AXP_OPERAND_PARENS 02
-/* Used in combination with PARENS, this supresses the supression of
+/* Used in combination with PARENS, this suppresses the supression of
the comma. This is used for "jmp Ra,(Rb),hint". */
#define AXP_OPERAND_COMMA 04
@@ -179,7 +179,7 @@ extern const unsigned alpha_num_operands;
a flags value of 0 can be treated as end-of-arguments. */
#define AXP_OPERAND_UNSIGNED 0200
-/* Supress overflow detection on this field. This is used for hints. */
+/* Suppress overflow detection on this field. This is used for hints. */
#define AXP_OPERAND_NOOVERFLOW 0400
/* Mask for optional argument default value. */
diff --git a/include/opcode/arc.h b/include/opcode/arc.h
index 2214b2f..954746a 100644
--- a/include/opcode/arc.h
+++ b/include/opcode/arc.h
@@ -317,7 +317,7 @@ extern const unsigned arc_NToperand;
/* Don't check the range when matching. */
#define ARC_OPERAND_NCHK 0x0800
-/* Mark the braket possition. */
+/* Mark the braket position. */
#define ARC_OPERAND_BRAKET 0x1000
/* Address type operand for NPS400. */
diff --git a/include/opcode/hppa.h b/include/opcode/hppa.h
index 2dcc8bc..6d686da 100644
--- a/include/opcode/hppa.h
+++ b/include/opcode/hppa.h
@@ -30,7 +30,7 @@
*/
/* There are two kinds of delay slot nullification: normal which is
- * controled by the nullification bit, and conditional, which depends
+ * controlled by the nullification bit, and conditional, which depends
* on the direction of the branch and its success or failure.
*
* NONE is unfortunately #defined in the hiux system include files.
diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h
index 66d2ceb..921c5b5 100644
--- a/include/opcode/ppc.h
+++ b/include/opcode/ppc.h
@@ -405,7 +405,7 @@ extern const unsigned int num_powerpc_operands;
/* This flag is only used with PPC_OPERAND_OPTIONAL. If this operand
is omitted, then the value it should use for the operand is stored
- in the SHIFT field of the immediatly following operand field. */
+ in the SHIFT field of the immediately following operand field. */
#define PPC_OPERAND_OPTIONAL_VALUE (0x400000)
/* This flag is only used with PPC_OPERAND_OPTIONAL. The operand is
diff --git a/include/opcode/tic4x.h b/include/opcode/tic4x.h
index b4209a1..1287699 100644
--- a/include/opcode/tic4x.h
+++ b/include/opcode/tic4x.h
@@ -519,7 +519,7 @@ typedef struct tic4x_inst tic4x_inst_t;
Instr: 1/1 - CALLc, C4X: LAJc
*/
-/* LL: Load-load parallell operation
+/* LL: Load-load parallel operation
Syntax: <i> src2, dst2 || <i> src1, dst1
src1 = Indirect 0,1,IR0,IR1 (J)
dst1 = Register 0-7 (K)
@@ -533,7 +533,7 @@ typedef struct tic4x_inst tic4x_inst_t;
{ name "2_" name "1", opcode, 0xfe000000, "i;L|J,K", level }, \
{ name "1_" name "2", opcode, 0xfe000000, "J,K|i;L", level }
-/* LS: Store-store parallell operation
+/* LS: Store-store parallel operation
Syntax: <i> src2, dst2 || <i> src1, dst1
src1 = Register 0-7 (H)
dst1 = Indirect 0,1,IR0,IR1 (J)
@@ -613,7 +613,7 @@ typedef struct tic4x_inst tic4x_inst_t;
{ nameb "3_" namea "3", opcode|0x03000000, 0xff000000, "i;H;M|j;K;N", level }, \
{ nameb "3_" namea "3", opcode|0x03000000, 0xff000000, "i;H;M|K;j;N", level }
-/* P: General 2-operand operation with parallell store
+/* P: General 2-operand operation with parallel store
Syntax: <ia> src2, dst1 || <ib> src3, dst2
src2 = Indirect 0,1,IR0,IR1, ENH: register (i)
dst1 = Register 0-7 (L)
@@ -628,7 +628,7 @@ typedef struct tic4x_inst tic4x_inst_t;
{ namea "_" nameb, opcode, 0xfe000000, "i;L|H,J", level }, \
{ nameb "_" namea, opcode, 0xfe000000, "H,J|i;L", level }
-/* Q: General 3-operand operation with parallell store
+/* Q: General 3-operand operation with parallel store
Syntax: <ia> src1, src2, dst1 || <ib> src3, dst2
src1 = Register 0-7 (K)
src2 = Indirect 0,1,IR0,IR1, ENH: register (i)
@@ -644,7 +644,7 @@ typedef struct tic4x_inst tic4x_inst_t;
{ namea "3_" nameb , opcode, 0xfe000000, "K,i;L|H,J", level }, \
{ nameb "_" namea "3", opcode, 0xfe000000, "H,J|K,i;L", level }
-/* QC: General commutative 3-operand operation with parallell store
+/* QC: General commutative 3-operand operation with parallel store
Syntax: <ia> src2, src1, dst1 || <ib> src3, dst2
<ia> src1, src2, dst1 || <ib> src3, dst2 - Manual
src1 = Register 0-7 (K)
diff --git a/include/opcode/tic6x-insn-formats.h b/include/opcode/tic6x-insn-formats.h
index f93142f..9db8e0a 100644
--- a/include/opcode/tic6x-insn-formats.h
+++ b/include/opcode/tic6x-insn-formats.h
@@ -552,7 +552,7 @@ FMT(nfu_uspl, 16, 0x0c66, 0xbc7e,
/* make up some fields to pretend to have s and z fields s for this format
so as to fit in other predicated compact instruction to avoid special-
casing this instruction in tic6x-dis.c
- use op field as a predicate adress register selector (s field)
+ use op field as a predicate address register selector (s field)
use the first zeroed bit as a z value as this insn only supports [a0]
and [b0] predicate forms.
*/
diff --git a/include/opcode/tic80.h b/include/opcode/tic80.h
index 510da05..a8b13b3 100644
--- a/include/opcode/tic80.h
+++ b/include/opcode/tic80.h
@@ -169,7 +169,7 @@ extern const struct tic80_operand tic80_operands[];
#define TIC80_OPERAND_PCREL (1 << 5)
-/* This flag is a hint to the disassembler for using hex as the prefered
+/* This flag is a hint to the disassembler for using hex as the preferred
printing format, even for small positive or negative immediate values.
Normally values in the range -999 to 999 are printed as signed decimal
values and other values are printed in hex. */
diff --git a/include/safe-ctype.h b/include/safe-ctype.h
index a1118be..5aaf0f3 100644
--- a/include/safe-ctype.h
+++ b/include/safe-ctype.h
@@ -112,7 +112,7 @@ extern const unsigned char _sch_tolower[256];
#define TOUPPER(c) _sch_toupper[(c) & 0xff]
#define TOLOWER(c) _sch_tolower[(c) & 0xff]
-/* Prevent the users of safe-ctype.h from accidently using the routines
+/* Prevent the users of safe-ctype.h from accidentally using the routines
from ctype.h. Initially, the approach was to produce an error when
detecting that ctype.h has been included. But this was causing
trouble as ctype.h might get indirectly included as a result of
diff --git a/include/splay-tree.h b/include/splay-tree.h
index 0eef3fa..6cf639b 100644
--- a/include/splay-tree.h
+++ b/include/splay-tree.h
@@ -98,7 +98,7 @@ struct splay_tree_s {
/* The root of the tree. */
splay_tree_node root;
- /* The comparision function. */
+ /* The comparison function. */
splay_tree_compare_fn comp;
/* The deallocate-key function. NULL if no cleanup is necessary. */
diff --git a/intl/dcigettext.c b/intl/dcigettext.c
index a8d4a14..2baa3e5 100644
--- a/intl/dcigettext.c
+++ b/intl/dcigettext.c
@@ -320,7 +320,7 @@ static const char *category_to_name PARAMS ((int category)) internal_function;
#endif
-/* For those loosing systems which don't have `alloca' we have to add
+/* For those losing systems which don't have `alloca' we have to add
some additional code emulating it. */
#ifdef HAVE_ALLOCA
/* Nothing has to be done. */
diff --git a/intl/plural.c b/intl/plural.c
index 951303a..9542443 100644
--- a/intl/plural.c
+++ b/intl/plural.c
@@ -717,7 +717,7 @@ yyparse (YYPARSE_PARAM_ARG)
`yyvs': related to semantic values,
`yyls': related to locations.
- Refer to the stacks thru separate pointers, to allow yyoverflow
+ Refer to the stacks through separate pointers, to allow yyoverflow
to reallocate them elsewhere. */
/* The state stack. */
diff --git a/ld/deffile.h b/ld/deffile.h
index 26e0431..e6d98eb 100644
--- a/ld/deffile.h
+++ b/ld/deffile.h
@@ -34,7 +34,7 @@ typedef struct def_file_section {
typedef struct def_file_export {
char *name; /* always set */
char *internal_name; /* always set, may == name */
- char *its_name; /* optional export table name refered to. */
+ char *its_name; /* optional export table name referred to. */
int ordinal; /* -1 if not specified */
int hint;
char flag_private, flag_constant, flag_noname, flag_data, flag_forward;
@@ -50,7 +50,7 @@ typedef struct def_file_import {
char *internal_name; /* always set */
def_file_module *module; /* always set */
char *name; /* may be NULL; either this or ordinal will be set */
- char *its_name; /* optional import table name refered to. */
+ char *its_name; /* optional import table name referred to. */
int ordinal; /* may be -1 */
int data; /* = 1 if data */
} def_file_import;
diff --git a/ld/ld.h b/ld/ld.h
index 410ee99..95d5a15 100644
--- a/ld/ld.h
+++ b/ld/ld.h
@@ -185,7 +185,7 @@ typedef struct
/* Name of runtime interpreter to invoke. */
char *interpreter;
- /* Name to give runtime libary from the -soname argument. */
+ /* Name to give runtime library from the -soname argument. */
char *soname;
/* Runtime library search path from the -rpath argument. */
diff --git a/ld/ldlang.c b/ld/ldlang.c
index 7d495c0..de24380 100644
--- a/ld/ldlang.c
+++ b/ld/ldlang.c
@@ -3704,7 +3704,7 @@ map_input_to_output_sections
processed the segment marker. Originally, the linker
treated segment directives (like -Ttext on the
command-line) as section directives. We honor the
- section directive semantics for backwards compatibilty;
+ section directive semantics for backwards compatibility;
linker scripts that do not specifically check for
SEGMENT_START automatically get the old semantics. */
if (!s->address_statement.segment
@@ -6880,7 +6880,7 @@ lang_process (void)
are any more to be added to the link before we call the
emulation's after_open hook. We create a private list of
input statements for this purpose, which we will eventually
- insert into the global statment list after the first claimed
+ insert into the global statement list after the first claimed
file. */
added = *stat_ptr;
/* We need to manipulate all three chains in synchrony. */
diff --git a/ld/ldmisc.c b/ld/ldmisc.c
index 5efff74..1cea4a7 100644
--- a/ld/ldmisc.c
+++ b/ld/ldmisc.c
@@ -425,7 +425,7 @@ vfinfo (FILE *fp, const char *fmt, va_list arg, bfd_boolean is_warning)
++fmt;
break;
}
- /* Fall thru */
+ /* Fall through */
default:
fprintf (fp, "%%%c", fmt[-1]);
diff --git a/ld/pe-dll.c b/ld/pe-dll.c
index 1f176ec..055a6cf 100644
--- a/ld/pe-dll.c
+++ b/ld/pe-dll.c
@@ -128,7 +128,7 @@
should run in parallel with addresses vector (FirstThunk), i.e. that they
should have same number of elements and terminated with zero. We violate
this, since FirstThunk points directly into machine code. But in practice,
- OS loader implemented the sane way: it goes thru OriginalFirstThunk and
+ OS loader implemented the sane way: it goes through OriginalFirstThunk and
puts addresses to FirstThunk, not something else. It once again should be
noted that dll and symbol name structures are reused across fixup entries
and should be there anyway to support standard import stuff, so sustained
diff --git a/libdecnumber/decBasic.c b/libdecnumber/decBasic.c
index 6fbf48e..5a56595 100644
--- a/libdecnumber/decBasic.c
+++ b/libdecnumber/decBasic.c
@@ -3091,7 +3091,7 @@ decFloat * decFloatQuantize(decFloat *result,
ulsd=BUFOFF+DECPMAX-1;
}
else { /* padding will fit (but may still be too long) */
- /* final-word mask depends on endianess */
+ /* final-word mask depends on endianness */
#if DECLITEND
static const uInt dmask[]={0, 0x000000ff, 0x0000ffff, 0x00ffffff};
#else
diff --git a/libiberty/bcopy.c b/libiberty/bcopy.c
index f9b7a8a..914b698 100644
--- a/libiberty/bcopy.c
+++ b/libiberty/bcopy.c
@@ -1,4 +1,4 @@
-/* bcopy -- copy memory regions of arbitary length
+/* bcopy -- copy memory regions of arbitrary length
@deftypefn Supplemental void bcopy (char *@var{in}, char *@var{out}, int @var{length})
diff --git a/libiberty/cp-demangle.c b/libiberty/cp-demangle.c
index 45663fe..b282986 100644
--- a/libiberty/cp-demangle.c
+++ b/libiberty/cp-demangle.c
@@ -83,7 +83,7 @@
IN_GLIBCPP_V3
If defined, this file defines only __cxa_demangle() and
- __gcclibcxx_demangle_callback(), and no other publically visible
+ __gcclibcxx_demangle_callback(), and no other publicly visible
functions or variables.
STANDALONE_DEMANGLER
diff --git a/libiberty/cplus-dem.c b/libiberty/cplus-dem.c
index 0386da5..e8b8b9f 100644
--- a/libiberty/cplus-dem.c
+++ b/libiberty/cplus-dem.c
@@ -965,7 +965,7 @@ ada_demangle (const char *mangled, int option ATTRIBUTE_UNUSED)
goto unknown;
/* Most of the demangling will trivially remove chars. Operator names
- may add one char but because they are always preceeded by '__' which is
+ may add one char but because they are always preceded by '__' which is
replaced by '.', they eventually never expand the size.
A few special names such as '___elabs' add a few chars (at most 7), but
they occur only once. */
@@ -2738,7 +2738,7 @@ iterate_demangle_function (struct work_stuff *work, const char **mangled,
/* Iterate over occurrences of __, allowing names and types to have a
"__" sequence in them. We must start with the first (not the last)
occurrence, since "__" most often occur between independent mangled
- parts, hence starting at the last occurence inside a signature
+ parts, hence starting at the last occurrence inside a signature
might get us a "successful" demangling of the signature. */
while (scan[2])
diff --git a/libiberty/make-relative-prefix.c b/libiberty/make-relative-prefix.c
index fa81399..fedd865 100644
--- a/libiberty/make-relative-prefix.c
+++ b/libiberty/make-relative-prefix.c
@@ -408,7 +408,7 @@ make_relative_prefix_1 (const char *progname, const char *bin_prefix,
/* Do the full job, including symlink resolution.
This path will find files installed in the same place as the
program even when a soft link has been made to the program
- from somwhere else. */
+ from somewhere else. */
char *
make_relative_prefix (const char *progname, const char *bin_prefix,
diff --git a/libiberty/pex-win32.c b/libiberty/pex-win32.c
index 4c15b0d..9f0d771 100644
--- a/libiberty/pex-win32.c
+++ b/libiberty/pex-win32.c
@@ -350,7 +350,7 @@ argv_to_cmdline (char *const *argv)
/* We only quote arguments that contain spaces, \t or " characters to
prevent wasting 2 chars per argument of the CreateProcess 32k char
limit. We need only escape embedded double-quotes and immediately
- preceeding backslash characters. A sequence of backslach characters
+ preceding backslash characters. A sequence of backslach characters
that is not follwed by a double quote character will not be
escaped. */
needs_quotes = 0;
@@ -363,7 +363,7 @@ argv_to_cmdline (char *const *argv)
if (argv[i][j] == '"')
{
- /* Escape preceeding backslashes. */
+ /* Escape preceding backslashes. */
for (k = j - 1; k >= 0 && argv[i][k] == '\\'; k--)
cmdline_len++;
/* Escape the qote character. */
diff --git a/libiberty/random.c b/libiberty/random.c
index b1d3c6c..f21b8bb 100644
--- a/libiberty/random.c
+++ b/libiberty/random.c
@@ -364,7 +364,7 @@ setstate (PTR arg_state)
\f
/* If we are using the trivial TYPE_0 R.N.G., just do the old linear
congruential bit. Otherwise, we do our fancy trinomial stuff, which is the
- same in all ther other cases due to all the global variables that have been
+ same in all the other cases due to all the global variables that have been
set up. The basic operation is to add the number at the rear pointer into
the one at the front pointer. Then both pointers are advanced to the next
location cyclically in the table. The value returned is the sum generated,
diff --git a/libiberty/regex.c b/libiberty/regex.c
index 6854e3b..8e0efb5 100644
--- a/libiberty/regex.c
+++ b/libiberty/regex.c
@@ -4386,7 +4386,7 @@ wcs_compile_range (CHAR_T range_start_char, const CHAR_T **p_ptr,
{
/* range_start is a collating symbol. */
int32_t *wextra;
- /* Retreive the index and get collation sequence value. */
+ /* Retrieve the index and get collation sequence value. */
wextra = (int32_t*)(extra + char_set[-range_start_char]);
start_val = wextra[1 + *wextra];
}
diff --git a/libiberty/simple-object-mach-o.c b/libiberty/simple-object-mach-o.c
index d1b676d..f46d702 100644
--- a/libiberty/simple-object-mach-o.c
+++ b/libiberty/simple-object-mach-o.c
@@ -1218,7 +1218,7 @@ simple_object_mach_o_write_segment (simple_object_write *sobj, int descriptor,
errmsg, err))
return 0;
- /* Subtract the wrapper section start from the begining of each sub
+ /* Subtract the wrapper section start from the beginning of each sub
section. */
for (i = 1; i < nsects_in; ++i)
diff --git a/libiberty/strsignal.c b/libiberty/strsignal.c
index 666b1b4..7f71152 100644
--- a/libiberty/strsignal.c
+++ b/libiberty/strsignal.c
@@ -152,7 +152,7 @@ static const struct signal_info signal_table[] =
#endif
#if defined (SIGIO)
/* "I/O pending" has also been suggested, but is misleading since the
- signal only happens when the process has asked for it, not everytime
+ signal only happens when the process has asked for it, not every time
I/O is pending. */
ENTRY(SIGIO, "SIGIO", "I/O possible"),
#endif
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index cfe6630..9f31e35 100644
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -29,7 +29,7 @@
these fields where the VALUE will be inserted into CODE. MASK can be zero or
the base mask of the opcode.
- N.B. the fields are required to be in such an order than the least signficant
+ N.B. the fields are required to be in such an order than the least significant
field for VALUE comes the first, e.g. the <index> in
SQDMLAL <Va><d>, <Vb><n>, <Vm>.<Ts>[<index>]
is encoded in H:L:M in some cases, the fields H:L:M should be passed in
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index bcf5232..e445cf7 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -117,7 +117,7 @@ parse_aarch64_dis_options (const char *options)
these fields where the VALUE will be extracted from CODE and returned.
MASK can be zero or the base mask of the opcode.
- N.B. the fields are required to be in such an order than the most signficant
+ N.B. the fields are required to be in such an order than the most significant
field for VALUE comes the first, e.g. the <index> in
SQDMLAL <Va><d>, <Vb><n>, <Vm>.<Ts>[<index>]
is encoded in H:L:M in some cases, the fields H:L:M should be passed in
@@ -3125,7 +3125,7 @@ print_insn_aarch64 (bfd_vma pc,
n = last_mapping_sym;
/* No mapping symbol found at this address. Look backwards
- for a preceeding one. */
+ for a preceding one. */
for (; n >= 0; n--)
{
if (get_sym_code_type (info, n, &type))
diff --git a/opcodes/arc-dis.c b/opcodes/arc-dis.c
index 31b5a91..9abc65b 100644
--- a/opcodes/arc-dis.c
+++ b/opcodes/arc-dis.c
@@ -77,7 +77,7 @@ static int addrtypenames_max = ARC_NUM_ADDRTYPES - 1;
static const char * const addrtypeunknown = "unknown";
/* This structure keeps track which instruction class(es)
- should be ignored durring disassembling. */
+ should be ignored during disassembling. */
typedef struct skipclass
{
@@ -86,7 +86,7 @@ typedef struct skipclass
struct skipclass *nxt;
} skipclass_t, *linkclass;
-/* Intial classes of instructions to be consider first when
+/* Initial classes of instructions to be consider first when
disassembling. */
static linkclass decodelist = NULL;
@@ -399,7 +399,7 @@ find_format (bfd_vma memaddr,
if (opcode == NULL)
{
(*info->fprintf_func) (info->stream, "\
-An error occured while generating the extension instruction operations");
+An error occurred while generating the extension instruction operations");
*opcode_result = NULL;
return FALSE;
}
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index 87d4930..79fad83 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -3342,7 +3342,7 @@ arm_decode_shift (long given, fprintf_ftype func, void *stream,
#define PRE_BIT_SET (given & (1 << P_BIT))
/* Print one coprocessor instruction on INFO->STREAM.
- Return TRUE if the instuction matched, FALSE if this is not a
+ Return TRUE if the instruction matched, FALSE if this is not a
recognised coprocessor instruction. */
static bfd_boolean
@@ -4083,7 +4083,7 @@ print_arm_address (bfd_vma pc, struct disassemble_info *info, long given)
}
/* Print one neon instruction on INFO->STREAM.
- Return TRUE if the instuction matched, FALSE if this is not a
+ Return TRUE if the instruction matched, FALSE if this is not a
recognised neon instruction. */
static bfd_boolean
@@ -6141,10 +6141,10 @@ parse_disassembler_options (char *options)
{
parse_arm_disassembler_option (options);
- /* Skip forward to next seperator. */
+ /* Skip forward to next separator. */
while ((*options) && (! ISSPACE (*options)) && (*options != ','))
++ options;
- /* Skip forward past seperators. */
+ /* Skip forward past separators. */
while (ISSPACE (*options) || (*options == ','))
++ options;
}
diff --git a/opcodes/cgen-asm.c b/opcodes/cgen-asm.c
index 73ac378..da58559 100644
--- a/opcodes/cgen-asm.c
+++ b/opcodes/cgen-asm.c
@@ -60,7 +60,7 @@ cgen_init_parse_operand (CGEN_CPU_DESC cd)
The result is a pointer to the next entry to use.
The table is scanned backwards as additions are made to the front of the
- list and we want earlier ones to be prefered. */
+ list and we want earlier ones to be preferred. */
static CGEN_INSN_LIST *
hash_insn_array (CGEN_CPU_DESC cd,
@@ -156,7 +156,7 @@ build_asm_hash_table (CGEN_CPU_DESC cd)
asm_hash_table, hash_entry_buf);
/* Add runtime added insns.
- Later added insns will be prefered over earlier ones. */
+ Later added insns will be preferred over earlier ones. */
hash_entry_buf = hash_insn_list (cd, insn_table->new_entries,
asm_hash_table, hash_entry_buf);
diff --git a/opcodes/cgen-dis.c b/opcodes/cgen-dis.c
index 2d0f701..d89c492 100644
--- a/opcodes/cgen-dis.c
+++ b/opcodes/cgen-dis.c
@@ -94,7 +94,7 @@ add_insn_to_hash_chain (CGEN_INSN_LIST *hentbuf,
The result is a pointer to the next entry to use.
The table is scanned backwards as additions are made to the front of the
- list and we want earlier ones to be prefered. */
+ list and we want earlier ones to be preferred. */
static CGEN_INSN_LIST *
hash_insn_array (CGEN_CPU_DESC cd,
@@ -210,7 +210,7 @@ build_dis_hash_table (CGEN_CPU_DESC cd)
dis_hash_table, hash_entry_buf);
/* Add runtime added insns.
- Later added insns will be prefered over earlier ones. */
+ Later added insns will be preferred over earlier ones. */
hash_entry_buf = hash_insn_list (cd, insn_table->new_entries,
dis_hash_table, hash_entry_buf);
diff --git a/opcodes/cgen-opc.c b/opcodes/cgen-opc.c
index 543ce32..e8711d9 100644
--- a/opcodes/cgen-opc.c
+++ b/opcodes/cgen-opc.c
@@ -249,7 +249,7 @@ build_keyword_hash_tables (CGEN_KEYWORD *kt)
memset (kt->value_hash_table, 0, size * sizeof (CGEN_KEYWORD_ENTRY *));
/* The table is scanned backwards as we want keywords appearing earlier to
- be prefered over later ones. */
+ be preferred over later ones. */
for (i = kt->num_init_entries - 1; i >= 0; --i)
cgen_keyword_add (kt, &kt->init_entries[i]);
}
diff --git a/opcodes/dis-buf.c b/opcodes/dis-buf.c
index d46c772..76722a8 100644
--- a/opcodes/dis-buf.c
+++ b/opcodes/dis-buf.c
@@ -71,7 +71,7 @@ perror_memory (int status,
}
}
-/* This could be in a separate file, to save miniscule amounts of space
+/* This could be in a separate file, to save minuscule amounts of space
in statically linked executables. */
/* Just print the address is hex. This is included for completeness even
diff --git a/opcodes/epiphany-asm.c b/opcodes/epiphany-asm.c
index 41acc42..9ed5f6e 100644
--- a/opcodes/epiphany-asm.c
+++ b/opcodes/epiphany-asm.c
@@ -742,7 +742,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/epiphany-dis.c b/opcodes/epiphany-dis.c
index 2838b06..89c2479 100644
--- a/opcodes/epiphany-dis.c
+++ b/opcodes/epiphany-dis.c
@@ -537,7 +537,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/fr30-asm.c b/opcodes/fr30-asm.c
index 5c5871b..979c06c 100644
--- a/opcodes/fr30-asm.c
+++ b/opcodes/fr30-asm.c
@@ -597,7 +597,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/fr30-dis.c b/opcodes/fr30-dis.c
index 77ddb50..9761a52 100644
--- a/opcodes/fr30-dis.c
+++ b/opcodes/fr30-dis.c
@@ -558,7 +558,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/frv-asm.c b/opcodes/frv-asm.c
index 05df62d..65c8664 100644
--- a/opcodes/frv-asm.c
+++ b/opcodes/frv-asm.c
@@ -1550,7 +1550,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/frv-dis.c b/opcodes/frv-dis.c
index 663ce36..708e1e6 100644
--- a/opcodes/frv-dis.c
+++ b/opcodes/frv-dis.c
@@ -655,7 +655,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/frv-opc.c b/opcodes/frv-opc.c
index 2aed2f6..3b4e513 100644
--- a/opcodes/frv-opc.c
+++ b/opcodes/frv-opc.c
@@ -441,7 +441,7 @@ match_vliw (VLIW_COMBO *vliw1, VLIW_COMBO *vliw2, int vliw_size)
return TRUE;
}
-/* Find the next vliw vliw in the table that can accomodate the new insn.
+/* Find the next vliw vliw in the table that can accommodate the new insn.
If one is found then return it. Otherwise return NULL. */
static VLIW_COMBO *
diff --git a/opcodes/hppa-dis.c b/opcodes/hppa-dis.c
index 6b3dcde..38e57a6 100644
--- a/opcodes/hppa-dis.c
+++ b/opcodes/hppa-dis.c
@@ -49,7 +49,7 @@ static const char *const fp_reg_names[] =
typedef unsigned int CORE_ADDR;
-/* Get at various relevent fields of an instruction word. */
+/* Get at various relevant fields of an instruction word. */
#define MASK_5 0x1f
#define MASK_10 0x3ff
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 5f49f91..1ebae7a 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -610,7 +610,7 @@ enum
/* Static rounding. */
evex_rounding_mode,
- /* Supress all exceptions. */
+ /* Suppress all exceptions. */
evex_sae_mode,
/* Mask register operand. */
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index ba04ce4..bd4d844 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -556,7 +556,7 @@ enum
/* Static rounding control is supported. */
StaticRounding,
- /* Supress All Exceptions is supported. */
+ /* Suppress All Exceptions is supported. */
SAE,
/* Copressed Disp8*N attribute. */
diff --git a/opcodes/ip2k-asm.c b/opcodes/ip2k-asm.c
index 571f596..4396ea7 100644
--- a/opcodes/ip2k-asm.c
+++ b/opcodes/ip2k-asm.c
@@ -798,7 +798,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/ip2k-dis.c b/opcodes/ip2k-dis.c
index 00b7150..5ed3e5f 100644
--- a/opcodes/ip2k-dis.c
+++ b/opcodes/ip2k-dis.c
@@ -547,7 +547,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/iq2000-asm.c b/opcodes/iq2000-asm.c
index 9cd4a87..19d221f 100644
--- a/opcodes/iq2000-asm.c
+++ b/opcodes/iq2000-asm.c
@@ -746,7 +746,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/iq2000-dis.c b/opcodes/iq2000-dis.c
index 540cdce..499a4ed 100644
--- a/opcodes/iq2000-dis.c
+++ b/opcodes/iq2000-dis.c
@@ -448,7 +448,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/lm32-asm.c b/opcodes/lm32-asm.c
index 416236c..765807b 100644
--- a/opcodes/lm32-asm.c
+++ b/opcodes/lm32-asm.c
@@ -636,7 +636,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/lm32-dis.c b/opcodes/lm32-dis.c
index c25f412..d269efb 100644
--- a/opcodes/lm32-dis.c
+++ b/opcodes/lm32-dis.c
@@ -406,7 +406,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/m32c-asm.c b/opcodes/m32c-asm.c
index 61c6802..2a31e6a 100644
--- a/opcodes/m32c-asm.c
+++ b/opcodes/m32c-asm.c
@@ -1871,7 +1871,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/m32c-dis.c b/opcodes/m32c-dis.c
index 37a5ad1..40b0828 100644
--- a/opcodes/m32c-dis.c
+++ b/opcodes/m32c-dis.c
@@ -1150,7 +1150,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/m32r-asm.c b/opcodes/m32r-asm.c
index 78f905a..f7e9c9b 100644
--- a/opcodes/m32r-asm.c
+++ b/opcodes/m32r-asm.c
@@ -615,7 +615,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/m32r-dis.c b/opcodes/m32r-dis.c
index 35057d5..ddfcd2a 100644
--- a/opcodes/m32r-dis.c
+++ b/opcodes/m32r-dis.c
@@ -538,7 +538,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/m68hc11-opc.c b/opcodes/m68hc11-opc.c
index eee565a..6ca959f 100644
--- a/opcodes/m68hc11-opc.c
+++ b/opcodes/m68hc11-opc.c
@@ -1707,7 +1707,7 @@ const struct m68hc11_opcode m68hc11_opcodes[] = {
{ "sub", M68XG_OP_R_IMM16, 2, 0xc000, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
{ "cmp", M68XG_OP_R_IMM16, 2, 0xd000, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
{ "add", M68XG_OP_R_IMM16, 2, 0xe000, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
- /* ld is for backwards compatability only, the correct opcode is ldw */
+ /* ld is for backwards compatibility only, the correct opcode is ldw */
{ "ld", M68XG_OP_R_IMM16, 2, 0xf000, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
{ "ldw", M68XG_OP_R_IMM16, 2, 0xf000, 0, 0, 0, 0, 0, cpuxgate, 0x0000 }
};
diff --git a/opcodes/m68k-dis.c b/opcodes/m68k-dis.c
index 1e7c830..76d0a66 100644
--- a/opcodes/m68k-dis.c
+++ b/opcodes/m68k-dis.c
@@ -42,7 +42,7 @@ static char *const reg_names[] =
};
/* Name of register halves for MAC/EMAC.
- Seperate from reg_names since 'spu', 'fpl' look weird. */
+ Separate from reg_names since 'spu', 'fpl' look weird. */
static char *const reg_half_names[] =
{
"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
diff --git a/opcodes/m68k-opc.c b/opcodes/m68k-opc.c
index dc07f72..e678e62 100644
--- a/opcodes/m68k-opc.c
+++ b/opcodes/m68k-opc.c
@@ -1517,7 +1517,7 @@ const struct m68k_opcode m68k_opcodes[] =
/* NOTE: The mcf5200 family programmer's reference manual does not
indicate the byte form of the movea instruction is invalid (as it
- is on 68000 family cpus). However, experiments on the 5202 yeild
+ is on 68000 family cpus). However, experiments on the 5202 yield
unexpected results. The value is copied, but it is not sign extended
(as is done with movea.w) and the top three bytes in the address
register are not disturbed. I don't know if this is the intended
diff --git a/opcodes/mep-asm.c b/opcodes/mep-asm.c
index 89116ee..0c1559a 100644
--- a/opcodes/mep-asm.c
+++ b/opcodes/mep-asm.c
@@ -1574,7 +1574,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/mep-dis.c b/opcodes/mep-dis.c
index 14ddb2e..1c926d9 100644
--- a/opcodes/mep-dis.c
+++ b/opcodes/mep-dis.c
@@ -357,7 +357,7 @@ mep_examine_vliw32_insns (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
cop1buflength = 2;
}
- /* Now we have the distrubution set. Print them out. */
+ /* Now we have the distribution set. Print them out. */
status = mep_print_vliw_insns (cd, pc, info, buf, corebuflength,
cop1buflength, cop2buflength);
@@ -446,7 +446,7 @@ mep_examine_vliw64_insns (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
cop1buflength = 6;
}
- /* Now we have the distrubution set. Print them out. */
+ /* Now we have the distribution set. Print them out. */
status = mep_print_vliw_insns (cd, pc, info, buf, corebuflength,
cop1buflength, cop2buflength);
@@ -1446,7 +1446,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/metag-dis.c b/opcodes/metag-dis.c
index 1fdd43d..b6b3d14 100644
--- a/opcodes/metag-dis.c
+++ b/opcodes/metag-dis.c
@@ -2700,7 +2700,7 @@ print_dalu (unsigned int insn_word, bfd_vma pc ATTRIBUTE_UNUSED,
decode_template_definition (insn_word, buf + len,
OPERAND_WIDTH - len);
}
- else /* Not a template definiton. */
+ else /* Not a template definition. */
{
reg_nums[0] = ((insn_word >> 19) & REG_MASK);
reg_nums[1] = ((insn_word >> 14) & REG_MASK);
diff --git a/opcodes/msp430-decode.c b/opcodes/msp430-decode.c
index 137205f..758f3aa 100644
--- a/opcodes/msp430-decode.c
+++ b/opcodes/msp430-decode.c
@@ -347,7 +347,7 @@ msp430_decode_opcode (unsigned long pc,
post_extension_word:
;
- /* 430X extention word. */
+ /* 430X extension word. */
GETBYTE ();
switch (op[0] & 0xff)
{
diff --git a/opcodes/msp430-dis.c b/opcodes/msp430-dis.c
index c057c9b..ae0f4f7 100644
--- a/opcodes/msp430-dis.c
+++ b/opcodes/msp430-dis.c
@@ -136,7 +136,7 @@ msp430_nooperands (struct msp430_opcode_s *opcode,
}
else
{
- strcpy (comm, "return from interupt");
+ strcpy (comm, "return from interrupt");
*cycles = 5;
}
diff --git a/opcodes/mt-asm.c b/opcodes/mt-asm.c
index 87e9d6f..d40c11c 100644
--- a/opcodes/mt-asm.c
+++ b/opcodes/mt-asm.c
@@ -882,7 +882,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/mt-dis.c b/opcodes/mt-dis.c
index e049d20..201b649 100644
--- a/opcodes/mt-dis.c
+++ b/opcodes/mt-dis.c
@@ -549,7 +549,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/ns32k-dis.c b/opcodes/ns32k-dis.c
index b14d5d7..bc831bb 100644
--- a/opcodes/ns32k-dis.c
+++ b/opcodes/ns32k-dis.c
@@ -347,7 +347,7 @@ flip_bytes (char *ptr, int count)
((c) == 'F' || (c) == 'L' || (c) == 'B' \
|| (c) == 'W' || (c) == 'D' || (c) == 'A' || (c) == 'I' || (c) == 'Z')
-/* Adressing modes. */
+/* Addressing modes. */
#define Adrmod_index_byte 0x1c
#define Adrmod_index_word 0x1d
#define Adrmod_index_doubleword 0x1e
diff --git a/opcodes/opintl.h b/opcodes/opintl.h
index 3d811bd..8dad5b2 100644
--- a/opcodes/opintl.h
+++ b/opcodes/opintl.h
@@ -26,7 +26,7 @@
This is because the code in this directory is used to build a library which
will be linked with code in other directories to form programs. We want to
- maintain a seperate translation file for this directory however, rather
+ maintain a separate translation file for this directory however, rather
than being forced to merge it with that of any program linked to
libopcodes. This is a library, so it cannot depend on the catalog
currently loaded.
diff --git a/opcodes/or1k-asm.c b/opcodes/or1k-asm.c
index 91c8136..9902f09 100644
--- a/opcodes/or1k-asm.c
+++ b/opcodes/or1k-asm.c
@@ -790,7 +790,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/or1k-desc.h b/opcodes/or1k-desc.h
index 1ffc0f4..a0cb50b 100644
--- a/opcodes/or1k-desc.h
+++ b/opcodes/or1k-desc.h
@@ -73,7 +73,7 @@ typedef enum spr_groups {
, SPR_GROUP_POWER, SPR_GROUP_PIC, SPR_GROUP_TICK, SPR_GROUP_FPU
} SPR_GROUPS;
-/* Enum declaration for special purpose register indicies. */
+/* Enum declaration for special purpose register indices. */
typedef enum spr_reg_indices {
SPR_INDEX_SYS_VR = 0, SPR_INDEX_SYS_UPR = 1, SPR_INDEX_SYS_CPUCFGR = 2, SPR_INDEX_SYS_DMMUCFGR = 3
, SPR_INDEX_SYS_IMMUCFGR = 4, SPR_INDEX_SYS_DCCFGR = 5, SPR_INDEX_SYS_ICCFGR = 6, SPR_INDEX_SYS_DCFGR = 7
diff --git a/opcodes/or1k-dis.c b/opcodes/or1k-dis.c
index 65a3b32..0f02122 100644
--- a/opcodes/or1k-dis.c
+++ b/opcodes/or1k-dis.c
@@ -400,7 +400,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index 8c59033..a364dc4 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -416,7 +416,7 @@ const struct powerpc_operand powerpc_operands[] =
#define FXM4 FXM + 1
{ 0xff, 12, insert_fxm, extract_fxm,
PPC_OPERAND_OPTIONAL | PPC_OPERAND_OPTIONAL_VALUE},
- /* If the FXM4 operand is ommitted, use the sentinel value -1. */
+ /* If the FXM4 operand is omitted, use the sentinel value -1. */
{ -1, -1, NULL, NULL, 0},
/* The IMM20 field in an LI instruction. */
@@ -705,7 +705,7 @@ const struct powerpc_operand powerpc_operands[] =
#define TBR SV + 1
{ 0x3ff, 11, insert_tbr, extract_tbr,
PPC_OPERAND_OPTIONAL | PPC_OPERAND_OPTIONAL_VALUE},
- /* If the TBR operand is ommitted, use the value 268. */
+ /* If the TBR operand is omitted, use the value 268. */
{ -1, 268, NULL, NULL, 0},
/* The TO field in a D or X form instruction. */
@@ -845,7 +845,7 @@ const struct powerpc_operand powerpc_operands[] =
/* The S field in a XL form instruction. */
#define SXL S + 1
{ 0x1, 11, NULL, NULL, PPC_OPERAND_OPTIONAL | PPC_OPERAND_OPTIONAL_VALUE},
- /* If the SXL operand is ommitted, use the value 1. */
+ /* If the SXL operand is omitted, use the value 1. */
{ -1, 1, NULL, NULL, 0},
/* SH field starting at bit position 16. */
diff --git a/opcodes/sh-dis.c b/opcodes/sh-dis.c
index 7af514b..f2e193f 100644
--- a/opcodes/sh-dis.c
+++ b/opcodes/sh-dis.c
@@ -399,7 +399,7 @@ print_insn_sh (bfd_vma memaddr, struct disassemble_info *info)
target_arch = arch_sh1;
/* SH coff object files lack information about the machine type, so
we end up with bfd_mach_sh unless it was set explicitly (which
- could have happended if this is a call from gdb or the simulator.) */
+ could have happened if this is a call from gdb or the simulator.) */
if (info->symbols
&& bfd_asymbol_flavour(*info->symbols) == bfd_target_coff_flavour)
target_arch = arch_sh4;
diff --git a/opcodes/sh64-dis.c b/opcodes/sh64-dis.c
index e29a4e0..b8da0b8 100644
--- a/opcodes/sh64-dis.c
+++ b/opcodes/sh64-dis.c
@@ -44,7 +44,7 @@ struct sh64_disassemble_info
unsigned int address_reg;
bfd_signed_vma built_address;
- /* This is the range decriptor for the current address. It is kept
+ /* This is the range descriptor for the current address. It is kept
around for the next call. */
sh64_elf_crange crange;
};
diff --git a/opcodes/tic30-dis.c b/opcodes/tic30-dis.c
index 614da14..07b25f9 100644
--- a/opcodes/tic30-dis.c
+++ b/opcodes/tic30-dis.c
@@ -687,7 +687,7 @@ print_insn_tic30 (bfd_vma pc, disassemble_info *info)
insn_word = (*(info->buffer + bufaddr) << 24) | (*(info->buffer + bufaddr + 1) << 16) |
(*(info->buffer + bufaddr + 2) << 8) | *(info->buffer + bufaddr + 3);
_pc = pc / 4;
- /* Get the instruction refered to by the current instruction word
+ /* Get the instruction referred to by the current instruction word
and print it out based on its type. */
if (!get_tic30_instruction (insn_word, &insn))
return -1;
diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c
index d5e54a5..b1d47d3 100644
--- a/opcodes/v850-opc.c
+++ b/opcodes/v850-opc.c
@@ -1329,7 +1329,7 @@ const struct v850_operand v850_operands[] =
sorted by major opcode.
The table is also sorted by name. This is used by the assembler.
- When parsing an instruction the assembler finds the first occurance
+ When parsing an instruction the assembler finds the first occurrence
of the name of the instruciton in this table and then attempts to
match the instruction's arguments with description of the operands
associated with the entry it has just found in this table. If the
diff --git a/opcodes/xc16x-asm.c b/opcodes/xc16x-asm.c
index 509cbaa..ffb114c 100644
--- a/opcodes/xc16x-asm.c
+++ b/opcodes/xc16x-asm.c
@@ -663,7 +663,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/xc16x-dis.c b/opcodes/xc16x-dis.c
index c8e67d4..951cb2e 100644
--- a/opcodes/xc16x-dis.c
+++ b/opcodes/xc16x-dis.c
@@ -679,7 +679,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/xstormy16-asm.c b/opcodes/xstormy16-asm.c
index bd91d82..f74a98a 100644
--- a/opcodes/xstormy16-asm.c
+++ b/opcodes/xstormy16-asm.c
@@ -563,7 +563,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/xstormy16-dis.c b/opcodes/xstormy16-dis.c
index 2c273d4..df9f36b 100644
--- a/opcodes/xstormy16-dis.c
+++ b/opcodes/xstormy16-dis.c
@@ -427,7 +427,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/xtensa-dis.c b/opcodes/xtensa-dis.c
index db3bbee..27de320 100644
--- a/opcodes/xtensa-dis.c
+++ b/opcodes/xtensa-dis.c
@@ -160,7 +160,7 @@ print_insn_xtensa (bfd_vma memaddr, struct disassemble_info *info)
an 80-column screen.) The value of bytes_per_line here is not exactly
right, because objdump adds an extra space for each chunk so that the
amount of whitespace depends on the chunk size. Oh well, it's good
- enough.... Note that we set the minimum size to 4 to accomodate
+ enough.... Note that we set the minimum size to 4 to accommodate
literal pools. */
info->bytes_per_line = MAX (maxsize, 4);
diff --git a/readline/display.c b/readline/display.c
index 9044305..8086f23 100644
--- a/readline/display.c
+++ b/readline/display.c
@@ -1544,7 +1544,7 @@ update_line (old, new, current_line, omax, nmax, inv_botlin)
o_cpos = _rl_last_c_pos;
/* When this function returns, _rl_last_c_pos is correct, and an absolute
- cursor postion in multibyte mode, but a buffer index when not in a
+ cursor position in multibyte mode, but a buffer index when not in a
multibyte locale. */
_rl_move_cursor_relative (od, old);
#if 1
diff --git a/readline/examples/rlfe/rlfe.c b/readline/examples/rlfe/rlfe.c
index eacd5ab..7886448 100644
--- a/readline/examples/rlfe/rlfe.c
+++ b/readline/examples/rlfe/rlfe.c
@@ -127,7 +127,7 @@ static int hist_size = 0;
we're actually editing. Then we send the line to the inferior, and the
terminal driver send back an extra echo.
The work-around is to remember the input lines, and when we see that
- line come back, we supress the output.
+ line come back, we suppress the output.
A better solution (supposedly available on SVR4) would be a smarter
terminal driver, with more flags ... */
#define ECHO_SUPPRESS_MAX 1024
diff --git a/readline/examples/rlptytest.c b/readline/examples/rlptytest.c
index 79257db..d1893ed 100644
--- a/readline/examples/rlptytest.c
+++ b/readline/examples/rlptytest.c
@@ -213,7 +213,7 @@ static enum { RESET, TCBREAK } ttystate = RESET;
*
* fd - The file descriptor of the terminal
*
- * Returns: 0 on sucess, -1 on error
+ * Returns: 0 on success, -1 on error
*/
int tty_cbreak(int fd){
struct termios buf;
diff --git a/readline/histexpand.c b/readline/histexpand.c
index 8fb3798..a1a828c 100644
--- a/readline/histexpand.c
+++ b/readline/histexpand.c
@@ -81,7 +81,7 @@ char history_expansion_char = '!';
char history_subst_char = '^';
/* During tokenization, if this character is seen as the first character
- of a word, then it, and all subsequent characters upto a newline are
+ of a word, then it, and all subsequent characters up to a newline are
ignored. For a Bourne shell, this should be '#'. Bash special cases
the interactive comment character to not be a comment delimiter. */
char history_comment_char = '\0';
@@ -894,7 +894,7 @@ history_expand_internal (string, start, end_index_ptr, ret_string, current_line)
1) If expansions did take place
2) If the `p' modifier was given and the caller should print the result
- If an error ocurred in expansion, then OUTPUT contains a descriptive
+ If an error occurred in expansion, then OUTPUT contains a descriptive
error message. */
#define ADD_STRING(s) \
diff --git a/readline/history.h b/readline/history.h
index 1257e66..c8af47e 100644
--- a/readline/history.h
+++ b/readline/history.h
@@ -216,7 +216,7 @@ extern int history_truncate_file PARAMS((const char *, int));
-1) If there was an error in expansion.
2) If the returned line should just be printed.
- If an error ocurred in expansion, then OUTPUT contains a descriptive
+ If an error occurred in expansion, then OUTPUT contains a descriptive
error message. */
extern int history_expand PARAMS((char *, char **));
diff --git a/readline/input.c b/readline/input.c
index e35277f..a40b45e 100644
--- a/readline/input.c
+++ b/readline/input.c
@@ -539,7 +539,7 @@ rl_getc (stream)
/* If the error that we received was SIGINT, then try again,
this is simply an interrupted system call to read ().
- Otherwise, some error ocurred, also signifying EOF. */
+ Otherwise, some error occurred, also signifying EOF. */
if (errno != EINTR)
return (RL_ISSTATE (RL_STATE_READCMD) ? READERR : EOF);
}
diff --git a/readline/readline.c b/readline/readline.c
index 071e1aa..ca0946f 100644
--- a/readline/readline.c
+++ b/readline/readline.c
@@ -238,7 +238,7 @@ int rl_erase_empty_line = 0;
character bound to accept-line. */
int rl_num_chars_to_read;
-/* Line buffer and maintenence. */
+/* Line buffer and maintenance. */
char *rl_line_buffer = (char *)NULL;
int rl_line_buffer_len = 0;
diff --git a/readline/rlprivate.h b/readline/rlprivate.h
index 384ff67..7092842 100644
--- a/readline/rlprivate.h
+++ b/readline/rlprivate.h
@@ -189,7 +189,7 @@ extern int rl_blink_matching_paren;
/*************************************************************************
* *
- * Global functions and variables unsed and undocumented *
+ * Global functions and variables unused and undocumented *
* *
*************************************************************************/
diff --git a/readline/text.c b/readline/text.c
index 536e31a..2b09f3c 100644
--- a/readline/text.c
+++ b/readline/text.c
@@ -240,7 +240,7 @@ rl_replace_line (text, clear_undo)
this is the same as rl_end.
Any command that is called interactively receives two arguments.
- The first is a count: the numeric arg pased to this command.
+ The first is a count: the numeric arg passed to this command.
The second is the key which invoked this command.
*/
diff --git a/zlib/contrib/minizip/ioapi.h b/zlib/contrib/minizip/ioapi.h
index 8dcbdb0..e19f5c2 100644
--- a/zlib/contrib/minizip/ioapi.h
+++ b/zlib/contrib/minizip/ioapi.h
@@ -82,7 +82,7 @@
#include "mz64conf.h"
#endif
-/* a type choosen by DEFINE */
+/* a type chosen by DEFINE */
#ifdef HAVE_64BIT_INT_CUSTOM
typedef 64BIT_INT_CUSTOM_TYPE ZPOS64_T;
#else
diff --git a/zlib/contrib/minizip/miniunz.c b/zlib/contrib/minizip/miniunz.c
index 3d65401b..6ca6858 100644
--- a/zlib/contrib/minizip/miniunz.c
+++ b/zlib/contrib/minizip/miniunz.c
@@ -607,7 +607,7 @@ int main(argc,argv)
# endif
strncpy(filename_try, zipfilename,MAXFILENAME-1);
- /* strncpy doesnt append the trailing NULL, of the string is too long. */
+ /* strncpy doesn't append the trailing NULL, of the string is too long. */
filename_try[ MAXFILENAME ] = '\0';
# ifdef USEWIN32IOAPI
diff --git a/zlib/contrib/minizip/minizip.c b/zlib/contrib/minizip/minizip.c
index 4288962..b13ca60 100644
--- a/zlib/contrib/minizip/minizip.c
+++ b/zlib/contrib/minizip/minizip.c
@@ -113,7 +113,7 @@ uLong filetime(f, tmzip, dt)
len = MAXFILENAME;
strncpy(name, f,MAXFILENAME-1);
- /* strncpy doesnt append the trailing NULL, of the string is too long. */
+ /* strncpy doesn't append the trailing NULL, of the string is too long. */
name[ MAXFILENAME ] = '\0';
if (name[len - 1] == '/')
@@ -322,7 +322,7 @@ int main(argc,argv)
zipok = 1 ;
strncpy(filename_try, argv[zipfilenamearg],MAXFILENAME-1);
- /* strncpy doesnt append the trailing NULL, of the string is too long. */
+ /* strncpy doesn't append the trailing NULL, of the string is too long. */
filename_try[ MAXFILENAME ] = '\0';
len=(int)strlen(filename_try);
diff --git a/zlib/contrib/minizip/unzip.c b/zlib/contrib/minizip/unzip.c
index 9093504..cbc482c 100644
--- a/zlib/contrib/minizip/unzip.c
+++ b/zlib/contrib/minizip/unzip.c
@@ -53,7 +53,7 @@
Oct-2009 - Mathias Svensson - Fixed problem if uncompressed size was > 4G and compressed size was <4G
should only read the compressed/uncompressed size from the Zip64 format if
the size from normal header was 0xFFFFFFFF
- Oct-2009 - Mathias Svensson - Applied some bug fixes from paches recived from Gilles Vollant
+ Oct-2009 - Mathias Svensson - Applied some bug fixes from paches received from Gilles Vollant
Oct-2009 - Mathias Svensson - Applied support to unzip files with compression mathod BZIP2 (bzip2 lib is required)
Patch created by Daniel Borca
@@ -200,7 +200,7 @@ typedef struct
/* ===========================================================================
Read a byte from a gz_stream; update next_in and avail_in. Return EOF
for end of file.
- IN assertion: the stream s has been sucessfully opened for reading.
+ IN assertion: the stream s has been successfully opened for reading.
*/
@@ -380,8 +380,8 @@ local int strcmpcasenosensitive_internal (const char* fileName1, const char* fil
/*
Compare two filename (fileName1,fileName2).
- If iCaseSenisivity = 1, comparision is case sensitivity (like strcmp)
- If iCaseSenisivity = 2, comparision is not case sensitivity (like strcmpi
+ If iCaseSenisivity = 1, comparison is case sensitivity (like strcmp)
+ If iCaseSenisivity = 2, comparison is not case sensitivity (like strcmpi
or strcasecmp)
If iCaseSenisivity = 0, case sensitivity is defaut of your operating system
(like 1 on Unix, 2 on Windows)
diff --git a/zlib/contrib/minizip/unzip.h b/zlib/contrib/minizip/unzip.h
index 2104e39..9e7378d 100644
--- a/zlib/contrib/minizip/unzip.h
+++ b/zlib/contrib/minizip/unzip.h
@@ -155,8 +155,8 @@ extern int ZEXPORT unzStringFileNameCompare OF ((const char* fileName1,
int iCaseSensitivity));
/*
Compare two filename (fileName1,fileName2).
- If iCaseSenisivity = 1, comparision is case sensitivity (like strcmp)
- If iCaseSenisivity = 2, comparision is not case sensitivity (like strcmpi
+ If iCaseSenisivity = 1, comparison is case sensitivity (like strcmp)
+ If iCaseSenisivity = 2, comparison is not case sensitivity (like strcmpi
or strcasecmp)
If iCaseSenisivity = 0, case sensitivity is defaut of your operating system
(like 1 on Unix, 2 on Windows)
diff --git a/zlib/contrib/minizip/zip.c b/zlib/contrib/minizip/zip.c
index ea54853..976aad0 100644
--- a/zlib/contrib/minizip/zip.c
+++ b/zlib/contrib/minizip/zip.c
@@ -15,7 +15,7 @@
Oct-2009 - Mathias Svensson - Did some code cleanup and refactoring to get better overview of some functions.
Oct-2009 - Mathias Svensson - Added zipRemoveExtraInfoBlock to strip extra field data from its ZIP64 data
It is used when recreting zip archive with RAW when deleting items from a zip.
- ZIP64 data is automaticly added to items that needs it, and existing ZIP64 data need to be removed.
+ ZIP64 data is automatically added to items that needs it, and existing ZIP64 data need to be removed.
Oct-2009 - Mathias Svensson - Added support for BZIP2 as compression mode (bzip2 lib is required)
Jan-2010 - back to unzip and minizip 1.0 name scheme, with compatibility layer
diff --git a/zlib/examples/enough.c b/zlib/examples/enough.c
index b991144..b81f502 100644
--- a/zlib/examples/enough.c
+++ b/zlib/examples/enough.c
@@ -402,7 +402,7 @@ local void examine(int syms, int len, int left, int mem, int rem)
requires that maximum. Uses the globals max, root, and num. */
local void enough(int syms)
{
- int n; /* number of remaing symbols for this node */
+ int n; /* number of remaining symbols for this node */
int left; /* number of unused bit patterns at this length */
size_t index; /* index of this case in *num */
diff --git a/zlib/examples/zran.c b/zlib/examples/zran.c
index 278f9ad..b8c87e4 100644
--- a/zlib/examples/zran.c
+++ b/zlib/examples/zran.c
@@ -19,7 +19,7 @@
An access point can be created at the start of any deflate block, by saving
the starting file offset and bit of that block, and the 32K bytes of
uncompressed data that precede that block. Also the uncompressed offset of
- that block is saved to provide a referece for locating a desired starting
+ that block is saved to provide a reference for locating a desired starting
point in the uncompressed stream. build_index() works by decompressing the
input zlib or gzip stream a block at a time, and at the end of each block
deciding if enough uncompressed data has gone by to justify the creation of
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 07/23] Fix spelling mistakes in comments in shell scripts
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
` (3 preceding siblings ...)
2016-11-20 17:39 ` [PATCH 03/23] Fix spelling mistakes in comments in C source files (sim) Ambrogino Modigliani
@ 2016-11-20 17:39 ` Ambrogino Modigliani
2016-11-22 16:07 ` Pedro Alves
2016-11-20 17:39 ` [PATCH 04/23] Fix spelling mistakes in comments in C source files (rest of modules) Ambrogino Modigliani
` (17 subsequent siblings)
22 siblings, 1 reply; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:39 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
gdb/ChangeLog:
* gdb/contrib/expect-read1.sh: Fix spelling in comments.
* gdb/gdb_buildall.sh: Fix spelling in comments.
* gdb/gdb_mbuildw.sh: Fix spelling in comments.
gdb/testsuite/ChangeLog:
* gdb/testsuite/dg-extract-results.sh: Fix spelling in comments.
ld/ChangeLog:
* ld/emulparams/elf32mcore.sh: Fix spelling in comments.
---
gdb/contrib/expect-read1.sh | 2 +-
gdb/gdb_buildall.sh | 2 +-
gdb/gdb_mbuild.sh | 4 ++--
| 2 +-
ld/emulparams/elf32mcore.sh | 4 ++--
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/gdb/contrib/expect-read1.sh b/gdb/contrib/expect-read1.sh
index cc9d811..a0251d2 100644
--- a/gdb/contrib/expect-read1.sh
+++ b/gdb/contrib/expect-read1.sh
@@ -15,7 +15,7 @@
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
-# This tool excercise any incomplete reads handling in the testsuite by
+# This tool exercise any incomplete reads handling in the testsuite by
# simulating read always returns just 1 character.
# Testsuite incompatibilities are tracked as GDB PR testsuite/12649.
diff --git a/gdb/gdb_buildall.sh b/gdb/gdb_buildall.sh
index 1fc7b38..ed3ffb5 100644
--- a/gdb/gdb_buildall.sh
+++ b/gdb/gdb_buildall.sh
@@ -103,7 +103,7 @@ builddir=`cd $2 && /bin/pwd` || exit 1
make=${MAKE:-make}
MAKE=${make}
export MAKE
-# We dont want GDB do dump cores.
+# We don't want GDB do dump cores.
ulimit -c 0
# Just make sure we're in the right directory.
diff --git a/gdb/gdb_mbuild.sh b/gdb/gdb_mbuild.sh
index 08927f1..da0c19a 100755
--- a/gdb/gdb_mbuild.sh
+++ b/gdb/gdb_mbuild.sh
@@ -195,7 +195,7 @@ log ()
-# Warn the user of what is comming, print the list of targets
+# Warn the user of what is coming, print the list of targets
echo "$alltarg"
echo ""
@@ -273,7 +273,7 @@ do
then
# Iff the build fails remove the final build target so that
# the follow-on code knows things failed. Stops the follow-on
- # code thinking that a failed rebuild succedded (executable
+ # code thinking that a failed rebuild succeeded (executable
# left around from previous build).
echo ... ${make} ${keepgoing} ${makejobs} ${target}
( ${make} ${keepgoing} ${makejobs} all-gdb || rm -f gdb/gdb gdb/gdb.exe
--git a/gdb/testsuite/dg-extract-results.sh b/gdb/testsuite/dg-extract-results.sh
index ffea0a3..18734b4 100755
--- a/gdb/testsuite/dg-extract-results.sh
+++ b/gdb/testsuite/dg-extract-results.sh
@@ -267,7 +267,7 @@ cat $SUM_FILES \
| $AWK '/^Running/ { if ($2 != "target" && $3 == "...") print "EXPFILE: "$2 } ' \
| sort -u > ${TMP}/expfiles
-# Write the begining of the combined summary file.
+# Write the beginning of the combined summary file.
head -n 2 $FIRST_SUM
echo
diff --git a/ld/emulparams/elf32mcore.sh b/ld/emulparams/elf32mcore.sh
index 512a9b0..e7d0134 100644
--- a/ld/emulparams/elf32mcore.sh
+++ b/ld/emulparams/elf32mcore.sh
@@ -13,11 +13,11 @@ EMBEDDED=yes
# There is a problem with the NOP value - it must work for both
# big endian and little endian systems. Unfortunately there is
# no symmetrical mcore opcode that functions as a noop. The
-# chosen solution is to use "tst r0, r14". This is a symetrical
+# chosen solution is to use "tst r0, r14". This is a symmetrical
# value, and apart from the corruption of the C bit, it has no other
# side effects. Since the carry bit is never tested without being
# explicitly set first, and since the NOP code is only used as a
-# fill value between independantly viable peices of code, it should
+# fill value between independently viable peices of code, it should
# not matter.
NOP=0x0e0e0e0e
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 02/23] Fix spelling mistakes in comments in C source files (gdb)
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
2016-11-20 17:38 ` [PATCH 01/23] Fix spelling mistakes in comments in C source files (bfd) Ambrogino Modigliani
2016-11-20 17:39 ` [PATCH 08/23] Fix spelling mistakes in comments in Ada source files Ambrogino Modigliani
@ 2016-11-20 17:39 ` Ambrogino Modigliani
2016-11-21 15:43 ` Yao Qi
2016-11-20 17:39 ` [PATCH 03/23] Fix spelling mistakes in comments in C source files (sim) Ambrogino Modigliani
` (19 subsequent siblings)
22 siblings, 1 reply; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:39 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
gdb/ChangeLog:
* gdb/ada-lang.c: Fix spelling in comments.
* gdb/ada-tasks.c: Fix spelling in comments.
* gdb/alpha-tdep.c: Fix spelling in comments.
* gdb/alpha-tdep.h: Fix spelling in comments.
* gdb/alphafbsd-tdep.c: Fix spelling in comments.
* gdb/amd64-linux-nat.c: Fix spelling in comments.
* gdb/amd64-nat.c: Fix spelling in comments.
* gdb/amd64-tdep.c: Fix spelling in comments.
* gdb/amd64-windows-tdep.c: Fix spelling in comments.
* gdb/amd64obsd-tdep.c: Fix spelling in comments.
* gdb/arch-utils.c: Fix spelling in comments.
* gdb/arm-linux-nat.c: Fix spelling in comments.
* gdb/arm-linux-tdep.c: Fix spelling in comments.
* gdb/arm-tdep.c: Fix spelling in comments.
* gdb/auxv.c: Fix spelling in comments.
* gdb/ax-gdb.c: Fix spelling in comments.
* gdb/bcache.c: Fix spelling in comments.
* gdb/breakpoint.c: Fix spelling in comments.
* gdb/breakpoint.h: Fix spelling in comments.
* gdb/c-varobj.c: Fix spelling in comments.
* gdb/cli/cli-cmds.c: Fix spelling in comments.
* gdb/cli/cli-decode.c: Fix spelling in comments.
* gdb/cli/cli-interp.c: Fix spelling in comments.
* gdb/cli/cli-script.c: Fix spelling in comments.
* gdb/coffread.c: Fix spelling in comments.
* gdb/common/buffer.h: Fix spelling in comments.
* gdb/common/common-exceptions.c: Fix spelling in comments.
* gdb/common/gdb_signals.h: Fix spelling in comments.
* gdb/common/signals.c: Fix spelling in comments.
* gdb/complaints.c: Fix spelling in comments.
* gdb/corefile.c: Fix spelling in comments.
* gdb/cp-valprint.c: Fix spelling in comments.
* gdb/cris-tdep.c: Fix spelling in comments.
* gdb/darwin-nat.c: Fix spelling in comments.
* gdb/dbxread.c: Fix spelling in comments.
* gdb/dcache.c: Fix spelling in comments.
* gdb/doublest.c: Fix spelling in comments.
* gdb/dtrace-probe.c: Fix spelling in comments.
* gdb/dwarf2-frame.c: Fix spelling in comments.
* gdb/dwarf2loc.c: Fix spelling in comments.
* gdb/dwarf2read.c: Fix spelling in comments.
* gdb/eval.c: Fix spelling in comments.
* gdb/event-loop.c: Fix spelling in comments.
* gdb/event-top.c: Fix spelling in comments.
* gdb/exec.h: Fix spelling in comments.
* gdb/extension.c: Fix spelling in comments.
* gdb/frame-base.h: Fix spelling in comments.
* gdb/frame.c: Fix spelling in comments.
* gdb/frame.h: Fix spelling in comments.
* gdb/gdb.h: Fix spelling in comments.
* gdb/gdbtypes.c: Fix spelling in comments.
* gdb/gnu-nat.c: Fix spelling in comments.
* gdb/go32-nat.c: Fix spelling in comments.
* gdb/hppa-tdep.c: Fix spelling in comments.
* gdb/i386-linux-nat.c: Fix spelling in comments.
* gdb/i386-tdep.c: Fix spelling in comments.
* gdb/i386fbsd-nat.c: Fix spelling in comments.
* gdb/i386obsd-tdep.c: Fix spelling in comments.
* gdb/ia64-tdep.c: Fix spelling in comments.
* gdb/ia64-tdep.h: Fix spelling in comments.
* gdb/inf-ptrace.c: Fix spelling in comments.
* gdb/infcall.c: Fix spelling in comments.
* gdb/infcmd.c: Fix spelling in comments.
* gdb/infrun.c: Fix spelling in comments.
* gdb/linespec.c: Fix spelling in comments.
* gdb/linux-nat.c: Fix spelling in comments.
* gdb/linux-tdep.c: Fix spelling in comments.
* gdb/m32r-linux-nat.c: Fix spelling in comments.
* gdb/m32r-tdep.c: Fix spelling in comments.
* gdb/m68klinux-nat.c: Fix spelling in comments.
* gdb/macroexp.h: Fix spelling in comments.
* gdb/macrotab.h: Fix spelling in comments.
* gdb/mdebugread.c: Fix spelling in comments.
* gdb/mep-tdep.c: Fix spelling in comments.
* gdb/mi/mi-cmds.c: Fix spelling in comments.
* gdb/mi/mi-getopt.h: Fix spelling in comments.
* gdb/mi/mi-main.c: Fix spelling in comments.
* gdb/microblaze-tdep.c: Fix spelling in comments.
* gdb/mips-tdep.c: Fix spelling in comments.
* gdb/moxie-tdep.c: Fix spelling in comments.
* gdb/mt-tdep.c: Fix spelling in comments.
* gdb/nto-procfs.c: Fix spelling in comments.
* gdb/nto-tdep.h: Fix spelling in comments.
* gdb/objc-lang.c: Fix spelling in comments.
* gdb/ppc-linux-nat.c: Fix spelling in comments.
* gdb/ppc-linux-tdep.c: Fix spelling in comments.
* gdb/printcmd.c: Fix spelling in comments.
* gdb/procfs.c: Fix spelling in comments.
* gdb/prologue-value.h: Fix spelling in comments.
* gdb/remote.c: Fix spelling in comments.
* gdb/remote-fileio.c: Fix spelling in comments.
* gdb/rs6000-aix-tdep.c: Fix spelling in comments.
* gdb/rs6000-lynx178-tdep.c: Fix spelling in comments.
* gdb/rs6000-tdep.c: Fix spelling in comments.
* gdb/rust-lang.h: Fix spelling in comments.
* gdb/s390-linux-tdep.c: Fix spelling in comments.
* gdb/ser-base.c: Fix spelling in comments.
* gdb/ser-go32.c: Fix spelling in comments.
* gdb/ser-mingw.c: Fix spelling in comments.
* gdb/sh-tdep.c: Fix spelling in comments.
* gdb/sh64-tdep.c: Fix spelling in comments.
* gdb/sol-thread.c: Fix spelling in comments.
* gdb/solib-svr4.c: Fix spelling in comments.
* gdb/solib.c: Fix spelling in comments.
* gdb/sparc-sol2-tdep.c: Fix spelling in comments.
* gdb/sparc-tdep.c: Fix spelling in comments.
* gdb/sparc64-tdep.c: Fix spelling in comments.
* gdb/stabsread.c: Fix spelling in comments.
* gdb/stabsread.h: Fix spelling in comments.
* gdb/stack.c: Fix spelling in comments.
* gdb/stubs/ia64vms-stub.c: Fix spelling in comments.
* gdb/stubs/m32r-stub.c: Fix spelling in comments.
* gdb/stubs/m68k-stub.c: Fix spelling in comments.
* gdb/symfile.c: Fix spelling in comments.
* gdb/symtab.c: Fix spelling in comments.
* gdb/target.c: Fix spelling in comments.
* gdb/target.h: Fix spelling in comments.
* gdb/target/waitstatus.h: Fix spelling in comments.
* gdb/thread.c: Fix spelling in comments.
* gdb/tilegx-linux-nat.c: Fix spelling in comments.
* gdb/tracepoint.c: Fix spelling in comments.
* gdb/tui/tui-file.c: Fix spelling in comments.
* gdb/tui/tui-win.c: Fix spelling in comments.
* gdb/tui/tui-wingeneral.c: Fix spelling in comments.
* gdb/tui/tui.h: Fix spelling in comments.
* gdb/utils.c: Fix spelling in comments.
* gdb/v850-tdep.c: Fix spelling in comments.
* gdb/valops.c: Fix spelling in comments.
* gdb/windows-nat.c: Fix spelling in comments.
* gdb/xtensa-tdep.c: Fix spelling in comments.
gdb/gdbserver/ChangeLog:
* gdb/gdbserver/event-loop.c: Fix spelling in comments.
* gdb/gdbserver/linux-aarch64-low.c: Fix spelling in comments.
* gdb/gdbserver/linux-arm-low.c: Fix spelling in comments.
* gdb/gdbserver/linux-low.c: Fix spelling in comments.
* gdb/gdbserver/linux-ppc-low.c: Fix spelling in comments.
* gdb/gdbserver/nto-low.c: Fix spelling in comments.
* gdb/gdbserver/server.c: Fix spelling in comments.
* gdb/gdbserver/server.h: Fix spelling in comments.
* gdb/gdbserver/tracepoint.c: Fix spelling in comments.
* gdb/gdbserver/win32-low.c: Fix spelling in comments.
gdb/testsuite/ChangeLog:
* gdb/testsuite/gdb.base/d10vovly.c: Fix spelling in comments.
* gdb/testsuite/gdb.base/m32rovly.c: Fix spelling in comments.
* gdb/testsuite/gdb.base/ovlymgr.c: Fix spelling in comments.
* gdb/testsuite/gdb.base/scope0.c: Fix spelling in comments.
* gdb/testsuite/gdb.base/sigrepeat.c: Fix spelling in comments.
* gdb/testsuite/lib/compiler.c: Fix spelling in comments.
* gdb/testsuite/lib/compiler.cc: Fix spelling in comments.
---
gdb/ada-lang.c | 16 ++++++++--------
gdb/ada-tasks.c | 4 ++--
gdb/alpha-tdep.c | 2 +-
gdb/alpha-tdep.h | 4 ++--
gdb/alphafbsd-tdep.c | 4 ++--
gdb/amd64-linux-nat.c | 4 ++--
gdb/amd64-nat.c | 2 +-
gdb/amd64-tdep.c | 2 +-
gdb/amd64-windows-tdep.c | 2 +-
gdb/amd64obsd-tdep.c | 2 +-
gdb/arch-utils.c | 2 +-
gdb/arm-linux-nat.c | 2 +-
gdb/arm-linux-tdep.c | 2 +-
gdb/arm-tdep.c | 10 +++++-----
gdb/auxv.c | 2 +-
gdb/ax-gdb.c | 2 +-
gdb/bcache.c | 2 +-
gdb/breakpoint.c | 2 +-
gdb/breakpoint.h | 2 +-
gdb/c-varobj.c | 2 +-
gdb/cli/cli-cmds.c | 2 +-
gdb/cli/cli-decode.c | 2 +-
gdb/cli/cli-interp.c | 4 ++--
gdb/cli/cli-script.c | 4 ++--
gdb/coffread.c | 4 ++--
gdb/common/buffer.h | 2 +-
gdb/common/common-exceptions.c | 2 +-
gdb/common/gdb_signals.h | 4 ++--
gdb/common/signals.c | 2 +-
gdb/complaints.c | 4 ++--
gdb/corefile.c | 2 +-
gdb/cp-valprint.c | 2 +-
gdb/cris-tdep.c | 6 +++---
gdb/darwin-nat.c | 2 +-
gdb/dbxread.c | 4 ++--
gdb/dcache.c | 2 +-
gdb/doublest.c | 2 +-
gdb/dtrace-probe.c | 2 +-
gdb/dwarf2-frame.c | 8 ++++----
gdb/dwarf2loc.c | 2 +-
gdb/dwarf2read.c | 4 ++--
gdb/eval.c | 2 +-
gdb/event-loop.c | 4 ++--
gdb/event-top.c | 2 +-
gdb/exec.h | 2 +-
gdb/extension.c | 2 +-
gdb/frame-base.h | 2 +-
gdb/frame.c | 2 +-
gdb/frame.h | 2 +-
gdb/gdb.h | 4 ++--
gdb/gdbserver/event-loop.c | 2 +-
gdb/gdbserver/linux-aarch64-low.c | 2 +-
gdb/gdbserver/linux-arm-low.c | 2 +-
gdb/gdbserver/linux-low.c | 2 +-
gdb/gdbserver/linux-ppc-low.c | 2 +-
gdb/gdbserver/nto-low.c | 2 +-
gdb/gdbserver/server.c | 6 +++---
gdb/gdbserver/server.h | 2 +-
gdb/gdbserver/tracepoint.c | 2 +-
gdb/gdbserver/win32-low.c | 6 +++---
gdb/gdbtypes.c | 12 ++++++------
gdb/gnu-nat.c | 4 ++--
gdb/go32-nat.c | 2 +-
gdb/hppa-tdep.c | 4 ++--
gdb/i386-linux-nat.c | 8 ++++----
gdb/i386-tdep.c | 4 ++--
gdb/i386fbsd-nat.c | 2 +-
gdb/i386obsd-tdep.c | 2 +-
gdb/ia64-tdep.c | 2 +-
gdb/ia64-tdep.h | 2 +-
gdb/inf-ptrace.c | 2 +-
gdb/infcall.c | 2 +-
gdb/infcmd.c | 8 ++++----
gdb/infrun.c | 4 ++--
gdb/linespec.c | 2 +-
gdb/linux-nat.c | 4 ++--
gdb/linux-tdep.c | 4 ++--
gdb/m32r-linux-nat.c | 4 ++--
gdb/m32r-tdep.c | 2 +-
gdb/m68klinux-nat.c | 4 ++--
gdb/macroexp.h | 2 +-
gdb/macrotab.h | 2 +-
gdb/mdebugread.c | 10 +++++-----
gdb/mep-tdep.c | 2 +-
gdb/mi/mi-cmds.c | 2 +-
gdb/mi/mi-getopt.h | 2 +-
gdb/mi/mi-main.c | 2 +-
gdb/microblaze-tdep.c | 2 +-
gdb/mips-tdep.c | 38 +++++++++++++++++++-------------------
gdb/moxie-tdep.c | 2 +-
gdb/mt-tdep.c | 2 +-
gdb/nto-procfs.c | 4 ++--
gdb/nto-tdep.h | 2 +-
gdb/objc-lang.c | 10 +++++-----
gdb/ppc-linux-nat.c | 2 +-
gdb/ppc-linux-tdep.c | 2 +-
gdb/printcmd.c | 2 +-
gdb/procfs.c | 16 ++++++++--------
gdb/prologue-value.h | 2 +-
gdb/remote-fileio.c | 2 +-
gdb/remote.c | 22 +++++++++++-----------
gdb/rs6000-aix-tdep.c | 4 ++--
gdb/rs6000-lynx178-tdep.c | 2 +-
gdb/rs6000-tdep.c | 4 ++--
gdb/rust-lang.h | 2 +-
gdb/s390-linux-tdep.c | 30 +++++++++++++++---------------
gdb/ser-base.c | 4 ++--
gdb/ser-go32.c | 2 +-
gdb/ser-mingw.c | 4 ++--
gdb/sh-tdep.c | 10 +++++-----
gdb/sh64-tdep.c | 2 +-
gdb/sol-thread.c | 2 +-
gdb/solib-svr4.c | 18 +++++++++---------
gdb/solib.c | 2 +-
gdb/sparc-sol2-tdep.c | 2 +-
gdb/sparc-tdep.c | 4 ++--
gdb/sparc64-tdep.c | 4 ++--
gdb/stabsread.c | 4 ++--
gdb/stabsread.h | 2 +-
gdb/stack.c | 2 +-
gdb/stubs/ia64vms-stub.c | 4 ++--
gdb/stubs/m32r-stub.c | 8 ++++----
gdb/stubs/m68k-stub.c | 2 +-
gdb/symfile.c | 4 ++--
gdb/symtab.c | 4 ++--
gdb/target.c | 4 ++--
gdb/target.h | 12 ++++++------
gdb/target/waitstatus.h | 2 +-
gdb/testsuite/gdb.base/d10vovly.c | 4 ++--
gdb/testsuite/gdb.base/m32rovly.c | 4 ++--
gdb/testsuite/gdb.base/ovlymgr.c | 4 ++--
gdb/testsuite/gdb.base/scope0.c | 2 +-
gdb/testsuite/gdb.base/sigrepeat.c | 2 +-
gdb/testsuite/lib/compiler.c | 2 +-
gdb/testsuite/lib/compiler.cc | 2 +-
gdb/thread.c | 4 ++--
gdb/tilegx-linux-nat.c | 6 +++---
gdb/tracepoint.c | 4 ++--
gdb/tui/tui-file.c | 2 +-
gdb/tui/tui-win.c | 14 +++++++-------
gdb/tui/tui-wingeneral.c | 2 +-
gdb/tui/tui.h | 2 +-
gdb/utils.c | 2 +-
gdb/v850-tdep.c | 4 ++--
gdb/valops.c | 6 +++---
gdb/windows-nat.c | 2 +-
gdb/xtensa-tdep.c | 6 +++---
147 files changed, 306 insertions(+), 306 deletions(-)
diff --git a/gdb/ada-lang.c b/gdb/ada-lang.c
index 0647a9b..52b7079 100644
--- a/gdb/ada-lang.c
+++ b/gdb/ada-lang.c
@@ -1324,7 +1324,7 @@ ada_decode (const char *encoded)
if (i < len0 + 3
&& encoded[i] == 'N' && encoded[i+1] == '_' && encoded[i+2] == '_')
{
- /* Backtrack a bit up until we reach either the begining of
+ /* Backtrack a bit up until we reach either the beginning of
the encoded name, or "__". Make sure that we only find
digits or lowercase characters. */
const char *ptr = encoded + i - 1;
@@ -5504,7 +5504,7 @@ aux_add_nonlocal_symbols (struct block *block, struct symbol *sym, void *data0)
return 0;
}
-/* Helper for add_nonlocal_symbols. Find symbols in DOMAIN which are targetted
+/* Helper for add_nonlocal_symbols. Find symbols in DOMAIN which are targeted
by renamings matching NAME in BLOCK. Add these symbols to OBSTACKP. If
WILD_MATCH_P is nonzero, perform the naming matching in "wild" mode (see
function "wild_match" for more information). Return whether we found such
@@ -5560,7 +5560,7 @@ ada_add_block_renamings (struct obstack *obstackp,
return num_defns_collected (obstackp) != defns_mark;
}
-/* Implements compare_names, but only applying the comparision using
+/* Implements compare_names, but only applying the comparison using
the given CASING. */
static int
@@ -6060,8 +6060,8 @@ is_name_suffix (const char *str)
/* ??? We should not modify STR directly, as we are doing below. This
is fine in this case, but may become problematic later if we find
that this alternative did not work, and want to try matching
- another one from the begining of STR. Since we modified it, we
- won't be able to find the begining of the string anymore! */
+ another one from the beginning of STR. Since we modified it, we
+ won't be able to find the beginning of the string anymore! */
if (str[0] == 'X')
{
str += 1;
@@ -6824,7 +6824,7 @@ ada_tag_value_at_base_address (struct value *obj)
obj_type = value_type (obj);
- /* It is the responsability of the caller to deref pointers. */
+ /* It is the responsibility of the caller to deref pointers. */
if (TYPE_CODE (obj_type) == TYPE_CODE_PTR
|| TYPE_CODE (obj_type) == TYPE_CODE_REF)
@@ -9111,7 +9111,7 @@ ada_to_fixed_type (struct type *type, const gdb_byte *valaddr,
brobecker/2010-11-19: It seems to me that the only case where it is
useful to preserve the typedef layer is when dealing with fat pointers.
Perhaps, we could add a check for that and preserve the typedef layer
- only in that situation. But this seems unecessary so far, probably
+ only in that situation. But this seems unnecessary so far, probably
because we call check_typedef/ada_check_typedef pretty much everywhere.
*/
if (TYPE_CODE (type) == TYPE_CODE_TYPEDEF
@@ -10584,7 +10584,7 @@ ada_evaluate_subexp (struct type *expect_type, struct expression *exp,
&& value_type (arg1) != value_type (arg2))
error (_("Operands of fixed-point subtraction "
"must have the same type"));
- /* Do the substraction, and cast the result to the type of the first
+ /* Do the subtraction, and cast the result to the type of the first
argument. We cannot cast the result to a reference type, so if
ARG1 is a reference type, find its underlying type. */
type = value_type (arg1);
diff --git a/gdb/ada-tasks.c b/gdb/ada-tasks.c
index c067ae6..8ca3adf 100644
--- a/gdb/ada-tasks.c
+++ b/gdb/ada-tasks.c
@@ -231,7 +231,7 @@ struct ada_tasks_inferior_data
reference it - this number is printed beside each task in the tasks
info listing displayed by "info tasks". This number is equal to
its index in the vector + 1. Reciprocally, to compute the index
- of a task in the vector, we need to substract 1 from its number. */
+ of a task in the vector, we need to subtract 1 from its number. */
VEC(ada_task_info_s) *task_list;
};
@@ -266,7 +266,7 @@ get_ada_tasks_pspace_data (struct program_space *pspace)
Note that we could use an observer of the inferior-created event
to make sure that the ada-tasks per-inferior data always exists.
- But we prefered this approach, as it avoids this entirely as long
+ But we preferred this approach, as it avoids this entirely as long
as the user does not use any of the tasking features. This is
quite possible, particularly in the case where the inferior does
not use tasking. */
diff --git a/gdb/alpha-tdep.c b/gdb/alpha-tdep.c
index a0485ef..20ab590 100644
--- a/gdb/alpha-tdep.c
+++ b/gdb/alpha-tdep.c
@@ -995,7 +995,7 @@ alpha_sigtramp_frame_sniffer (const struct frame_unwind *self,
const char *name;
/* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead
- look at tramp-frame.h and other simplier per-architecture
+ look at tramp-frame.h and other simpler per-architecture
sigtramp unwinders. */
/* We shouldn't even bother to try if the OSABI didn't register a
diff --git a/gdb/alpha-tdep.h b/gdb/alpha-tdep.h
index 5b64861..ec98534 100644
--- a/gdb/alpha-tdep.h
+++ b/gdb/alpha-tdep.h
@@ -83,7 +83,7 @@ struct gdbarch_tdep
/* Does the PC fall in a signal trampoline. */
/* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead
- look at tramp-frame.h and other simplier per-architecture
+ look at tramp-frame.h and other simpler per-architecture
sigtramp unwinders. */
int (*pc_in_sigtramp) (struct gdbarch *gdbarch, CORE_ADDR pc,
const char *name);
@@ -97,7 +97,7 @@ struct gdbarch_tdep
int sc_fpregs_offset;
int jb_pc; /* Offset to PC value in jump buffer.
- If htis is negative, longjmp support
+ If this is negative, longjmp support
will be disabled. */
size_t jb_elt_size; /* And the size of each entry in the buf. */
};
diff --git a/gdb/alphafbsd-tdep.c b/gdb/alphafbsd-tdep.c
index 84fedc2..0b13657 100644
--- a/gdb/alphafbsd-tdep.c
+++ b/gdb/alphafbsd-tdep.c
@@ -42,11 +42,11 @@ alphafbsd_return_in_memory (struct type *type)
return 1;
/* We need to check if this struct/union is "integer" like. For
- this to be true, the offset of each adressable subfield must be
+ this to be true, the offset of each addressable subfield must be
zero. Note that bit fields are not addressable. */
for (i = 0; i < TYPE_NFIELDS (type); i++)
{
- /* If the field bitsize is non-zero, it isn't adressable. */
+ /* If the field bitsize is non-zero, it isn't addressable. */
if (TYPE_FIELD_BITPOS (type, i) != 0
&& TYPE_FIELD_BITSIZE (type, i) == 0)
return 1;
diff --git a/gdb/amd64-linux-nat.c b/gdb/amd64-linux-nat.c
index 5122b04..dc2f353 100644
--- a/gdb/amd64-linux-nat.c
+++ b/gdb/amd64-linux-nat.c
@@ -71,7 +71,7 @@ static int amd64_linux_gregset32_reg_offset[] =
};
\f
-/* Transfering the general-purpose registers between GDB, inferiors
+/* Transferring the general-purpose registers between GDB, inferiors
and core files. */
/* Fill GDB's register cache with the general-purpose register values
@@ -94,7 +94,7 @@ fill_gregset (const struct regcache *regcache,
amd64_collect_native_gregset (regcache, gregsetp, regnum);
}
-/* Transfering floating-point registers between GDB, inferiors and cores. */
+/* Transferring floating-point registers between GDB, inferiors and cores. */
/* Fill GDB's register cache with the floating-point and SSE register
values in *FPREGSETP. */
diff --git a/gdb/amd64-nat.c b/gdb/amd64-nat.c
index ad5df57..5d1467b 100644
--- a/gdb/amd64-nat.c
+++ b/gdb/amd64-nat.c
@@ -34,7 +34,7 @@
register set indexed by register number, and the number of
registers supported by the mapping. We don't need mappings for the
floating-point and SSE registers, since the difference between
- 64-bit and 32-bit variants are negligable. The difference in the
+ 64-bit and 32-bit variants are negligible. The difference in the
number of SSE registers is already handled by the target code. */
/* General-purpose register mapping for native 32-bit code. */
diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c
index a3a1fde..3b64ca4 100644
--- a/gdb/amd64-tdep.c
+++ b/gdb/amd64-tdep.c
@@ -1174,7 +1174,7 @@ amd64_get_unused_input_int_reg (const struct amd64_insn *details)
/* Avoid RAX. */
used_regs_mask |= 1 << EAX_REG_NUM;
- /* Similarily avoid RDX, implicit operand in divides. */
+ /* Similarly avoid RDX, implicit operand in divides. */
used_regs_mask |= 1 << EDX_REG_NUM;
/* Avoid RSP. */
used_regs_mask |= 1 << ESP_REG_NUM;
diff --git a/gdb/amd64-windows-tdep.c b/gdb/amd64-windows-tdep.c
index 4570622..96e98d4 100644
--- a/gdb/amd64-windows-tdep.c
+++ b/gdb/amd64-windows-tdep.c
@@ -255,7 +255,7 @@ amd64_windows_push_dummy_call
/* Pass "hidden" argument". */
if (struct_return)
{
- /* The "hidden" argument is passed throught the first argument
+ /* The "hidden" argument is passed through the first argument
register. */
const int arg_regnum = amd64_windows_dummy_call_integer_regs[0];
diff --git a/gdb/amd64obsd-tdep.c b/gdb/amd64obsd-tdep.c
index 7c79e44..d51f429 100644
--- a/gdb/amd64obsd-tdep.c
+++ b/gdb/amd64obsd-tdep.c
@@ -65,7 +65,7 @@ amd64obsd_iterate_over_regset_sections (struct gdbarch *gdbarch,
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- /* OpenBSD core dumps don't use seperate register sets for the
+ /* OpenBSD core dumps don't use separate register sets for the
general-purpose and floating-point registers. */
cb (".reg", tdep->sizeof_gregset + I387_SIZEOF_FXSAVE,
diff --git a/gdb/arch-utils.c b/gdb/arch-utils.c
index d64a73d..f0623d5 100644
--- a/gdb/arch-utils.c
+++ b/gdb/arch-utils.c
@@ -98,7 +98,7 @@ legacy_register_sim_regno (struct gdbarch *gdbarch, int regnum)
gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch));
/* NOTE: cagney/2002-05-13: The old code did it this way and it is
suspected that some GDB/SIM combinations may rely on this
- behavour. The default should be one2one_register_sim_regno
+ behaviour. The default should be one2one_register_sim_regno
(below). */
if (gdbarch_register_name (gdbarch, regnum) != NULL
&& gdbarch_register_name (gdbarch, regnum)[0] != '\0')
diff --git a/gdb/arm-linux-nat.c b/gdb/arm-linux-nat.c
index d11bdc6..f36d31b 100644
--- a/gdb/arm-linux-nat.c
+++ b/gdb/arm-linux-nat.c
@@ -687,7 +687,7 @@ struct arm_linux_hw_breakpoint
The Linux ptrace interface to hardware break-/watch-points presents the
values in a vector centred around 0 (which is used fo generic information).
- Positive indicies refer to breakpoint addresses/control registers, negative
+ Positive indices refer to breakpoint addresses/control registers, negative
indices to watchpoint addresses/control registers.
The Linux vector is indexed as follows:
diff --git a/gdb/arm-linux-tdep.c b/gdb/arm-linux-tdep.c
index c621cd6..65ed6e8 100644
--- a/gdb/arm-linux-tdep.c
+++ b/gdb/arm-linux-tdep.c
@@ -61,7 +61,7 @@ extern int arm_apcs_32;
/* Under ARM GNU/Linux the traditional way of performing a breakpoint
is to execute a particular software interrupt, rather than use a
- particular undefined instruction to provoke a trap. Upon exection
+ particular undefined instruction to provoke a trap. Upon execution
of the software interrupt the kernel stops the inferior with a
SIGTRAP, and wakes the debugger. */
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index 78fc264..2d360be 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -3919,7 +3919,7 @@ arm_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
si = pop_stack_item (si);
}
- /* Finally, update teh SP register. */
+ /* Finally, update the SP register. */
regcache_cooked_write_unsigned (regcache, ARM_SP_REGNUM, sp);
return sp;
@@ -10144,7 +10144,7 @@ arm_record_extension_space (insn_decode_record *arm_insn_r)
if (0 == insn_op1 || 1 == insn_op1)
{
/* SMLA<x><y>, SMLAW<y>, SMULW<y>. */
- /* We dont do optimization for SMULW<y> where we
+ /* We don't do optimization for SMULW<y> where we
need only Rd. */
record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
record_buf[1] = ARM_PS_REGNUM;
@@ -10608,7 +10608,7 @@ arm_record_ld_st_imm_offset (insn_decode_record *arm_insn_r)
record_buf[arm_insn_r->reg_rec_count++] = reg_dest;
/* The LDR instruction is capable of doing branching. If MOV LR, PC
- preceeds a LDR instruction having R15 as reg_base, it
+ precedes a LDR instruction having R15 as reg_base, it
emulates a branch and link instruction, and hence we need to save
CPSR and PC as well. */
if (ARM_PC_REGNUM == reg_dest)
@@ -10732,7 +10732,7 @@ arm_record_ld_st_reg_offset (insn_decode_record *arm_insn_r)
if (15 == reg_src2)
{
/* If R15 was used as Rn, hence current PC+8. */
- /* Pre-indexed mode doesnt reach here ; illegal insn. */
+ /* Pre-indexed mode doesn't reach here ; illegal insn. */
u_regval[0] = u_regval[0] + 8;
}
/* Calculate target store address, Rn +/- Rm, register offset. */
@@ -11045,7 +11045,7 @@ arm_record_b_bl (insn_decode_record *arm_insn_r)
/* Handle B, BL, BLX(1) insns. */
/* B simply branches so we do nothing here. */
- /* Note: BLX(1) doesnt fall here but instead it falls into
+ /* Note: BLX(1) doesn't fall here but instead it falls into
extension space. */
if (bit (arm_insn_r->arm_insn, 24))
{
diff --git a/gdb/auxv.c b/gdb/auxv.c
index de9205d..5d10d5c 100644
--- a/gdb/auxv.c
+++ b/gdb/auxv.c
@@ -301,7 +301,7 @@ static const struct inferior_data *auxv_inferior_data;
/* Auxiliary Vector information structure. This is used by GDB
for caching purposes for each inferior. This helps reduce the
- overhead of transfering data from a remote target to the local host. */
+ overhead of transferring data from a remote target to the local host. */
struct auxv_info
{
LONGEST length;
diff --git a/gdb/ax-gdb.c b/gdb/ax-gdb.c
index cd97585..631b4ea 100644
--- a/gdb/ax-gdb.c
+++ b/gdb/ax-gdb.c
@@ -1880,7 +1880,7 @@ gen_expr (struct expression *exp, union exp_element **pc,
gen_expr (exp, pc, ax, &value3);
gen_usual_unary (exp, ax, &value3);
ax_label (ax, end, ax->len);
- /* This is arbitary - what if B and C are incompatible types? */
+ /* This is arbitrary - what if B and C are incompatible types? */
value->type = value2.type;
value->kind = value2.kind;
break;
diff --git a/gdb/bcache.c b/gdb/bcache.c
index 65ff844..6be2d94 100644
--- a/gdb/bcache.c
+++ b/gdb/bcache.c
@@ -286,7 +286,7 @@ bcache_full (const void *addr, int length, struct bcache *bcache, int *added)
}
\f
-/* Compare the byte string at ADDR1 of lenght LENGHT to the
+/* Compare the byte string at ADDR1 of length LENGTH to the
string at ADDR2. Return 1 if they are equal. */
static int
diff --git a/gdb/breakpoint.c b/gdb/breakpoint.c
index d139747..8f5a49e 100644
--- a/gdb/breakpoint.c
+++ b/gdb/breakpoint.c
@@ -12132,7 +12132,7 @@ clear_command (char *arg, int from_tty)
}
}
- /* Now go thru the 'found' chain and delete them. */
+ /* Now go through the 'found' chain and delete them. */
if (VEC_empty(breakpoint_p, found))
{
if (arg)
diff --git a/gdb/breakpoint.h b/gdb/breakpoint.h
index 99133a2..8067c63 100644
--- a/gdb/breakpoint.h
+++ b/gdb/breakpoint.h
@@ -437,7 +437,7 @@ struct bp_location
as ``address'' (above) except for cases in which
ADJUST_BREAKPOINT_ADDRESS has computed a different address at
which to place the breakpoint in order to comply with a
- processor's architectual constraints. */
+ processor's architectural constraints. */
CORE_ADDR requested_address;
/* An additional address assigned with this location. This is currently
diff --git a/gdb/c-varobj.c b/gdb/c-varobj.c
index 16d5077..66a40f9 100644
--- a/gdb/c-varobj.c
+++ b/gdb/c-varobj.c
@@ -824,7 +824,7 @@ cplus_describe_child (const struct varobj *parent, int index,
/* Cast the parent to the base' type. Note that in gdb,
expression like
(Base1)d
- will create an lvalue, for all appearences, so we don't
+ will create an lvalue, for all appearances, so we don't
need to use more fancy:
*(Base1*)(&d)
construct.
diff --git a/gdb/cli/cli-cmds.c b/gdb/cli/cli-cmds.c
index 3d1a628..659693b 100644
--- a/gdb/cli/cli-cmds.c
+++ b/gdb/cli/cli-cmds.c
@@ -269,7 +269,7 @@ complete_command (char *arg, int from_tty)
/* complete_line assumes that its first argument is somewhere
within, and except for filenames at the beginning of, the word to
be completed. The following crude imitation of readline's
- word-breaking tries to accomodate this. */
+ word-breaking tries to accommodate this. */
point = arg + argpoint;
while (point > arg)
{
diff --git a/gdb/cli/cli-decode.c b/gdb/cli/cli-decode.c
index acc9c42..9f30492 100644
--- a/gdb/cli/cli-decode.c
+++ b/gdb/cli/cli-decode.c
@@ -956,7 +956,7 @@ apropos_cmd (struct ui_file *stream,
command that requires subcommands. Also called by saying just
"help".)
- I am going to split this into two seperate comamnds, help_cmd and
+ I am going to split this into two separate comamnds, help_cmd and
help_list. */
void
diff --git a/gdb/cli/cli-interp.c b/gdb/cli/cli-interp.c
index dfa96d6..a598ad8 100644
--- a/gdb/cli/cli-interp.c
+++ b/gdb/cli/cli-interp.c
@@ -312,7 +312,7 @@ cli_interpreter_exec (void *data, const char *command_str)
struct ui_file *old_stream;
struct gdb_exception result;
- /* FIXME: cagney/2003-02-01: Need to const char *propogate
+ /* FIXME: cagney/2003-02-01: Need to const char *propagate
safe_execute_command. */
char *str = (char *) alloca (strlen (command_str) + 1);
strcpy (str, command_str);
@@ -322,7 +322,7 @@ cli_interpreter_exec (void *data, const char *command_str)
interpreter which has a new ui_file for gdb_stdout, use that one
instead of the default.
- It is important that it gets reset everytime, since the user
+ It is important that it gets reset every time, since the user
could set gdb to use a different interpreter. */
old_stream = cli_out_set_stream (cli->cli_uiout, gdb_stdout);
result = safe_execute_command (cli->cli_uiout, str, 1);
diff --git a/gdb/cli/cli-script.c b/gdb/cli/cli-script.c
index ce4d8cb..ff508eb 100644
--- a/gdb/cli/cli-script.c
+++ b/gdb/cli/cli-script.c
@@ -213,7 +213,7 @@ print_command_lines (struct ui_out *uiout, struct command_line *cmd,
}
/* An if command. Recursively print both arms before
- continueing. */
+ continuing. */
if (list->control_type == if_control)
{
ui_out_field_fmt (uiout, NULL, "if %s", list->line);
@@ -685,7 +685,7 @@ arg_cleanup (void *ignore)
xfree (oargs);
}
-/* Bind the incomming arguments for a user defined command to
+/* Bind the incoming arguments for a user defined command to
$arg0, $arg1 ... $argMAXUSERARGS. */
static struct cleanup *
diff --git a/gdb/coffread.c b/gdb/coffread.c
index 501e901..cb398c0 100644
--- a/gdb/coffread.c
+++ b/gdb/coffread.c
@@ -126,7 +126,7 @@ static unsigned local_auxesz;
static int pe_file;
/* Chain of typedefs of pointers to empty struct/union types.
- They are chained thru the SYMBOL_VALUE_CHAIN. */
+ They are chained through the SYMBOL_VALUE_CHAIN. */
static struct symbol *opaque_type_chain[HASHSIZE];
@@ -1744,7 +1744,7 @@ process_coff_symbol (struct coff_symbol *cs,
This is not just a consequence of GDB's type
management; CC and GCC (at least through version
2.4) both output variables of either type char *
- or caddr_t with the type refering to the C_TPDEF
+ or caddr_t with the type referring to the C_TPDEF
symbol for caddr_t. If a future compiler cleans
this up it GDB is not ready for it yet, but if it
becomes ready we somehow need to disable this
diff --git a/gdb/common/buffer.h b/gdb/common/buffer.h
index 8122a2c..28e66c7f 100644
--- a/gdb/common/buffer.h
+++ b/gdb/common/buffer.h
@@ -46,7 +46,7 @@ void buffer_free (struct buffer *buffer);
/* Initialize BUFFER. BUFFER holds no memory afterwards. */
void buffer_init (struct buffer *buffer);
-/* Return a pointer into BUFFER data, effectivelly transfering
+/* Return a pointer into BUFFER data, effectivelly transferring
ownership of the buffer memory to the caller. Calling buffer_free
afterwards has no effect on the returned data. */
char* buffer_finish (struct buffer *buffer);
diff --git a/gdb/common/common-exceptions.c b/gdb/common/common-exceptions.c
index 33fff21..6f82e5a 100644
--- a/gdb/common/common-exceptions.c
+++ b/gdb/common/common-exceptions.c
@@ -132,7 +132,7 @@ exceptions_state_mc (enum catcher_action action)
switch (action)
{
case CATCH_ITER:
- /* No error/quit has occured. */
+ /* No error/quit has occurred. */
return 0;
case CATCH_ITER_1:
current_catcher->state = CATCHER_RUNNING_1;
diff --git a/gdb/common/gdb_signals.h b/gdb/common/gdb_signals.h
index 038ad08..e432e15 100644
--- a/gdb/common/gdb_signals.h
+++ b/gdb/common/gdb_signals.h
@@ -35,9 +35,9 @@ extern int gdb_signal_to_host_p (enum gdb_signal signo);
gdb_signal_to_host() returns 0 and prints a warning() on GDB's
console if SIGNO has no equivalent host representation. */
/* FIXME: cagney/1999-11-22: Here ``host'' is used incorrectly, it is
- refering to the target operating system's signal numbering.
+ referring to the target operating system's signal numbering.
Similarly, ``enum gdb_signal'' is named incorrectly, ``enum
- gdb_signal'' would probably be better as it is refering to GDB's
+ gdb_signal'' would probably be better as it is referring to GDB's
internal representation of a target operating system's signal. */
extern enum gdb_signal gdb_signal_from_host (int);
extern int gdb_signal_to_host (enum gdb_signal);
diff --git a/gdb/common/signals.c b/gdb/common/signals.c
index f84935d..6ef87ec 100644
--- a/gdb/common/signals.c
+++ b/gdb/common/signals.c
@@ -358,7 +358,7 @@ gdb_signal_from_host (int hostsig)
}
/* Convert a OURSIG (an enum gdb_signal) to the form used by the
- target operating system (refered to as the ``host'') or zero if the
+ target operating system (referred to as the ``host'') or zero if the
equivalent host signal is not available. Set/clear OURSIG_OK
accordingly. */
diff --git a/gdb/complaints.c b/gdb/complaints.c
index b35c81d..4dc6b7b 100644
--- a/gdb/complaints.c
+++ b/gdb/complaints.c
@@ -211,7 +211,7 @@ vcomplaint (struct complaints **c, const char *file,
if (series == ISOLATED_MESSAGE)
/* It would be really nice to use begin_line() here.
Unfortunately that function doesn't track GDB_STDERR and
- consequently will sometimes supress a line when it
+ consequently will sometimes suppress a line when it
shouldn't. */
fputs_filtered ("\n", gdb_stderr);
else
@@ -294,7 +294,7 @@ clear_complaints (struct complaints **c, int less_verbose, int noisy)
case SUBSEQUENT_MESSAGE:
/* It would be really nice to use begin_line() here.
Unfortunately that function doesn't track GDB_STDERR and
- consequently will sometimes supress a line when it
+ consequently will sometimes suppress a line when it
shouldn't. */
fputs_unfiltered ("\n", gdb_stderr);
break;
diff --git a/gdb/corefile.c b/gdb/corefile.c
index 64de931..2d0db9d 100644
--- a/gdb/corefile.c
+++ b/gdb/corefile.c
@@ -62,7 +62,7 @@ bfd *core_bfd = NULL;
struct target_ops *core_target;
\f
-/* Backward compatability with old way of specifying core files. */
+/* Backward compatibility with old way of specifying core files. */
void
core_file_command (char *filename, int from_tty)
diff --git a/gdb/cp-valprint.c b/gdb/cp-valprint.c
index 9432c83..a7427d4 100644
--- a/gdb/cp-valprint.c
+++ b/gdb/cp-valprint.c
@@ -132,7 +132,7 @@ cp_is_vtbl_member (struct type *type)
/* The type name of the thunk pointer is NULL when using
dwarf2. We could test for a pointer to a function, but
there is no type info for the virtual table either, so it
- wont help. */
+ won't help. */
return cp_is_vtbl_ptr_type (type);
}
}
diff --git a/gdb/cris-tdep.c b/gdb/cris-tdep.c
index 460e7eb..e1162d1 100644
--- a/gdb/cris-tdep.c
+++ b/gdb/cris-tdep.c
@@ -3373,7 +3373,7 @@ get_data_from_address (unsigned short *inst, CORE_ADDR address,
return value;
}
-/* Handles the assign addresing mode for the ADD, SUB, CMP, AND, OR and MOVE
+/* Handles the assign addressing mode for the ADD, SUB, CMP, AND, OR and MOVE
instructions. The MOVE instruction is the move from source to register. */
static void
@@ -3432,7 +3432,7 @@ three_operand_add_sub_cmp_and_or_op (unsigned short inst,
inst_env->disable_interrupt = 0;
}
-/* Handles the index addresing mode for the ADD, SUB, CMP, AND, OR and MOVE
+/* Handles the index addressing mode for the ADD, SUB, CMP, AND, OR and MOVE
instructions. The MOVE instruction is the move from source to register. */
static void
@@ -3459,7 +3459,7 @@ handle_prefix_index_mode_for_aritm_op (unsigned short inst,
inst_env->disable_interrupt = 0;
}
-/* Handles the autoincrement and indirect addresing mode for the ADD, SUB,
+/* Handles the autoincrement and indirect addressing mode for the ADD, SUB,
CMP, AND OR and MOVE instruction. The MOVE instruction is the move from
source to register. */
diff --git a/gdb/darwin-nat.c b/gdb/darwin-nat.c
index 6ca659f4..8ea3b2c 100644
--- a/gdb/darwin-nat.c
+++ b/gdb/darwin-nat.c
@@ -1990,7 +1990,7 @@ darwin_thread_alive (struct target_ops *ops, ptid_t ptid)
copy it to RDADDR in gdb's address space.
If WRADDR is not NULL, write gdb's LEN bytes from WRADDR and copy it
to ADDR in inferior task's address space.
- Return 0 on failure; number of bytes read / writen otherwise. */
+ Return 0 on failure; number of bytes read/written otherwise. */
static int
darwin_read_write_inferior (task_t task, CORE_ADDR addr,
diff --git a/gdb/dbxread.c b/gdb/dbxread.c
index cfc4ed0..d72723f 100644
--- a/gdb/dbxread.c
+++ b/gdb/dbxread.c
@@ -247,7 +247,7 @@ struct header_file_location
BINCL/EINCL defs for this file. */
};
-/* The actual list and controling variables. */
+/* The actual list and controlling variables. */
static struct header_file_location *bincl_list, *next_bincl;
static int bincls_allocated;
@@ -2582,7 +2582,7 @@ read_ofile_symtab (struct objfile *objfile, struct partial_symtab *pst)
else if (type & N_EXT || type == (unsigned char) N_TEXT
|| type == (unsigned char) N_NBTEXT)
{
- /* Global symbol: see if we came across a dbx defintion for
+ /* Global symbol: see if we came across a dbx definition for
a corresponding symbol. If so, store the value. Remove
syms from the chain when their values are stored, but
search the whole chain, as there may be several syms from
diff --git a/gdb/dcache.c b/gdb/dcache.c
index cb43068..6867571 100644
--- a/gdb/dcache.c
+++ b/gdb/dcache.c
@@ -65,7 +65,7 @@ static struct cmd_list_element *dcache_show_list = NULL;
is set, etc., then the chunk is skipped. Those chunks are handled
in target_xfer_memory() (or target_xfer_memory_partial()).
- This doesn't occur very often. The most common occurance is when
+ This doesn't occur very often. The most common occurrence is when
the last bit of the .text segment and the first bit of the .data
segment fall within the same dcache page with a ro/cacheable memory
region defined for the .text segment and a rw/non-cacheable memory
diff --git a/gdb/doublest.c b/gdb/doublest.c
index b1b0921..255c4c5 100644
--- a/gdb/doublest.c
+++ b/gdb/doublest.c
@@ -822,7 +822,7 @@ store_typed_floating (void *addr, const struct type *type, DOUBLEST val)
in, and the target processor may only refer to, the first N <
TYPE_LENGTH (type) bits. If the end of the buffer wasn't
initialized, GDB would write undefined data to the target. An
- errant program, refering to that undefined data, would then
+ errant program, referring to that undefined data, would then
become non-deterministic.
See also the function convert_typed_floating below. */
diff --git a/gdb/dtrace-probe.c b/gdb/dtrace-probe.c
index 38654a4..76d9b3c 100644
--- a/gdb/dtrace-probe.c
+++ b/gdb/dtrace-probe.c
@@ -359,7 +359,7 @@ dtrace_process_dof_probe (struct objfile *objfile,
It follows that if there are DTrace is-enabled probes defined for
some provider/name but no DTrace regular probes defined then the
- GDB user wont be able to enable/disable these conditionals. */
+ GDB user won't be able to enable/disable these conditionals. */
num_probes = DOF_UINT (dof, probe->dofpr_noffs);
if (num_probes == 0)
diff --git a/gdb/dwarf2-frame.c b/gdb/dwarf2-frame.c
index beab304..7f6e9f4 100644
--- a/gdb/dwarf2-frame.c
+++ b/gdb/dwarf2-frame.c
@@ -1079,7 +1079,7 @@ dwarf2_frame_cache (struct frame_info *this_frame, void **this_cache)
its return address. As a result the return address will
point at some random instruction, and the CFI for that
instruction is probably worthless to us. GCC's unwinder solves
- this problem by substracting 1 from the return address to get an
+ this problem by subtracting 1 from the return address to get an
address in the middle of a presumed call instruction (or the
instruction in the associated delay slot). This should only be
done for "normal" frames and not for resume-type frames (signal
@@ -1232,7 +1232,7 @@ incomplete CFI data; unspecified registers (e.g., %s) at %s"),
&fs->regs.reg[fs->retaddr_column];
/* It seems rather bizarre to specify an "empty" column as
- the return adress column. However, this is exactly
+ the return address column. However, this is exactly
what GCC does on some targets. It turns out that GCC
assumes that the return address can be found in the
register corresponding to the return address column.
@@ -1425,7 +1425,7 @@ static int
dwarf2_frame_sniffer (const struct frame_unwind *self,
struct frame_info *this_frame, void **this_cache)
{
- /* Grab an address that is guarenteed to reside somewhere within the
+ /* Grab an address that is guaranteed to reside somewhere within the
function. get_frame_pc(), with a no-return next function, can
end up returning something past the end of this function's body.
If the frame we're sniffing for is a signal frame whose start
@@ -1785,7 +1785,7 @@ bsearch_fde_cmp (const void *key, const void *element)
}
/* Find the FDE for *PC. Return a pointer to the FDE, and store the
- inital location associated with it into *PC. */
+ initial location associated with it into *PC. */
static struct dwarf2_fde *
dwarf2_frame_find_fde (CORE_ADDR *pc, CORE_ADDR *out_offset)
diff --git a/gdb/dwarf2loc.c b/gdb/dwarf2loc.c
index 44dceda..6adb088 100644
--- a/gdb/dwarf2loc.c
+++ b/gdb/dwarf2loc.c
@@ -780,7 +780,7 @@ func_addr_to_tail_call_list (struct gdbarch *gdbarch, CORE_ADDR addr)
via its tail calls (incl. transitively). Throw NO_ENTRY_VALUE_ERROR if it
can call itself via tail calls.
- If a funtion can tail call itself its entry value based parameters are
+ If a function can tail call itself its entry value based parameters are
unreliable. There is no verification whether the value of some/all
parameters is unchanged through the self tail call, we expect if there is
a self tail call all the parameters can be modified. */
diff --git a/gdb/dwarf2read.c b/gdb/dwarf2read.c
index 1ad6b00..0d7e720 100644
--- a/gdb/dwarf2read.c
+++ b/gdb/dwarf2read.c
@@ -13770,7 +13770,7 @@ read_array_type (struct die_info *die, struct dwarf2_cu *cu)
if (child_type != NULL)
{
- /* The range type was succesfully read. Save it for the
+ /* The range type was successfully read. Save it for the
array type creation. */
if ((ndim % DW_FIELD_ALLOC_CHUNK) == 0)
{
@@ -17175,7 +17175,7 @@ die_is_declaration (struct die_info *die, struct dwarf2_cu *cu)
which value is non-zero. However, we have to be careful with
DIEs having a DW_AT_specification attribute, because dwarf2_attr()
(via dwarf2_flag_true_p) follows this attribute. So we may
- end up accidently finding a declaration attribute that belongs
+ end up accidentally finding a declaration attribute that belongs
to a different DIE referenced by the specification attribute,
even though the given DIE does not have a declaration attribute. */
return (dwarf2_flag_true_p (die, DW_AT_declaration, cu)
diff --git a/gdb/eval.c b/gdb/eval.c
index f30b8e1..ef90f95 100644
--- a/gdb/eval.c
+++ b/gdb/eval.c
@@ -1226,7 +1226,7 @@ evaluate_subexp_standard (struct type *expect_type,
/* Found a function symbol. Now we will substitute its
value in place of the message dispatcher (obj_msgSend),
- so that we call the method directly instead of thru
+ so that we call the method directly instead of through
the dispatcher. The main reason for doing this is that
we can now evaluate the return value and parameter values
according to their known data types, in case we need to
diff --git a/gdb/event-loop.c b/gdb/event-loop.c
index f94a6fa..80c48a0 100644
--- a/gdb/event-loop.c
+++ b/gdb/event-loop.c
@@ -60,7 +60,7 @@ typedef void (event_handler_func) (event_data);
read. Servicing an event simply means that the procedure PROC will
be called. We have 2 queues, one for file handlers that we listen
to in the event loop, and one for the file handlers+events that are
- ready. The procedure PROC associated with each event is dependant
+ ready. The procedure PROC associated with each event is dependent
of the event source. In the case of monitored file descriptors, it
is always the same (handle_file_event). Its duty is to invoke the
handler associated with the file descriptor whose state change
@@ -810,7 +810,7 @@ gdb_wait_for_event (int block)
FD_ZERO (&gdb_notifier.ready_masks[1]);
FD_ZERO (&gdb_notifier.ready_masks[2]);
- /* Dont print anything if we got a signal, let gdb handle
+ /* Don't print anything if we got a signal, let gdb handle
it. */
if (errno != EINTR)
perror_with_name (("select"));
diff --git a/gdb/event-top.c b/gdb/event-top.c
index acf8474..378b591 100644
--- a/gdb/event-top.c
+++ b/gdb/event-top.c
@@ -457,7 +457,7 @@ get_command_line_buffer (void)
}
/* When there is an event ready on the stdin file descriptor, instead
- of calling readline directly throught the callback function, or
+ of calling readline directly through the callback function, or
instead of calling gdb_readline_no_editing_callback, give gdb a
chance to detect errors and do something. */
diff --git a/gdb/exec.h b/gdb/exec.h
index f50e9ea..1a2f149 100644
--- a/gdb/exec.h
+++ b/gdb/exec.h
@@ -61,7 +61,7 @@ extern enum target_xfer_status
If SECTION_NAME is not NULL, only access sections with that same
name.
- Return the number of bytes actually transfered, or zero when no
+ Return the number of bytes actually transferred, or zero when no
data is available for the requested range.
This function is intended to be used from target_xfer_partial
diff --git a/gdb/extension.c b/gdb/extension.c
index 40c63a6..5faeaea 100644
--- a/gdb/extension.c
+++ b/gdb/extension.c
@@ -675,7 +675,7 @@ static int quit_flag;
/* The current extension language we've called out to, or
extension_language_gdb if there isn't one.
- This must be set everytime we call out to an extension language, and reset
+ This must be set every time we call out to an extension language, and reset
to the previous value when it returns. Note that the previous value may
be a different (or the same) extension language. */
static const struct extension_language_defn *active_ext_lang
diff --git a/gdb/frame-base.h b/gdb/frame-base.h
index 1da517b..7515204 100644
--- a/gdb/frame-base.h
+++ b/gdb/frame-base.h
@@ -32,7 +32,7 @@ struct regcache;
the NEXT frame's register unwind method, to determine the address
of THIS frame's `base'.
- The exact meaning of `base' is highly dependant on the type of the
+ The exact meaning of `base' is highly dependent on the type of the
debug info. It is assumed that dwarf2, stabs, ... will each
provide their own methods.
diff --git a/gdb/frame.c b/gdb/frame.c
index 5414cb3..f621735 100644
--- a/gdb/frame.c
+++ b/gdb/frame.c
@@ -701,7 +701,7 @@ frame_id_eq (struct frame_id l, struct frame_id r)
if special addresses are different, the frames are different. */
eq = 0;
else if (l.artificial_depth != r.artificial_depth)
- /* If artifical depths are different, the frames must be different. */
+ /* If artificial depths are different, the frames must be different. */
eq = 0;
else
/* Frames are equal. */
diff --git a/gdb/frame.h b/gdb/frame.h
index e5c3d10..21554dc 100644
--- a/gdb/frame.h
+++ b/gdb/frame.h
@@ -431,7 +431,7 @@ void set_current_sal_from_frame (struct frame_info *);
the old get_frame_base method was not sufficient.
get_frame_base_address: get_frame_locals_address:
- get_frame_args_address: A set of high-level debug-info dependant
+ get_frame_args_address: A set of high-level debug-info dependent
addresses that fall within the frame. These addresses almost
certainly will not match the stack address part of a frame ID (as
returned by get_frame_base).
diff --git a/gdb/gdb.h b/gdb/gdb.h
index e19dc9c..40c1eff 100644
--- a/gdb/gdb.h
+++ b/gdb/gdb.h
@@ -21,7 +21,7 @@
struct ui_out;
-/* Return-code (RC) from a gdb library call. (The abreviation RC is
+/* Return-code (RC) from a gdb library call. (The abbreviation RC is
taken from the sim/common directory.) */
enum gdb_rc {
@@ -33,7 +33,7 @@ enum gdb_rc {
internal / quit indication it is not possible to return that
here. */
GDB_RC_FAIL = 0,
- /* No error occured but nothing happened. Due to the catch_errors()
+ /* No error occurred but nothing happened. Due to the catch_errors()
interface, this must be non-zero. */
GDB_RC_NONE = 1,
/* The operation was successful. Due to the catch_errors()
diff --git a/gdb/gdbserver/event-loop.c b/gdb/gdbserver/event-loop.c
index 89a4493..7f37212 100644
--- a/gdb/gdbserver/event-loop.c
+++ b/gdb/gdbserver/event-loop.c
@@ -488,7 +488,7 @@ wait_for_event (void)
FD_ZERO (&gdb_notifier.ready_masks[1]);
FD_ZERO (&gdb_notifier.ready_masks[2]);
#ifdef EINTR
- /* Dont print anything if we got a signal, let gdb handle
+ /* Don't print anything if we got a signal, let gdb handle
it. */
if (errno != EINTR)
perror_with_name ("select");
diff --git a/gdb/gdbserver/linux-aarch64-low.c b/gdb/gdbserver/linux-aarch64-low.c
index ae80cdd..11b2710 100644
--- a/gdb/gdbserver/linux-aarch64-low.c
+++ b/gdb/gdbserver/linux-aarch64-low.c
@@ -1088,7 +1088,7 @@ emit_add (uint32_t *buf, struct aarch64_register rd,
RD is the destination register.
RN is the input register.
- IMM is the immediate to substract to RN. */
+ IMM is the immediate to subtract to RN. */
static int
emit_sub (uint32_t *buf, struct aarch64_register rd,
diff --git a/gdb/gdbserver/linux-arm-low.c b/gdb/gdbserver/linux-arm-low.c
index ed9b356..6e321d0 100644
--- a/gdb/gdbserver/linux-arm-low.c
+++ b/gdb/gdbserver/linux-arm-low.c
@@ -253,7 +253,7 @@ get_next_pcs_is_thumb (struct arm_get_next_pcs *self)
}
/* Read memory from the inferiror.
- BYTE_ORDER is ignored and there to keep compatiblity with GDB's
+ BYTE_ORDER is ignored and there to keep compatibility with GDB's
read_memory_unsigned_integer. */
static ULONGEST
get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
diff --git a/gdb/gdbserver/linux-low.c b/gdb/gdbserver/linux-low.c
index b441ebc..bd7d5dc 100644
--- a/gdb/gdbserver/linux-low.c
+++ b/gdb/gdbserver/linux-low.c
@@ -1621,7 +1621,7 @@ linux_detach (int pid)
complete_ongoing_step_over ();
/* Stop all threads before detaching. First, ptrace requires that
- the thread is stopped to sucessfully detach. Second, thread_db
+ the thread is stopped to successfully detach. Second, thread_db
may need to uninstall thread event breakpoints from memory, which
only works with a stopped process anyway. */
stop_all_lwps (0, NULL);
diff --git a/gdb/gdbserver/linux-ppc-low.c b/gdb/gdbserver/linux-ppc-low.c
index 1d013f1..92a98a3 100644
--- a/gdb/gdbserver/linux-ppc-low.c
+++ b/gdb/gdbserver/linux-ppc-low.c
@@ -1535,7 +1535,7 @@ emit_insns (uint32_t *buf, int n)
/* Regardless of endian, register 3 is always high part, 4 is low part.
These defines are used when the register pair is stored/loaded.
- Likewise, to simplify code, have a similiar define for 5:6. */
+ Likewise, to simplify code, have a similar define for 5:6. */
#if __BYTE_ORDER == __LITTLE_ENDIAN
#define TOP_FIRST "4"
diff --git a/gdb/gdbserver/nto-low.c b/gdb/gdbserver/nto-low.c
index ce3b8e4..7092aae 100644
--- a/gdb/gdbserver/nto-low.c
+++ b/gdb/gdbserver/nto-low.c
@@ -227,7 +227,7 @@ do_attach (pid_t pid)
/* Read or write LEN bytes from/to inferior's MEMADDR memory address
into gdbservers's MYADDR buffer. Return number of bytes actually
- transfered. */
+ transferred. */
static int
nto_xfer_memory (off_t memaddr, unsigned char *myaddr, int len,
diff --git a/gdb/gdbserver/server.c b/gdb/gdbserver/server.c
index 3f9ff2b..635dd12 100644
--- a/gdb/gdbserver/server.c
+++ b/gdb/gdbserver/server.c
@@ -1277,7 +1277,7 @@ struct qxfer
the starting point. The ANNEX can be used to provide additional
data-specific information to the target.
- Return the number of bytes actually transfered, zero when no
+ Return the number of bytes actually transferred, zero when no
further transfer is possible, -1 on error, -2 when the transfer
is not supported, and -3 on a verbose error message that should
be preserved. Return of a positive value smaller than LEN does
@@ -3059,7 +3059,7 @@ handle_v_requests (char *own_buf, int packet_len, int *new_packet_len)
}
/* Resume thread and wait for another event. In non-stop mode,
- don't really wait here, but return immediatelly to the event
+ don't really wait here, but return immediately to the event
loop. */
static void
myresume (char *own_buf, int step, int sig)
@@ -3237,7 +3237,7 @@ handle_status (char *own_buf)
{
find_inferior (&all_threads, queue_stop_reply_callback, NULL);
- /* The first is sent immediatly. OK is sent if there is no
+ /* The first is sent immediately. OK is sent if there is no
stopped thread, which is the same handling of the vStopped
packet (by design). */
notif_write_event (¬if_stop, own_buf);
diff --git a/gdb/gdbserver/server.h b/gdb/gdbserver/server.h
index f56c0f5..b485c75 100644
--- a/gdb/gdbserver/server.h
+++ b/gdb/gdbserver/server.h
@@ -138,7 +138,7 @@ extern int in_queued_stop_replies (ptid_t ptid);
#define MAXBUFBYTES(N) (((N)-32)/2)
/* Buffer sizes for transferring memory, registers, etc. Set to a constant
- value to accomodate multiple register formats. This value must be at least
+ value to accommodate multiple register formats. This value must be at least
as large as the largest register set supported by gdbserver. */
#define PBUFSIZ 16384
diff --git a/gdb/gdbserver/tracepoint.c b/gdb/gdbserver/tracepoint.c
index 7700ad1..84151b2 100644
--- a/gdb/gdbserver/tracepoint.c
+++ b/gdb/gdbserver/tracepoint.c
@@ -1005,7 +1005,7 @@ EXTERN_C_POP
/* Control structure holding the read/write/etc. pointers into the
trace buffer. We need more than one of these to implement a
- transaction-like mechanism to garantees that both GDBserver and the
+ transaction-like mechanism to guarantees that both GDBserver and the
in-process agent can try to change the trace buffer
simultaneously. */
diff --git a/gdb/gdbserver/win32-low.c b/gdb/gdbserver/win32-low.c
index 70abfcd..1653577 100644
--- a/gdb/gdbserver/win32-low.c
+++ b/gdb/gdbserver/win32-low.c
@@ -1411,7 +1411,7 @@ get_child_debug_event (struct target_waitstatus *ourstatus)
/* WinCE doesn't set an initial breakpoint automatically. To
stop the inferior, we flush all currently pending debug
events -- the thread list and the dll list are always
- reported immediatelly without delay, then, we suspend all
+ reported immediately without delay, then, we suspend all
threads and pretend we saw a trap at the current PC of the
main thread.
@@ -1435,7 +1435,7 @@ get_child_debug_event (struct target_waitstatus *ourstatus)
else
#endif
{
- /* Keep the wait time low enough for confortable remote
+ /* Keep the wait time low enough for comfortable remote
interruption, but high enough so gdbserver doesn't become a
bottleneck. */
if (!WaitForDebugEvent (¤t_event, 250))
@@ -1444,7 +1444,7 @@ get_child_debug_event (struct target_waitstatus *ourstatus)
if (e == ERROR_PIPE_NOT_CONNECTED)
{
- /* This will happen if the loader fails to succesfully
+ /* This will happen if the loader fails to successfully
load the application, e.g., if the main executable
tries to pull in a non-existing export from a
DLL. */
diff --git a/gdb/gdbtypes.c b/gdb/gdbtypes.c
index 5921aac..eb1c493 100644
--- a/gdb/gdbtypes.c
+++ b/gdb/gdbtypes.c
@@ -556,7 +556,7 @@ address_space_name_to_int (struct gdbarch *gdbarch, char *space_identifier)
}
/* Identify address space identifier by integer flag as defined in
- gdbtypes.h -- return the string version of the adress space name. */
+ gdbtypes.h -- return the string version of the address space name. */
const char *
address_space_int_to_name (struct gdbarch *gdbarch, int space_flag)
@@ -656,7 +656,7 @@ make_type_with_address_space (struct type *type, int space_flag)
If TYPEPTR and *TYPEPTR are non-zero, then *TYPEPTR points to
storage to hold the new qualified type; *TYPEPTR and TYPE must be
in the same objfile. Otherwise, allocate fresh memory for the new
- type whereever TYPE lives. If TYPEPTR is non-zero, set it to the
+ type wherever TYPE lives. If TYPEPTR is non-zero, set it to the
new type we construct. */
struct type *
@@ -739,7 +739,7 @@ make_atomic_type (struct type *type)
/* Replace the contents of ntype with the type *type. This changes the
contents, rather than the pointer for TYPE_MAIN_TYPE (ntype); thus
- the changes are propogated to all types in the TYPE_CHAIN.
+ the changes are propagated to all types in the TYPE_CHAIN.
In order to build recursive types, it's inevitable that we'll need
to update types in place --- but this sort of indiscriminate
@@ -1108,7 +1108,7 @@ create_array_type_with_stride (struct type *result_type,
undefined by setting it to zero. Although we are not expected
to trust TYPE_LENGTH in this case, setting the size to zero
allows us to avoid allocating objects of random sizes in case
- we accidently do. */
+ we accidentally do. */
TYPE_LENGTH (result_type) = 0;
}
@@ -1306,7 +1306,7 @@ set_type_self_type (struct type *type, struct type *self_type)
}
/* Smash TYPE to be a type of pointers to members of SELF_TYPE with type
- TO_TYPE. A member pointer is a wierd thing -- it amounts to a
+ TO_TYPE. A member pointer is a weird thing -- it amounts to a
typed offset into a struct, e.g. "an int at offset 8". A MEMBER
TYPE doesn't include the offset (that's the value of the MEMBER
itself), but does include the structure type into which it points
@@ -1561,7 +1561,7 @@ lookup_template_type (char *name, struct type *type,
TYPE can be either a struct or union, or a pointer or reference to
a struct or union. If it is a pointer or reference, its target
- type is automatically used. Thus '.' and '->' are interchangable,
+ type is automatically used. Thus '.' and '->' are interchangeable,
as specified for the definitions of the expression element types
STRUCTOP_STRUCT and STRUCTOP_PTR.
diff --git a/gdb/gnu-nat.c b/gdb/gnu-nat.c
index 927ee5c..0c22513 100644
--- a/gdb/gnu-nat.c
+++ b/gdb/gnu-nat.c
@@ -1439,7 +1439,7 @@ inf_continue (struct inf *inf)
/* The inferior used for all gdb target ops. */
struct inf *gnu_current_inf = 0;
-/* The inferior being waited for by gnu_wait. Since GDB is decidely not
+/* The inferior being waited for by gnu_wait. Since GDB is decidedly not
multi-threaded, we don't bother to lock this. */
struct inf *waiting_inf;
@@ -1576,7 +1576,7 @@ rewait:
else if (kind == TARGET_WAITKIND_STOPPED
&& w->status.value.sig == GDB_SIGNAL_TRAP)
/* Ah hah! A SIGTRAP from the inferior while starting up probably
- means we've succesfully completed an exec! */
+ means we've successfully completed an exec! */
{
inf_debug (inf, "one pending exec completed");
}
diff --git a/gdb/go32-nat.c b/gdb/go32-nat.c
index 6e608e2..1dc9795 100644
--- a/gdb/go32-nat.c
+++ b/gdb/go32-nat.c
@@ -1859,7 +1859,7 @@ get_cr3 (void)
the first Page Table's entry for its own address and the Page
Directory entry for that Page Table will hold the same
physical address. The loop below searches the entire UMB
- range of addresses for such an occurence. */
+ range of addresses for such an occurrence. */
unsigned long addr, pte_idx;
for (addr = 0xb0000, pte_idx = 0xb0;
diff --git a/gdb/hppa-tdep.c b/gdb/hppa-tdep.c
index 4bb49ed..0ab8d7d 100644
--- a/gdb/hppa-tdep.c
+++ b/gdb/hppa-tdep.c
@@ -86,7 +86,7 @@ struct hppa_objfile_private
by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
static const struct objfile_data *hppa_objfile_priv_data = NULL;
-/* Get at various relevent fields of an instruction word. */
+/* Get at various relevant fields of an instruction word. */
#define MASK_5 0x1f
#define MASK_11 0x7ff
#define MASK_14 0x3fff
@@ -368,7 +368,7 @@ read_unwind_info (struct objfile *objfile)
/* For reasons unknown the HP PA64 tools generate multiple unwinder
sections in a single executable. So we just iterate over every
- section in the BFD looking for unwinder sections intead of trying
+ section in the BFD looking for unwinder sections instead of trying
to do a lookup with bfd_get_section_by_name.
First determine the total size of the unwind tables so that we
diff --git a/gdb/i386-linux-nat.c b/gdb/i386-linux-nat.c
index 70d954f..073a198 100644
--- a/gdb/i386-linux-nat.c
+++ b/gdb/i386-linux-nat.c
@@ -148,7 +148,7 @@ store_register (const struct regcache *regcache, int regno)
}
\f
-/* Transfering the general-purpose registers between GDB, inferiors
+/* Transferring the general-purpose registers between GDB, inferiors
and core files. */
/* Fill GDB's register array with the general-purpose register values
@@ -245,7 +245,7 @@ static void store_regs (const struct regcache *regcache, int tid, int regno) {}
#endif
\f
-/* Transfering floating-point registers between GDB, inferiors and cores. */
+/* Transferring floating-point registers between GDB, inferiors and cores. */
/* Fill GDB's register array with the floating-point register values in
*FPREGSETP. */
@@ -270,7 +270,7 @@ fill_fpregset (const struct regcache *regcache,
#ifdef HAVE_PTRACE_GETREGS
/* Fetch all floating-point registers from process/thread TID and store
- thier values in GDB's register array. */
+ their values in GDB's register array. */
static void
fetch_fpregs (struct regcache *regcache, int tid)
@@ -315,7 +315,7 @@ store_fpregs (const struct regcache *regcache, int tid, int regno)
#endif
\f
-/* Transfering floating-point and SSE registers to and from GDB. */
+/* Transferring floating-point and SSE registers to and from GDB. */
/* Fetch all registers covered by the PTRACE_GETREGSET request from
process/thread TID and store their values in GDB's register array.
diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c
index 22fb54c..ebee20a 100644
--- a/gdb/i386-tdep.c
+++ b/gdb/i386-tdep.c
@@ -1487,7 +1487,7 @@ struct i386_insn i386_frame_setup_skip_insns[] =
/* Check for `mov imm32, r32'. Note that there is an alternative
encoding for `mov m32, %eax'.
- ??? Should we handle SIB adressing here?
+ ??? Should we handle SIB addressing here?
??? Should we handle 16-bit operand-sizes here? */
/* `movl m32, %eax' */
@@ -8356,7 +8356,7 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
tdep->st0_regnum = I386_ST0_REGNUM;
- /* I386_NUM_XREGS includes %mxcsr, so substract one. */
+ /* I386_NUM_XREGS includes %mxcsr, so subtract one. */
tdep->num_xmm_regs = I386_NUM_XREGS - 1;
tdep->jb_pc_offset = -1;
diff --git a/gdb/i386fbsd-nat.c b/gdb/i386fbsd-nat.c
index 716b513..d28dc44 100644
--- a/gdb/i386fbsd-nat.c
+++ b/gdb/i386fbsd-nat.c
@@ -73,7 +73,7 @@ i386fbsd_resume (struct target_ops *ops,
request = PT_CONTINUE;
}
- /* An addres of (caddr_t) 1 tells ptrace to continue from where it
+ /* An address of (caddr_t) 1 tells ptrace to continue from where it
was. (If GDB wanted it to start some other way, we have already
written a new PC value to the child.) */
if (ptrace (request, pid, (caddr_t) 1,
diff --git a/gdb/i386obsd-tdep.c b/gdb/i386obsd-tdep.c
index 08becfa..87cca73 100644
--- a/gdb/i386obsd-tdep.c
+++ b/gdb/i386obsd-tdep.c
@@ -162,7 +162,7 @@ i386obsd_aout_iterate_over_regset_sections (struct gdbarch *gdbarch,
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- /* OpenBSD a.out core dumps don't use seperate register sets for the
+ /* OpenBSD a.out core dumps don't use separate register sets for the
general-purpose and floating-point registers. */
cb (".reg", tdep->sizeof_gregset + I387_SIZEOF_FSAVE,
diff --git a/gdb/ia64-tdep.c b/gdb/ia64-tdep.c
index 475decd..51e23e6 100644
--- a/gdb/ia64-tdep.c
+++ b/gdb/ia64-tdep.c
@@ -589,7 +589,7 @@ fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
If we would like to store the whole bundle to SHADOW_CONTENTS we would have
to store already the base address (`address & ~0x0f') into PLACED_ADDRESS.
In such case there is no other place where to store
- SLOTNUM (`adress & 0x0f', value in the range <0..2>). We need to know
+ SLOTNUM (`address & 0x0f', value in the range <0..2>). We need to know
SLOTNUM in ia64_memory_remove_breakpoint.
There is one special case where we need to be extra careful:
diff --git a/gdb/ia64-tdep.h b/gdb/ia64-tdep.h
index 14c7a1e..c7de869 100644
--- a/gdb/ia64-tdep.h
+++ b/gdb/ia64-tdep.h
@@ -154,7 +154,7 @@
/* Predicate registers: There are 64 of these 1-bit registers. We
define a single register which is used to communicate these values
to/from the target. We will somehow contrive to make it appear
- that IA64_PR0_REGNUM thru IA64_PR63_REGNUM hold the actual values. */
+ that IA64_PR0_REGNUM through IA64_PR63_REGNUM hold the actual values. */
#define IA64_PR_REGNUM 330
/* Instruction pointer: 64 bits wide. */
diff --git a/gdb/inf-ptrace.c b/gdb/inf-ptrace.c
index 64aaabe..c16150a 100644
--- a/gdb/inf-ptrace.c
+++ b/gdb/inf-ptrace.c
@@ -570,7 +570,7 @@ inf_ptrace_xfer_partial (struct target_ops *ops, enum target_object object,
case TARGET_OBJECT_AUXV:
#if defined (PT_IO) && defined (PIOD_READ_AUXV)
/* OpenBSD 4.5 has a new PIOD_READ_AUXV operation for the PT_IO
- request that allows us to read the auxilliary vector. Other
+ request that allows us to read the auxiliary vector. Other
BSD's may follow if they feel the need to support PIE. */
{
struct ptrace_io_desc piod;
diff --git a/gdb/infcall.c b/gdb/infcall.c
index e435cf7..973e5eb 100644
--- a/gdb/infcall.c
+++ b/gdb/infcall.c
@@ -783,7 +783,7 @@ call_function_by_hand_dummy (struct value *function,
void parameterless generic dummy frame calls to frameless
functions will create a sequence of effectively identical
frames (SP, FP and TOS and PC the same). This, not
- suprisingly, results in what appears to be a stack in an
+ surprisingly, results in what appears to be a stack in an
infinite loop --- when GDB tries to find a generic dummy
frame on the internal dummy frame stack, it will always
find the first one.
diff --git a/gdb/infcmd.c b/gdb/infcmd.c
index 2440c0c..9a1c948 100644
--- a/gdb/infcmd.c
+++ b/gdb/infcmd.c
@@ -520,7 +520,7 @@ prepare_execution_command (struct target_ops *target, int background)
}
/* Implement the "run" command. If TBREAK_AT_MAIN is set, then insert
- a temporary breakpoint at the begining of the main program before
+ a temporary breakpoint at the beginning of the main program before
running the program. */
static void
@@ -2179,7 +2179,7 @@ set_environment_command (char *arg, int from_tty)
if (arg == 0)
error_no_arg (_("environment variable and value"));
- /* Find seperation between variable name and value. */
+ /* Find separation between variable name and value. */
p = (char *) strchr (arg, '=');
val = (char *) strchr (arg, ' ');
@@ -2698,7 +2698,7 @@ attach_post_wait (char *args, int from_tty, enum attach_post_wait_mode mode)
/* The user requested an `attach&', so be sure to leave threads
that didn't get a signal running. */
- /* Immediatelly resume all suspended threads of this inferior,
+ /* Immediately resume all suspended threads of this inferior,
and this inferior only. This should have no effect on
already running threads. If a thread has been stopped with a
signal, leave it be. */
@@ -3148,7 +3148,7 @@ info_proc_cmd_1 (char *args, enum info_proc_what what, int from_tty)
}
}
-/* Implement `info proc' when given without any futher parameters. */
+/* Implement `info proc' when given without any further parameters. */
static void
info_proc_cmd (char *args, int from_tty)
diff --git a/gdb/infrun.c b/gdb/infrun.c
index bf0632e..fad843a 100644
--- a/gdb/infrun.c
+++ b/gdb/infrun.c
@@ -1432,7 +1432,7 @@ step_over_info_valid_p (void)
register contents, and memory. We use this in step n1.
- gdbarch_displaced_step_fixup adjusts registers and memory after
- we have successfuly single-stepped the instruction, to yield the
+ we have successfully single-stepped the instruction, to yield the
same effect the instruction would have had if we had executed it
at its original address. We use this in step n3.
@@ -6179,7 +6179,7 @@ handle_signal_stop (struct execution_control_state *ecs)
return;
}
- /* Note: step_resume_breakpoint may be non-NULL. This occures
+ /* Note: step_resume_breakpoint may be non-NULL. This occurs
when either there's a nested signal, or when there's a
pending signal enabled just as the signal handler returns
(leaving the inferior at the step-resume-breakpoint without
diff --git a/gdb/linespec.c b/gdb/linespec.c
index 1604267..b6230e0 100644
--- a/gdb/linespec.c
+++ b/gdb/linespec.c
@@ -2712,7 +2712,7 @@ decode_line_with_last_displayed (char *string, int flags)
\f
-/* First, some functions to initialize stuff at the beggining of the
+/* First, some functions to initialize stuff at the beginning of the
function. */
static void
diff --git a/gdb/linux-nat.c b/gdb/linux-nat.c
index cbf94ed..4d919fd 100644
--- a/gdb/linux-nat.c
+++ b/gdb/linux-nat.c
@@ -1510,7 +1510,7 @@ linux_nat_detach (struct target_ops *ops, const char *args, int from_tty)
inferiors running. */
/* Stop all threads before detaching. ptrace requires that the
- thread is stopped to sucessfully detach. */
+ thread is stopped to successfully detach. */
iterate_over_lwps (pid_to_ptid (pid), stop_callback, NULL);
/* ... and wait until all of them have reported back that
they're no longer running. */
@@ -3771,7 +3771,7 @@ linux_nat_kill (struct target_ops *ops)
ptid_t ptid = pid_to_ptid (ptid_get_pid (inferior_ptid));
/* Stop all threads before killing them, since ptrace requires
- that the thread is stopped to sucessfully PTRACE_KILL. */
+ that the thread is stopped to successfully PTRACE_KILL. */
iterate_over_lwps (ptid, stop_callback, NULL);
/* ... and wait until all of them have reported back that
they're no longer running. */
diff --git a/gdb/linux-tdep.c b/gdb/linux-tdep.c
index 718dc1a..ada5095 100644
--- a/gdb/linux-tdep.c
+++ b/gdb/linux-tdep.c
@@ -182,7 +182,7 @@ static const struct inferior_data *linux_inferior_data;
/* Linux-specific cached data. This is used by GDB for caching
purposes for each inferior. This helps reduce the overhead of
- transfering data from a remote target to the local host. */
+ transferring data from a remote target to the local host. */
struct linux_info
{
/* Cache of the inferior's vsyscall/vDSO mapping range. Only valid
@@ -2001,7 +2001,7 @@ linux_make_corefile_notes (struct gdbarch *gdbarch, bfd *obfd, int *note_size)
if (!note_data)
return NULL;
- /* Auxillary vector. */
+ /* Auxiliary vector. */
auxv_len = target_read_alloc (¤t_target, TARGET_OBJECT_AUXV,
NULL, &auxv);
if (auxv_len > 0)
diff --git a/gdb/m32r-linux-nat.c b/gdb/m32r-linux-nat.c
index aaedf7f..c8fd142 100644
--- a/gdb/m32r-linux-nat.c
+++ b/gdb/m32r-linux-nat.c
@@ -58,7 +58,7 @@ static int regmap[] = {
\f
-/* Transfering the general-purpose registers between GDB, inferiors
+/* Transferring the general-purpose registers between GDB, inferiors
and core files. */
/* Fill GDB's register array with the general-purpose register values
@@ -168,7 +168,7 @@ store_regs (const struct regcache *regcache, int tid, int regno)
\f
-/* Transfering floating-point registers between GDB, inferiors and cores.
+/* Transferring floating-point registers between GDB, inferiors and cores.
Since M32R has no floating-point registers, these functions do nothing. */
void
diff --git a/gdb/m32r-tdep.c b/gdb/m32r-tdep.c
index 31ea3ed..53fc4c4 100644
--- a/gdb/m32r-tdep.c
+++ b/gdb/m32r-tdep.c
@@ -292,7 +292,7 @@ decode_prologue (struct gdbarch *gdbarch,
if (insn == 0x0000)
break;
- /* If this is a 32 bit instruction, we dont want to examine its
+ /* If this is a 32 bit instruction, we don't want to examine its
immediate data as though it were an instruction. */
if (current_pc & 0x02)
{
diff --git a/gdb/m68klinux-nat.c b/gdb/m68klinux-nat.c
index 5b8684b..874e2c7 100644
--- a/gdb/m68klinux-nat.c
+++ b/gdb/m68klinux-nat.c
@@ -301,7 +301,7 @@ static void store_regs (const struct regcache *regcache, int tid, int regno)
#endif
\f
-/* Transfering floating-point registers between GDB, inferiors and cores. */
+/* Transferring floating-point registers between GDB, inferiors and cores. */
/* What is the address of fpN within the floating-point register set F? */
#define FPREG_ADDR(f, n) (&(f)->fpregs[(n) * 3])
@@ -354,7 +354,7 @@ fill_fpregset (const struct regcache *regcache,
#ifdef HAVE_PTRACE_GETREGS
/* Fetch all floating-point registers from process/thread TID and store
- thier values in GDB's register array. */
+ their values in GDB's register array. */
static void
fetch_fpregs (struct regcache *regcache, int tid)
diff --git a/gdb/macroexp.h b/gdb/macroexp.h
index 712bf34..2b45f85 100644
--- a/gdb/macroexp.h
+++ b/gdb/macroexp.h
@@ -69,7 +69,7 @@ char *macro_expand_once (const char *source,
freeing it, using xfree.
We need this expand-one-token-at-a-time interface in order to
- accomodate GDB's C expression parser, which may not consume the
+ accommodate GDB's C expression parser, which may not consume the
entire string. When the user enters a command like
(gdb) break *func+20 if x == 5
diff --git a/gdb/macrotab.h b/gdb/macrotab.h
index ed86336..e9d5b1e 100644
--- a/gdb/macrotab.h
+++ b/gdb/macrotab.h
@@ -90,7 +90,7 @@ struct macro_definition;
line info, but not in macro info. This means that GDB's symtabs
(built from the former, among other things) may mention filenames
that the #inclusion tree (built from the latter) doesn't have any
- record of. See macroscope.c:sal_macro_scope for how to accomodate
+ record of. See macroscope.c:sal_macro_scope for how to accommodate
this.
It's worth noting that libcpp has a simpler way of representing all
diff --git a/gdb/mdebugread.c b/gdb/mdebugread.c
index a149ee9..be4779f 100644
--- a/gdb/mdebugread.c
+++ b/gdb/mdebugread.c
@@ -190,7 +190,7 @@ static const struct ecoff_debug_swap *debug_swap;
static struct ecoff_debug_info *debug_info;
-/* Pointer to current file decriptor record, and its index. */
+/* Pointer to current file descriptor record, and its index. */
static FDR *cur_fdr;
static int cur_fd;
@@ -420,7 +420,7 @@ static struct parse_stack
struct type *cur_type; /* Type we parse fields for. */
int cur_field; /* Field number in cur_type. */
- CORE_ADDR procadr; /* Start addres of this procedure. */
+ CORE_ADDR procadr; /* Start address of this procedure. */
int numargs; /* Its argument count. */
}
@@ -1336,7 +1336,7 @@ parse_symbol (SYMR *sh, union aux_ext *ax, char *ext_sh, int bigend,
consequence of GDB's type management; CC and GCC (at
least through version 2.4) both output variables of
either type char * or caddr_t with the type
- refering to the stTypedef symbol for caddr_t. If a future
+ referring to the stTypedef symbol for caddr_t. If a future
compiler cleans this up it GDB is not ready for it
yet, but if it becomes ready we somehow need to
disable this check (without breaking the PCC/GCC2.4
@@ -2562,14 +2562,14 @@ parse_partial_symbols (minimal_symbol_reader &reader,
/* On certain platforms, some extra label symbols can be
generated by the linker. One possible usage for this kind
- of symbols is to represent the address of the begining of a
+ of symbols is to represent the address of the beginning of a
given section. For instance, on Tru64 5.1, the address of
the _ftext label is the start address of the .text section.
The storage class of these symbols is usually directly
related to the section to which the symbol refers. For
instance, on Tru64 5.1, the storage class for the _fdata
- label is scData, refering to the .data section.
+ label is scData, referring to the .data section.
It is actually possible that the section associated to the
storage class of the label does not exist. On True64 5.1
diff --git a/gdb/mep-tdep.c b/gdb/mep-tdep.c
index 80d2b76..88413be 100644
--- a/gdb/mep-tdep.c
+++ b/gdb/mep-tdep.c
@@ -58,7 +58,7 @@
/* A quick recap for GDB hackers not familiar with the whole Toshiba
Media Processor story:
- The MeP media engine is a configureable processor: users can design
+ The MeP media engine is a configurable processor: users can design
their own coprocessors, implement custom instructions, adjust cache
sizes, select optional standard facilities like add-and-saturate
instructions, and so on. Then, they can build custom versions of
diff --git a/gdb/mi/mi-cmds.c b/gdb/mi/mi-cmds.c
index 85c19c1..3e71b59 100644
--- a/gdb/mi/mi-cmds.c
+++ b/gdb/mi/mi-cmds.c
@@ -185,7 +185,7 @@ static struct mi_cmd mi_cmds[] =
static struct mi_cmd **mi_table;
-/* A prime large enough to accomodate the entire command table. */
+/* A prime large enough to accommodate the entire command table. */
enum
{
MI_TABLE_SIZE = 227
diff --git a/gdb/mi/mi-getopt.h b/gdb/mi/mi-getopt.h
index b0b0faa..8ce3f4f 100644
--- a/gdb/mi/mi-getopt.h
+++ b/gdb/mi/mi-getopt.h
@@ -58,7 +58,7 @@ extern int mi_getopt_allow_unknown (const char *prefix, int argc,
/* mi_valid_noargs determines if ARGC/ARGV are a valid set of
parameters to satisfy an MI function that is not supposed to
- recieve any arguments.
+ receive any arguments.
An MI function that should not receive arguments can still be
passed parameters after the special option '--' such as below.
diff --git a/gdb/mi/mi-main.c b/gdb/mi/mi-main.c
index 984a415..678ef6c 100644
--- a/gdb/mi/mi-main.c
+++ b/gdb/mi/mi-main.c
@@ -1525,7 +1525,7 @@ mi_cmd_data_read_memory (char *command, char **argv, int argc)
ui_out_field_core_addr (uiout, "next-page", gdbarch, addr + total_bytes);
ui_out_field_core_addr (uiout, "prev-page", gdbarch, addr - total_bytes);
- /* Build the result as a two dimentional table. */
+ /* Build the result as a two dimensional table. */
{
struct ui_file *stream;
struct cleanup *cleanup_stream;
diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
index 6dd5b42..86f1622 100644
--- a/gdb/microblaze-tdep.c
+++ b/gdb/microblaze-tdep.c
@@ -169,7 +169,7 @@ microblaze_alloc_frame_cache (void)
/* The base of the current frame is in a frame pointer register.
This register is noted in frame_extra_info->fp_regnum.
- Note that the existance of an FP might also indicate that the
+ Note that the existence of an FP might also indicate that the
function has called alloca. */
#define MICROBLAZE_MY_FRAME_IN_FP 0x2
diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index c0c6442..4b5b10f 100644
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -523,7 +523,7 @@ mips_xfer_register (struct gdbarch *gdbarch, struct regcache *regcache,
}
/* Determine if a MIPS3 or later cpu is operating in MIPS{1,2} FPU
- compatiblity mode. A return value of 1 means that we have
+ compatibility mode. A return value of 1 means that we have
physical 64-bit registers, but should treat them as 32-bit registers. */
static int
@@ -539,7 +539,7 @@ mips2_fp_compat (struct frame_info *frame)
/* FIXME drow 2002-03-10: This is disabled until we can do it consistently,
in all the places we deal with FP registers. PR gdb/413. */
/* Otherwise check the FR bit in the status register - it controls
- the FP compatiblity mode. If it is clear we are in compatibility
+ the FP compatibility mode. If it is clear we are in compatibility
mode. */
if ((get_frame_register_unsigned (frame, MIPS_PS_REGNUM) & ST0_FR) == 0)
return 1;
@@ -559,7 +559,7 @@ static void reinit_frame_cache_sfunc (char *, int, struct cmd_list_element *);
static struct cmd_list_element *setmipscmdlist = NULL;
static struct cmd_list_element *showmipscmdlist = NULL;
-/* Integer registers 0 thru 31 are handled explicitly by
+/* Integer registers 0 through 31 are handled explicitly by
mips_register_name(). Processor specific registers 32 and above
are listed in the following tables. */
@@ -883,7 +883,7 @@ mips_convert_register_float_case_p (struct gdbarch *gdbarch, int regnum,
}
/* This predicate tests for the case of a value of less than 8
- bytes in width that is being transfered to or from an 8 byte
+ bytes in width that is being transferred to or from an 8 byte
general purpose register. */
static int
mips_convert_register_gpreg_case_p (struct gdbarch *gdbarch, int regnum,
@@ -1036,7 +1036,7 @@ mips_register_type (struct gdbarch *gdbarch, int regnum)
return builtin_type (gdbarch)->builtin_int32;
else if (gdbarch_tdep (gdbarch)->mips64_transfers_32bit_regs_p)
/* The target, while possibly using a 64-bit register buffer,
- is only transfering 32-bits of each integer register.
+ is only transferring 32-bits of each integer register.
Reflect this in the cooked/pseudo (ABI) register value. */
return builtin_type (gdbarch)->builtin_int32;
else if (mips_abi_regsize (gdbarch) == 4)
@@ -2063,7 +2063,7 @@ micromips_next_pc (struct frame_info *frame, CORE_ADDR pc)
/* Decoding the next place to set a breakpoint is irregular for the
mips 16 variant, but fortunately, there fewer instructions. We have
to cope ith extensions for 16 bit instructions and a pair of actual
- 32 bit instructions. We dont want to set a single step instruction
+ 32 bit instructions. We don't want to set a single step instruction
on the extend instruction either. */
/* Lots of mips16 instruction formats */
@@ -2822,7 +2822,7 @@ mips_insn16_frame_cache (struct frame_info *this_frame, void **this_cache)
find_pc_partial_function (pc, NULL, &start_addr, NULL);
if (start_addr == 0)
start_addr = heuristic_proc_start (gdbarch, pc);
- /* We can't analyze the prologue if we couldn't find the begining
+ /* We can't analyze the prologue if we couldn't find the beginning
of the function. */
if (start_addr == 0)
return cache;
@@ -3257,7 +3257,7 @@ mips_micro_frame_cache (struct frame_info *this_frame, void **this_cache)
find_pc_partial_function (pc, NULL, &start_addr, NULL);
if (start_addr == 0)
start_addr = heuristic_proc_start (get_frame_arch (this_frame), pc);
- /* We can't analyze the prologue if we couldn't find the begining
+ /* We can't analyze the prologue if we couldn't find the beginning
of the function. */
if (start_addr == 0)
return cache;
@@ -3635,7 +3635,7 @@ mips_insn32_frame_cache (struct frame_info *this_frame, void **this_cache)
find_pc_partial_function (pc, NULL, &start_addr, NULL);
if (start_addr == 0)
start_addr = heuristic_proc_start (gdbarch, pc);
- /* We can't analyze the prologue if we couldn't find the begining
+ /* We can't analyze the prologue if we couldn't find the beginning
of the function. */
if (start_addr == 0)
return cache;
@@ -4520,7 +4520,7 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
}
/* Now load as many as possible of the first arguments into
- registers, and push the rest onto the stack. Loop thru args
+ registers, and push the rest onto the stack. Loop through args
from first to last. */
for (argnum = 0; argnum < nargs; argnum++)
{
@@ -4690,7 +4690,7 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
}
/* Note!!! This is NOT an else clause. Odd sized
- structs may go thru BOTH paths. Floating point
+ structs may go through BOTH paths. Floating point
arguments will not. */
/* Write this portion of the argument to a general
purpose register. */
@@ -4908,7 +4908,7 @@ mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
}
/* Now load as many as possible of the first arguments into
- registers, and push the rest onto the stack. Loop thru args
+ registers, and push the rest onto the stack. Loop through args
from first to last. */
for (argnum = 0; argnum < nargs; argnum++)
{
@@ -5039,7 +5039,7 @@ mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
}
/* Note!!! This is NOT an else clause. Odd sized
- structs may go thru BOTH paths. */
+ structs may go through BOTH paths. */
/* Write this portion of the argument to a general
purpose register. */
if (argreg <= MIPS_LAST_ARG_REGNUM (gdbarch))
@@ -5373,7 +5373,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
}
/* Now load as many as possible of the first arguments into
- registers, and push the rest onto the stack. Loop thru args
+ registers, and push the rest onto the stack. Loop through args
from first to last. */
for (argnum = 0; argnum < nargs; argnum++)
{
@@ -5536,7 +5536,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
}
/* Note!!! This is NOT an else clause. Odd sized
- structs may go thru BOTH paths. */
+ structs may go through BOTH paths. */
/* Write this portion of the argument to a general
purpose register. */
if (argreg <= MIPS_LAST_ARG_REGNUM (gdbarch))
@@ -5598,7 +5598,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
In older ABIs, the caller reserved space for
registers that contained arguments. This was loosely
- refered to as their "home". Consequently, space is
+ referred to as their "home". Consequently, space is
always allocated. */
stack_offset += align_up (partial_len, MIPS32_REGSIZE);
@@ -5895,7 +5895,7 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
}
/* Now load as many as possible of the first arguments into
- registers, and push the rest onto the stack. Loop thru args
+ registers, and push the rest onto the stack. Loop through args
from first to last. */
for (argnum = 0; argnum < nargs; argnum++)
{
@@ -5999,7 +5999,7 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
}
/* Note!!! This is NOT an else clause. Odd sized
- structs may go thru BOTH paths. */
+ structs may go through BOTH paths. */
/* Write this portion of the argument to a general
purpose register. */
if (argreg <= MIPS_LAST_ARG_REGNUM (gdbarch))
@@ -6045,7 +6045,7 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
In older ABIs, the caller reserved space for
registers that contained arguments. This was loosely
- refered to as their "home". Consequently, space is
+ referred to as their "home". Consequently, space is
always allocated. */
stack_offset += align_up (partial_len, MIPS64_REGSIZE);
diff --git a/gdb/moxie-tdep.c b/gdb/moxie-tdep.c
index b341945..38411df 100644
--- a/gdb/moxie-tdep.c
+++ b/gdb/moxie-tdep.c
@@ -275,7 +275,7 @@ struct moxie_unwind_cache
};
/* Read an unsigned integer from the inferior, and adjust
- endianess. */
+ endianness. */
static ULONGEST
moxie_process_readu (CORE_ADDR addr, gdb_byte *buf,
int length, enum bfd_endian byte_order)
diff --git a/gdb/mt-tdep.c b/gdb/mt-tdep.c
index e958cc4..5ae935b 100644
--- a/gdb/mt-tdep.c
+++ b/gdb/mt-tdep.c
@@ -793,7 +793,7 @@ mt_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
int typelen;
int i, j;
- /* First handle however many args we can fit into MT_1ST_ARGREG thru
+ /* First handle however many args we can fit into MT_1ST_ARGREG through
MT_LAST_ARGREG. */
for (i = 0; i < nargs && argreg <= MT_LAST_ARGREG; i++)
{
diff --git a/gdb/nto-procfs.c b/gdb/nto-procfs.c
index 311a0b1..a906d7d 100644
--- a/gdb/nto-procfs.c
+++ b/gdb/nto-procfs.c
@@ -263,7 +263,7 @@ update_thread_private_data_name (struct thread_info *new_thread,
}
else if (strcmp (newname, new_thread->priv->name) != 0)
{
- /* Reallocate if neccessary. */
+ /* Reallocate if necessary. */
int oldnamelen = strlen (new_thread->priv->name);
if (oldnamelen < newnamelen)
@@ -944,7 +944,7 @@ procfs_xfer_partial (struct target_ops *ops, enum target_object object,
*xfered_len = tempread;
return tempread ? TARGET_XFER_OK : TARGET_XFER_EOF;
}
- /* Fallthru */
+ /* Fall through */
default:
return ops->beneath->to_xfer_partial (ops->beneath, object, annex,
readbuf, writebuf, offset, len,
diff --git a/gdb/nto-tdep.h b/gdb/nto-tdep.h
index 81ed50c..b86a7fb 100644
--- a/gdb/nto-tdep.h
+++ b/gdb/nto-tdep.h
@@ -99,7 +99,7 @@ extern struct nto_target_ops current_nto_target;
#define nto_is_nto_target (current_nto_target.is_nto_target)
-/* Keep this consistant with neutrino syspage.h. */
+/* Keep this consistent with neutrino syspage.h. */
enum
{
CPUTYPE_X86,
diff --git a/gdb/objc-lang.c b/gdb/objc-lang.c
index 43d83da..c7fdeb3 100644
--- a/gdb/objc-lang.c
+++ b/gdb/objc-lang.c
@@ -553,7 +553,7 @@ compare_selectors (const void *a, const void *b)
*
* Implements the "Info selectors" command. Takes an optional regexp
* arg. Lists all objective c selectors that match the regexp. Works
- * by grepping thru all symbols for objective c methods. Output list
+ * by grepping through all symbols for objective c methods. Output list
* is sorted and uniqued.
*/
@@ -604,7 +604,7 @@ selectors_info (char *regexp, int from_tty)
error (_("Invalid regexp (%s): %s"), val, regexp);
}
- /* First time thru is JUST to get max length and count. */
+ /* First time through is JUST to get max length and count. */
ALL_MSYMBOLS (objfile, msymbol)
{
QUIT;
@@ -714,7 +714,7 @@ compare_classes (const void *a, const void *b)
*
* Implements the "info classes" command for objective c classes.
* Lists all objective c classes that match the optional regexp.
- * Works by grepping thru the list of objective c methods. List will
+ * Works by grepping through the list of objective c methods. List will
* be sorted and uniqued (since one class may have many methods).
* BUGS: will not list a class that has no methods.
*/
@@ -755,7 +755,7 @@ classes_info (char *regexp, int from_tty)
error (_("Invalid regexp (%s): %s"), val, regexp);
}
- /* First time thru is JUST to get max length and count. */
+ /* First time through is JUST to get max length and count. */
ALL_MSYMBOLS (objfile, msymbol)
{
QUIT;
@@ -1227,7 +1227,7 @@ print_object_command (char *args, int from_tty)
printf_filtered ("\n");
}
-/* The data structure 'methcalls' is used to detect method calls (thru
+/* The data structure 'methcalls' is used to detect method calls (through
* ObjC runtime lib functions objc_msgSend, objc_msgSendSuper, etc.),
* and ultimately find the method being called.
*/
diff --git a/gdb/ppc-linux-nat.c b/gdb/ppc-linux-nat.c
index 84c14a1..62cde53 100644
--- a/gdb/ppc-linux-nat.c
+++ b/gdb/ppc-linux-nat.c
@@ -887,7 +887,7 @@ store_altivec_register (const struct regcache *regcache, int tid, int regno)
perror_with_name (_("Unable to store AltiVec register"));
}
-/* Assuming TID referrs to an SPE process, set the top halves of TID's
+/* Assuming TID refers to an SPE process, set the top halves of TID's
general-purpose registers and its SPE-specific registers to the
values in EVRREGSET. If we don't support PTRACE_SETEVRREGS, do
nothing.
diff --git a/gdb/ppc-linux-tdep.c b/gdb/ppc-linux-tdep.c
index 9c0b8fc..6e5b998 100644
--- a/gdb/ppc-linux-tdep.c
+++ b/gdb/ppc-linux-tdep.c
@@ -125,7 +125,7 @@ static struct target_so_ops powerpc_so_ops;
(gdb) b main
Breakpoint 2 at 0x100006a0: file gdb.base/shmain.c, line 44.
- Examine the instruction (and the immediatly following instruction)
+ Examine the instruction (and the immediately following instruction)
upon which the breakpoint was placed. Note that the PLT entry
for shr1 contains zeros.
diff --git a/gdb/printcmd.c b/gdb/printcmd.c
index f434f5f..cd78371 100644
--- a/gdb/printcmd.c
+++ b/gdb/printcmd.c
@@ -609,7 +609,7 @@ print_address_symbolic (struct gdbarch *gdbarch, CORE_ADDR addr,
address in a symbolic form. NAME can be mangled or not depending
on DO_DEMANGLE (and also on the asm_demangle global variable,
manipulated via ''set print asm-demangle''). Return 0 in case of
- success, when all the info in the OUT paramters is valid. Return 1
+ success, when all the info in the OUT parameters is valid. Return 1
otherwise. */
int
build_address_symbolic (struct gdbarch *gdbarch,
diff --git a/gdb/procfs.c b/gdb/procfs.c
index ff814ba..376c000 100644
--- a/gdb/procfs.c
+++ b/gdb/procfs.c
@@ -80,7 +80,7 @@
In order to keep most of the code simple and clean, I have defined
an interface "layer" which hides all these system calls. An ifdef
(NEW_PROC_API) determines which interface we are using, and most or
- all occurrances of this ifdef should be confined to this interface
+ all occurrences of this ifdef should be confined to this interface
layer. */
/* Determine which /proc API we are using: The ioctl API defines
@@ -320,7 +320,7 @@ typedef siginfo_t gdb_siginfo_t;
concerning a /proc process. There should be exactly one procinfo
for each process, and since GDB currently can debug only one
process at a time, that means there should be only one procinfo.
- All of the LWP's of a process can be accessed indirectly thru the
+ All of the LWP's of a process can be accessed indirectly through the
single process procinfo.
However, against the day when GDB may debug more than one process,
@@ -575,7 +575,7 @@ open_procinfo_files (procinfo *pi, int which)
Solaris 2.5 LWP's:
Each LWP has an independent file descriptor, but these
are not obtained via the 'open' system call like the rest:
- instead, they're obtained thru an ioctl call (PIOCOPENLWP)
+ instead, they're obtained through an ioctl call (PIOCOPENLWP)
to the file descriptor of the parent process.
OSF threads:
@@ -628,7 +628,7 @@ open_procinfo_files (procinfo *pi, int which)
/* In this case, there is only one file descriptor for each procinfo
(ie. each process or LWP). In fact, only the file descriptor for
the process can actually be opened by an 'open' system call. The
- ones for the LWPs have to be obtained thru an IOCTL call on the
+ ones for the LWPs have to be obtained through an IOCTL call on the
process's file descriptor.
For convenience, we copy each procinfo's single file descriptor
@@ -1006,7 +1006,7 @@ find_syscall (procinfo *pi, char *name)
The main motivation for this layer is to hide the fact that there
are two very different implementations of the /proc API. Rather
- than have a bunch of #ifdefs all thru the gdb target vector
+ than have a bunch of #ifdefs all through the gdb target vector
functions, we do our best to hide them all in here. */
static long proc_flags (procinfo * pi);
@@ -1398,7 +1398,7 @@ proc_unset_run_on_last_close (procinfo *pi)
}
/* Reset inherit_on_fork flag. If the process forks a child while we
- are registered for events in the parent, then we will NOT recieve
+ are registered for events in the parent, then we will NOT receive
events from the child. Returns non-zero for success, zero for
failure. */
@@ -2502,7 +2502,7 @@ proc_get_LDT_entry (procinfo *pi, int key)
/* Make sure it gets closed again! */
old_chain = make_cleanup_close (fd);
- /* Now 'read' thru the table, find a match and return it. */
+ /* Now 'read' through the table, find a match and return it. */
while (read (fd, ldt_entry, sizeof (struct ssd)) == sizeof (struct ssd))
{
if (ldt_entry->sel == 0 &&
@@ -3459,7 +3459,7 @@ insert_dbx_link_bpt_in_file (int fd, CORE_ADDR ignored)
space in the process. The callback function receives an open file
descriptor for the file corresponding to that mapped address space
(if there is one), and the base address of the mapped space. Quit
- when the callback function returns a nonzero value, or at teh end
+ when the callback function returns a nonzero value, or at the end
of the mappings. Returns the first non-zero return value of the
callback function, or zero. */
diff --git a/gdb/prologue-value.h b/gdb/prologue-value.h
index 360dc4e..a64abcd 100644
--- a/gdb/prologue-value.h
+++ b/gdb/prologue-value.h
@@ -121,7 +121,7 @@ enum prologue_value_kind
understand and maintain. In the approach used here:
- It's easier to see that the analyzer is correct: you just see
- whether the analyzer properly (albiet conservatively) simulates
+ whether the analyzer properly (albeit conservatively) simulates
the effect of each instruction.
- It's easier to extend the analyzer: you can add support for new
diff --git a/gdb/remote-fileio.c b/gdb/remote-fileio.c
index e35bd5b..c15c59d 100644
--- a/gdb/remote-fileio.c
+++ b/gdb/remote-fileio.c
@@ -1076,7 +1076,7 @@ remote_fileio_func_system (char *buf)
}
}
- /* Check if system(3) has been explicitely allowed using the
+ /* Check if system(3) has been explicitly allowed using the
`set remote system-call-allowed 1' command. If length is 0,
indicating a NULL parameter to the system call, return zero to
indicate a shell is not available. Otherwise fail with EPERM. */
diff --git a/gdb/remote.c b/gdb/remote.c
index ef6c54e..80eb7b5 100644
--- a/gdb/remote.c
+++ b/gdb/remote.c
@@ -914,7 +914,7 @@ static struct target_ops extended_remote_ops;
/* FIXME: cagney/1999-09-23: Even though getpkt was called with
``forever'' still use the normal timeout mechanism. This is
- currently used by the ASYNC code to guarentee that target reads
+ currently used by the ASYNC code to guarantee that target reads
during the initial connect always time-out. Once getpkt has been
modified to return a timeout indication and, in turn
remote_wait()/wait_for_inferior() have gained a timeout parameter
@@ -999,7 +999,7 @@ show_remotebreak (struct ui_file *file, int from_tty,
memory packets to ``host::sizeof long'' bytes - (typically 32
bits). Consequently, for 64 bit targets, the upper 32 bits of an
address was never sent. Since fixing this bug may cause a break in
- some remote targets this variable is principly provided to
+ some remote targets this variable is principally provided to
facilitate backward compatibility. */
static unsigned int remote_address_size;
@@ -1315,7 +1315,7 @@ packet_check_result (const char *buf)
if (buf[0] == 'E'
&& isxdigit (buf[1]) && isxdigit (buf[2])
&& buf[3] == '\0')
- /* "Enn" - definitly an error. */
+ /* "Enn" - definitely an error. */
return PACKET_ERROR;
/* Always treat "E." as an error. This will be used for
@@ -2311,7 +2311,7 @@ remote_thread_name (struct target_ops *ops, struct thread_info *info)
/* WARNING: This threadref data structure comes from the remote O.S.,
libstub protocol encoding, and remote.c. It is not particularly
- changable. */
+ changeable. */
/* Right now, the internal structure is int. We want it to be bigger.
Plan to fix this. */
@@ -2895,9 +2895,9 @@ remote_get_threadlist (int startflag, threadref *nextthread, int result_limit,
if (!threadmatch (&rs->echo_nextthread, nextthread))
{
/* FIXME: This is a good reason to drop the packet. */
- /* Possably, there is a duplicate response. */
+ /* Possibly, there is a duplicate response. */
/* Possabilities :
- retransmit immediatly - race conditions
+ retransmit immediately - race conditions
retransmit after timeout - yes
exit
wait for packet, then exit
@@ -4800,7 +4800,7 @@ remote_query_supported (void)
getpkt (&rs->buf, &rs->buf_size, 0);
- /* If an error occured, warn, but do not return - just reset the
+ /* If an error occurred, warn, but do not return - just reset the
buffer to empty and go on to disable features. */
if (packet_ok (rs->buf, &remote_protocol_packets[PACKET_qSupported])
== PACKET_ERROR)
@@ -5100,7 +5100,7 @@ remote_open_1 (const char *name, int from_tty,
/* Start the remote connection. If error() or QUIT, discard this
target (we'd otherwise be in an inconsistent state) and then
- propogate the error on up the exception chain. This ensures that
+ propagate the error on up the exception chain. This ensures that
the caller doesn't stumble along blindly assuming that the
function succeeded. The CLI doesn't have this problem but other
UI's, such as MI do.
@@ -7130,7 +7130,7 @@ Packet: '%s'\n"),
<GDB marks the REMOTE_ASYNC_GET_PENDING_EVENTS_TOKEN>
2.5) <-- (registers reply to step #2.3)
- Eventualy after step #2.5, we return to the event loop, which
+ Eventually after step #2.5, we return to the event loop, which
notices there's an event on the
REMOTE_ASYNC_GET_PENDING_EVENTS_TOKEN event and calls the
associated callback --- the function below. At this point, we're
@@ -8098,7 +8098,7 @@ remote_write_bytes_aux (const char *header, CORE_ADDR memaddr,
strcat (rs->buf, header);
p = rs->buf + strlen (header);
- /* Compute a best guess of the number of bytes actually transfered. */
+ /* Compute a best guess of the number of bytes actually transferred. */
if (packet_format == 'X')
{
/* Best guess at number of bytes that will fit. */
@@ -13683,7 +13683,7 @@ static serial_event_ftype remote_async_serial_handler;
static void
remote_async_serial_handler (struct serial *scb, void *context)
{
- /* Don't propogate error information up to the client. Instead let
+ /* Don't propagate error information up to the client. Instead let
the client find out about the error by querying the target. */
inferior_event_handler (INF_REG_EVENT, NULL);
}
diff --git a/gdb/rs6000-aix-tdep.c b/gdb/rs6000-aix-tdep.c
index a7a3937..05d06ab 100644
--- a/gdb/rs6000-aix-tdep.c
+++ b/gdb/rs6000-aix-tdep.c
@@ -204,7 +204,7 @@ rs6000_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
on PPC variants that lack them. */
gdb_assert (ppc_floating_point_unit_p (gdbarch));
- /* The first eight words of ther arguments are passed in registers.
+ /* The first eight words of the arguments are passed in registers.
Copy them appropriately. */
ii = 0;
@@ -577,7 +577,7 @@ rs6000_convert_from_func_ptr_addr (struct gdbarch *gdbarch,
}
CATCH (e, RETURN_MASK_ERROR)
{
- /* An error occured during reading. Probably a memory error
+ /* An error occurred during reading. Probably a memory error
due to the section not being loaded yet. This address
cannot be a function descriptor. */
return addr;
diff --git a/gdb/rs6000-lynx178-tdep.c b/gdb/rs6000-lynx178-tdep.c
index 91eebbf..a53c2e0 100644
--- a/gdb/rs6000-lynx178-tdep.c
+++ b/gdb/rs6000-lynx178-tdep.c
@@ -55,7 +55,7 @@ rs6000_lynx178_push_dummy_call (struct gdbarch *gdbarch,
on PPC variants that lack them. */
gdb_assert (ppc_floating_point_unit_p (gdbarch));
- /* The first eight words of ther arguments are passed in registers.
+ /* The first eight words of the arguments are passed in registers.
Copy them appropriately. */
ii = 0;
diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c
index 5e10893..3888add 100644
--- a/gdb/rs6000-tdep.c
+++ b/gdb/rs6000-tdep.c
@@ -1365,7 +1365,7 @@ rs6000_fetch_instruction (struct gdbarch *gdbarch, const CORE_ADDR pc)
return op;
}
-/* GCC generates several well-known sequences of instructions at the begining
+/* GCC generates several well-known sequences of instructions at the beginning
of each function prologue when compiling with -fstack-check. If one of
such sequences starts at START_PC, then return the address of the
instruction immediately past this sequence. Otherwise, return START_PC. */
@@ -6056,7 +6056,7 @@ rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
valid_p &= tdesc_numbered_register (feature, tdesc_data, PPC_XER_REGNUM,
"xer");
- /* Allow alternate names for these registers, to accomodate GDB's
+ /* Allow alternate names for these registers, to accommodate GDB's
historic naming. */
valid_p &= tdesc_numbered_register_choices (feature, tdesc_data,
PPC_MSR_REGNUM, msr_names);
diff --git a/gdb/rust-lang.h b/gdb/rust-lang.h
index 8cde84a..f597287 100644
--- a/gdb/rust-lang.h
+++ b/gdb/rust-lang.h
@@ -42,7 +42,7 @@ extern char *rust_crate_for_block (const struct block *block);
/* Create a new slice type. NAME is the name of the type. ELT_TYPE
is the type of the elements of the slice. USIZE_TYPE is the Rust
- "usize" type to use. The new type is allocated whereever ELT_TYPE
+ "usize" type to use. The new type is allocated wherever ELT_TYPE
is allocated. */
struct type *rust_slice_type (const char *name, struct type *elt_type,
struct type *usize_type);
diff --git a/gdb/s390-linux-tdep.c b/gdb/s390-linux-tdep.c
index 885aadd..ecd1647 100644
--- a/gdb/s390-linux-tdep.c
+++ b/gdb/s390-linux-tdep.c
@@ -3325,7 +3325,7 @@ s390_handle_arg (struct s390_arg_state *as, struct value *arg,
for S/390 ELF Application Binary Interface Supplement".
SP is the current stack pointer. We must put arguments, links,
- padding, etc. whereever they belong, and return the new stack
+ padding, etc. wherever they belong, and return the new stack
pointer value.
If STRUCT_RETURN is non-zero, then the function we're calling is
@@ -5198,7 +5198,7 @@ ex:
return -1;
break;
}
- /* For other instructions, fallthru. */
+ /* For other instructions, fall through. */
default:
fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM* function %02x at %s.\n",
(int)tmp, paddress (gdbarch, addr));
@@ -5491,7 +5491,7 @@ ex:
return -1;
break;
}
- /* For KLMD, fallthru. */
+ /* For KLMD, fall through. */
default:
fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
(int)tmp, paddress (gdbarch, addr));
@@ -7253,7 +7253,7 @@ ex:
/* op3c */
if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
return -1;
- /* fallthru */
+ /* fall through */
case 0x0c: /* CSST */
/* op4 */
if (record_full_arch_list_add_mem (oaddr2, 4))
@@ -7268,7 +7268,7 @@ ex:
oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
if (record_full_arch_list_add_mem (oaddr3, 4))
return -1;
- /* fallthru */
+ /* fall through */
case 0x10: /* CSDST */
/* op6 */
if (target_read_memory (oaddr2 + 0x68, buf, 8))
@@ -7284,7 +7284,7 @@ ex:
oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
if (record_full_arch_list_add_mem (oaddr3, 4))
return -1;
- /* fallthru */
+ /* fall through */
case 0x04: /* CS */
CS:
/* op1c */
@@ -7309,7 +7309,7 @@ CS:
oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
if (record_full_arch_list_add_mem (oaddr3, 8))
return -1;
- /* fallthru */
+ /* fall through */
case 0x11: /* CSDSTG */
/* op6 */
if (target_read_memory (oaddr2 + 0x68, buf, 8))
@@ -7318,7 +7318,7 @@ CS:
oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
if (record_full_arch_list_add_mem (oaddr3, 8))
return -1;
- /* fallthru */
+ /* fall through */
case 0x0d: /* CSSTG */
CSSTG:
/* op4 */
@@ -7328,7 +7328,7 @@ CSSTG:
oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
if (record_full_arch_list_add_mem (oaddr3, 8))
return -1;
- /* fallthru */
+ /* fall through */
case 0x05: /* CSG */
/* op1c */
if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
@@ -7342,7 +7342,7 @@ CSSTG:
/* op3c */
if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
return -1;
- /* fallthru */
+ /* fall through */
case 0x0e: /* CSSTGR */
/* op4 */
if (record_full_arch_list_add_mem (oaddr2, 8))
@@ -7357,7 +7357,7 @@ CSSTG:
oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
if (record_full_arch_list_add_mem (oaddr3, 8))
return -1;
- /* fallthru */
+ /* fall through */
case 0x12: /* CSDSTGR */
/* op6 */
if (target_read_memory (oaddr2 + 0x68, buf, 8))
@@ -7373,7 +7373,7 @@ CSSTG:
oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
if (record_full_arch_list_add_mem (oaddr3, 8))
return -1;
- /* fallthru */
+ /* fall through */
case 0x06: /* CSGR */
CSGR:
/* op1c */
@@ -7398,7 +7398,7 @@ CSGR:
oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
if (record_full_arch_list_add_mem (oaddr3, 16))
return -1;
- /* fallthru */
+ /* fall through */
case 0x13: /* CSDSTX */
/* op6 */
if (target_read_memory (oaddr2 + 0x68, buf, 8))
@@ -7407,7 +7407,7 @@ CSGR:
oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
if (record_full_arch_list_add_mem (oaddr3, 16))
return -1;
- /* fallthru */
+ /* fall through */
case 0x0f: /* CSSTX */
CSSTX:
/* op4 */
@@ -7417,7 +7417,7 @@ CSSTX:
oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
if (record_full_arch_list_add_mem (oaddr3, 16))
return -1;
- /* fallthru */
+ /* fall through */
case 0x07: /* CSX */
/* op1c */
if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
diff --git a/gdb/ser-base.c b/gdb/ser-base.c
index c51be07..b958cdf 100644
--- a/gdb/ser-base.c
+++ b/gdb/ser-base.c
@@ -147,7 +147,7 @@ run_async_handler_and_reschedule (struct serial *scb)
/* FD_EVENT: This is scheduled when the input FIFO is empty (and there
is no pending error). As soon as data arrives, it is read into the
input FIFO and the client notified. The client should then drain
- the FIFO using readchar(). If the FIFO isn't immediatly emptied,
+ the FIFO using readchar(). If the FIFO isn't immediately emptied,
push_event() is used to nag the client until it is. */
static void
@@ -399,7 +399,7 @@ do_ser_base_readchar (struct serial *scb, int timeout)
pre-reads the input into that FIFO. Once that has been emptied,
further data is obtained by polling the input FD using the device
specific readchar() function. Note: reschedule() is called after
- every read. This is because there is no guarentee that the lower
+ every read. This is because there is no guarantee that the lower
level fd_event() poll_event() code (which also calls reschedule())
will be called. */
diff --git a/gdb/ser-go32.c b/gdb/ser-go32.c
index a9c3d91..82f1b27 100644
--- a/gdb/ser-go32.c
+++ b/gdb/ser-go32.c
@@ -655,7 +655,7 @@ dos_get_tty_state (struct serial *scb)
/* We've never heard about this port. We should fail this call,
unless they are asking about one of the 3 standard handles,
in which case we pretend the handle was open by us if it is
- connected to a terminal device. This is beacuse Unix
+ connected to a terminal device. This is because Unix
terminals use the serial interface, so GDB expects the
standard handles to go through here. */
if (scb->fd >= 3 || !isatty (scb->fd))
diff --git a/gdb/ser-mingw.c b/gdb/ser-mingw.c
index 96ebd0e..360ea0c 100644
--- a/gdb/ser-mingw.c
+++ b/gdb/ser-mingw.c
@@ -563,7 +563,7 @@ console_select_thread (void *arg)
if (event_index != WAIT_OBJECT_0 + 1)
{
- /* Wait must have failed; assume an error has occured, e.g.
+ /* Wait must have failed; assume an error has occurred, e.g.
the handle has been closed. */
SetEvent (state->except_event);
break;
@@ -1132,7 +1132,7 @@ net_windows_select_thread (void *arg)
if (event_index != WAIT_OBJECT_0 + 1)
{
- /* Some error has occured. Assume that this is an error
+ /* Some error has occurred. Assume that this is an error
condition. */
SetEvent (state->base.except_event);
break;
diff --git a/gdb/sh-tdep.c b/gdb/sh-tdep.c
index 01a2401..9d59248 100644
--- a/gdb/sh-tdep.c
+++ b/gdb/sh-tdep.c
@@ -914,7 +914,7 @@ sh_frame_align (struct gdbarch *ignore, CORE_ADDR sp)
not displace any of the other arguments passed in via registers R4
to R7. */
-/* Helper function to justify value in register according to endianess. */
+/* Helper function to justify value in register according to endianness. */
static const gdb_byte *
sh_justify_value_in_reg (struct gdbarch *gdbarch, struct value *val, int len)
{
@@ -944,7 +944,7 @@ sh_stack_allocsize (int nargs, struct value **args)
}
/* Helper functions for getting the float arguments right. Registers usage
- depends on the ABI and the endianess. The comments should enlighten how
+ depends on the ABI and the endianness. The comments should enlighten how
it's intended to work. */
/* This array stores which of the float arg registers are already in use. */
@@ -1047,7 +1047,7 @@ sh_treat_as_flt_p (struct type *type)
/* Otherwise non-struct types are not treated as float. */
if (TYPE_CODE (type) != TYPE_CODE_STRUCT)
return 0;
- /* Otherwise structs with more than one memeber are not treated as float. */
+ /* Otherwise structs with more than one member are not treated as float. */
if (TYPE_NFIELDS (type) != 1)
return 0;
/* Otherwise if the type of that member is float, the whole type is
@@ -1099,7 +1099,7 @@ sh_push_dummy_call_fpu (struct gdbarch *gdbarch,
/* Now load as many as possible of the first arguments into
registers, and push the rest onto the stack. There are 16 bytes
- in four registers available. Loop thru args from first to last. */
+ in four registers available. Loop through args from first to last. */
for (argnum = 0; argnum < nargs; argnum++)
{
type = value_type (args[argnum]);
@@ -1236,7 +1236,7 @@ sh_push_dummy_call_nofpu (struct gdbarch *gdbarch,
/* Now load as many as possible of the first arguments into
registers, and push the rest onto the stack. There are 16 bytes
- in four registers available. Loop thru args from first to last. */
+ in four registers available. Loop through args from first to last. */
for (argnum = 0; argnum < nargs; argnum++)
{
type = value_type (args[argnum]);
diff --git a/gdb/sh64-tdep.c b/gdb/sh64-tdep.c
index bd2d4f7..3cb9267 100644
--- a/gdb/sh64-tdep.c
+++ b/gdb/sh64-tdep.c
@@ -1094,7 +1094,7 @@ sh64_push_dummy_call (struct gdbarch *gdbarch,
/* Now load as many as possible of the first arguments into
registers, and push the rest onto the stack. There are 64 bytes
- in eight registers available. Loop thru args from first to last. */
+ in eight registers available. Loop through args from first to last. */
int_argreg = ARG0_REGNUM;
diff --git a/gdb/sol-thread.c b/gdb/sol-thread.c
index 85bf3ff..17f54d0 100644
--- a/gdb/sol-thread.c
+++ b/gdb/sol-thread.c
@@ -22,7 +22,7 @@
to provide access to the Solaris user-mode thread implementation.
Solaris threads are true user-mode threads, which are invoked via
- the thr_* and pthread_* (native and POSIX respectivly) interfaces.
+ the thr_* and pthread_* (native and POSIX respectively) interfaces.
These are mostly implemented in user-space, with all thread context
kept in various structures that live in the user's heap. These
should not be confused with lightweight processes (LWPs), which are
diff --git a/gdb/solib-svr4.c b/gdb/solib-svr4.c
index 0e18292..35deebd 100644
--- a/gdb/solib-svr4.c
+++ b/gdb/solib-svr4.c
@@ -436,13 +436,13 @@ get_svr4_info (void)
static int match_main (const char *);
/* Read program header TYPE from inferior memory. The header is found
- by scanning the OS auxillary vector.
+ by scanning the OS auxiliary vector.
If TYPE == -1, return the program headers instead of the contents of
one program header.
Return a pointer to allocated memory holding the program header contents,
- or NULL on failure. If sucessful, and unless P_SECT_SIZE is NULL, the
+ or NULL on failure. If successful, and unless P_SECT_SIZE is NULL, the
size of those contents is returned to P_SECT_SIZE. Likewise, the target
architecture size (32-bit or 64-bit) is returned to P_ARCH_SIZE and
the base address of the section is returned in BASE_ADDR. */
@@ -608,7 +608,7 @@ find_program_interpreter (void)
}
}
- /* If we didn't find it, use the target auxillary vector. */
+ /* If we didn't find it, use the target auxiliary vector. */
if (!buf)
buf = read_program_header (PT_INTERP, NULL, NULL, NULL);
@@ -719,7 +719,7 @@ scan_dyntag (const int desired_dyntag, bfd *abfd, CORE_ADDR *ptr,
}
/* Scan for DESIRED_DYNTAG in .dynamic section of the target's main executable,
- found by consulting the OS auxillary vector. If DESIRED_DYNTAG is found, 1
+ found by consulting the OS auxiliary vector. If DESIRED_DYNTAG is found, 1
is returned and the corresponding PTR is set. */
static int
@@ -2404,7 +2404,7 @@ enable_break (struct svr4_info *info, int from_tty)
}
/* If we were not able to find the base address of the loader
- from our so_list, then try using the AT_BASE auxilliary entry. */
+ from our so_list, then try using the AT_BASE auxiliary entry. */
if (!load_addr_found)
if (target_auxv_search (¤t_target, AT_BASE, &load_addr) > 0)
{
@@ -2622,7 +2622,7 @@ read_program_headers_from_bfd (bfd *abfd, int *phdrs_size)
whose e_type member in the ELF header is not ET_DYN. There may
be a time in the future when it is desirable to do relocations
on other types of files as well in which case this condition
- should either be removed or modified to accomodate the new file
+ should either be removed or modified to accommodate the new file
type. - Kevin, Nov 2000. ] */
static int
@@ -2663,8 +2663,8 @@ svr4_exec_displacement (CORE_ADDR *displacementp)
return 0;
}
- /* Verify that the auxilliary vector describes the same file as exec_bfd, by
- comparing their program headers. If the program headers in the auxilliary
+ /* Verify that the auxiliary vector describes the same file as exec_bfd, by
+ comparing their program headers. If the program headers in the auxiliary
vector do not match the program headers in the executable, then we are
looking at a different file than the one used by the kernel - for
instance, "gdb program" connected to "gdbserver :PORT ld.so program". */
@@ -3215,7 +3215,7 @@ svr4_have_link_map_offsets (void)
/* Most OS'es that have SVR4-style ELF dynamic libraries define a
`struct r_debug' and a `struct link_map' that are binary compatible
- with the origional SVR4 implementation. */
+ with the original SVR4 implementation. */
/* Fetch (and possibly build) an appropriate `struct link_map_offsets'
for an ILP32 SVR4 system. */
diff --git a/gdb/solib.c b/gdb/solib.c
index 29b25d5..1833967 100644
--- a/gdb/solib.c
+++ b/gdb/solib.c
@@ -147,7 +147,7 @@ show_solib_search_path (struct ui_file *file, int from_tty,
* If IS_SOLIB is non-zero:
* Look in inferior's $LD_LIBRARY_PATH.
*
- * The last check avoids doing this search when targetting remote
+ * The last check avoids doing this search when targeting remote
* machines since a sysroot will almost always be set.
*/
diff --git a/gdb/sparc-sol2-tdep.c b/gdb/sparc-sol2-tdep.c
index 36d48db..21860a9 100644
--- a/gdb/sparc-sol2-tdep.c
+++ b/gdb/sparc-sol2-tdep.c
@@ -239,7 +239,7 @@ sparc_sol2_static_transform_name (const char *name)
be incorrect in some places, at least for SPARC. The
globalization prefix is encoded into an N_OPT stab, with the form
"G=<prefix>". The globalization prefix always seems to start
- with a dollar sign '$'; a dot '.' is used as a seperator. So we
+ with a dollar sign '$'; a dot '.' is used as a separator. So we
simply strip everything up until the last dot. */
if (name[0] == '$')
diff --git a/gdb/sparc-tdep.c b/gdb/sparc-tdep.c
index ea2435e..27daf93 100644
--- a/gdb/sparc-tdep.c
+++ b/gdb/sparc-tdep.c
@@ -316,7 +316,7 @@ static const char *sparc32_register_names[] =
#define SPARC32_NUM_REGS ARRAY_SIZE (sparc32_register_names)
/* We provide the aliases %d0..%d30 for the floating registers as
- "psuedo" registers. */
+ "pseudo" registers. */
static const char *sparc32_pseudo_register_names[] =
{
@@ -669,7 +669,7 @@ sparc_alloc_frame_cache (void)
return cache;
}
-/* GCC generates several well-known sequences of instructions at the begining
+/* GCC generates several well-known sequences of instructions at the beginning
of each function prologue when compiling with -fstack-check. If one of
such sequences starts at START_PC, then return the address of the
instruction immediately past this sequence. Otherwise, return START_PC. */
diff --git a/gdb/sparc64-tdep.c b/gdb/sparc64-tdep.c
index 5e8f17d..43ec342 100644
--- a/gdb/sparc64-tdep.c
+++ b/gdb/sparc64-tdep.c
@@ -254,7 +254,7 @@ static const char *sparc64_register_names[] =
#define SPARC64_NUM_REGS ARRAY_SIZE (sparc64_register_names)
/* We provide the aliases %d0..%d62 and %q0..%q60 for the floating
- registers as "psuedo" registers. */
+ registers as "pseudo" registers. */
static const char *sparc64_pseudo_register_names[] =
{
@@ -630,7 +630,7 @@ sparc64_16_byte_align_p (struct type *type)
/* Store floating fields of element ELEMENT of an "parameter array"
that has type TYPE and is stored at BITPOS in VALBUF in the
- apropriate registers of REGCACHE. This function can be called
+ appropriate registers of REGCACHE. This function can be called
recursively and therefore handles floating types in addition to
structures. */
diff --git a/gdb/stabsread.c b/gdb/stabsread.c
index d72db14..9828849 100644
--- a/gdb/stabsread.c
+++ b/gdb/stabsread.c
@@ -2323,7 +2323,7 @@ read_member_functions (struct field_info *fip, char **pp, struct type *type,
if ((*pp)[0] == 'o' && (*pp)[1] == 'p' && is_cplus_marker ((*pp)[2]))
{
- /* This is a completely wierd case. In order to stuff in the
+ /* This is a completely weird case. In order to stuff in the
names that might contain colons (the usual name delimiter),
Mike Tiemann defined a different name format which is
signalled if the identifier is "op$". In that case, the
@@ -2459,7 +2459,7 @@ read_member_functions (struct field_info *fip, char **pp, struct type *type,
int nbits;
/* virtual member function, followed by index.
The sign bit is set to distinguish pointers-to-methods
- from virtual function indicies. Since the array is
+ from virtual function indices. Since the array is
in words, the quantity must be shifted left by 1
on 16 bit machine, and by 2 on 32 bit machine, forcing
the sign bit out, and usable as a valid index into
diff --git a/gdb/stabsread.h b/gdb/stabsread.h
index b938f26..55b50ba 100644
--- a/gdb/stabsread.h
+++ b/gdb/stabsread.h
@@ -31,7 +31,7 @@ struct objfile;
#endif
/* Hash table of global symbols whose values are not known yet.
- They are chained thru the SYMBOL_VALUE_CHAIN, since we don't
+ They are chained through the SYMBOL_VALUE_CHAIN, since we don't
have the correct data for that slot yet.
The use of the LOC_BLOCK code in this chain is nonstandard--
diff --git a/gdb/stack.c b/gdb/stack.c
index 9b4e356..5ce191a 100644
--- a/gdb/stack.c
+++ b/gdb/stack.c
@@ -218,7 +218,7 @@ print_frame_nameless_args (struct frame_info *frame, long start, int num,
read in.
Errors are printed as if they would be the parameter value. Use zeroed ARG
- iff it should not be printed accoring to user settings. */
+ iff it should not be printed according to user settings. */
static void
print_frame_arg (const struct frame_arg *arg)
diff --git a/gdb/stubs/ia64vms-stub.c b/gdb/stubs/ia64vms-stub.c
index 1655b9a..0bd3310 100644
--- a/gdb/stubs/ia64vms-stub.c
+++ b/gdb/stubs/ia64vms-stub.c
@@ -211,7 +211,7 @@ union ia64_ireg
/* Predicate registers: There are 64 of these 1-bit registers. We
define a single register which is used to communicate these values
to/from the target. We will somehow contrive to make it appear
- that IA64_PR0_REGNUM thru IA64_PR63_REGNUM hold the actual values. */
+ that IA64_PR0_REGNUM through IA64_PR63_REGNUM hold the actual values. */
#define IA64_PR_REGNUM 330
/* Instruction pointer: 64 bits wide. */
@@ -312,7 +312,7 @@ term_raw_write (const char *str, unsigned int len)
LIB$SIGNAL (status);
}
-/* Flush ther term buffer. */
+/* Flush the term buffer. */
static void
term_flush (void)
diff --git a/gdb/stubs/m32r-stub.c b/gdb/stubs/m32r-stub.c
index 4d54f72..d1d7667 100644
--- a/gdb/stubs/m32r-stub.c
+++ b/gdb/stubs/m32r-stub.c
@@ -409,7 +409,7 @@ handle_exception (int exceptionVector)
hex2mem (ptr, (unsigned char *) ®isters[regno], 4, 0);
/*
* Since we just changed a single CPU register, let's
- * make sure to keep the several stack pointers consistant.
+ * make sure to keep the several stack pointers consistent.
*/
stackmode = registers[PSW] & 0x80;
if (regno == R15) /* stack pointer changed */
@@ -975,7 +975,7 @@ isShortBranch (unsigned char *instr)
if (instr0 == 0x1E || instr0 == 0x1F) /* JL or JMP */
if ((instr[1] & 0xF0) == 0xC0)
- return 2; /* jump thru a register */
+ return 2; /* jump through a register */
if (instr0 == 0x7C || instr0 == 0x7D || /* BC, BNC, BL, BRA */
instr0 == 0x7E || instr0 == 0x7F)
@@ -1088,7 +1088,7 @@ branchDestination (unsigned char *instr, int branchCode)
case 1: /* RTE */
return registers[BPC] & ~3; /* pop BPC into PC */
case 2: /* JL or JMP */
- return registers[instr[1] & 0x0F] & ~3; /* jump thru a register */
+ return registers[instr[1] & 0x0F] & ~3; /* jump through a register */
case 3: /* BC, BNC, BL, BRA (short, 8-bit relative offset) */
return (((int) instr) & ~3) + ((char) instr[1] << 2);
case 4: /* BC, BNC, BL, BRA (long, 24-bit relative offset) */
@@ -1261,7 +1261,7 @@ struct PSWreg
/* Upon entry the value for LR to save has been pushed.
We unpush that so that the value for the stack pointer saved is correct.
Upon entry, all other registers are assumed to have not been modified
- since the interrupt/trap occured. */
+ since the interrupt/trap occurred. */
asm ("\n\
stash_registers:\n\
diff --git a/gdb/stubs/m68k-stub.c b/gdb/stubs/m68k-stub.c
index 4ef4069..41bb88d 100644
--- a/gdb/stubs/m68k-stub.c
+++ b/gdb/stubs/m68k-stub.c
@@ -486,7 +486,7 @@ _returnFromException (Frame * frame)
frame = lastFrame;
frame->frameSize = 4;
frame->format = 0;
- frame->fsaveHeader = -1; /* restore regs, but we dont have fsave info */
+ frame->fsaveHeader = -1; /* restore regs, but we don't have fsave info */
}
#if !defined (mc68020) && !defined (mc68332)
diff --git a/gdb/symfile.c b/gdb/symfile.c
index f524f56..1ac879b 100644
--- a/gdb/symfile.c
+++ b/gdb/symfile.c
@@ -373,7 +373,7 @@ init_objfile_sect_indices (struct objfile *objfile)
/* This is where things get really weird... We MUST have valid
indices for the various sect_index_* members or gdb will abort.
So if for example, there is no ".text" section, we have to
- accomodate that. First, check for a file with the standard
+ accommodate that. First, check for a file with the standard
one or two segments. */
symfile_find_segment_sections (objfile);
@@ -3112,7 +3112,7 @@ section_is_mapped (struct obj_section *osect)
if (osect->ovly_mapped == -1)
gdbarch_overlay_update (gdbarch, osect);
}
- /* fall thru to manual case */
+ /* fall through to manual case */
case ovly_on: /* overlay debugging manual */
return osect->ovly_mapped == 1;
}
diff --git a/gdb/symtab.c b/gdb/symtab.c
index 430bc8d..ada5116 100644
--- a/gdb/symtab.c
+++ b/gdb/symtab.c
@@ -485,7 +485,7 @@ iterate_over_symtabs (const char *name,
}
}
- /* Same search rules as above apply here, but now we look thru the
+ /* Same search rules as above apply here, but now we look through the
psymtabs. */
ALL_OBJFILES (objfile)
@@ -3508,7 +3508,7 @@ find_function_start_sal (struct symbol *sym, int funfirstline)
}
/* We always should have a line for the function start address.
- If we don't, something is odd. Create a plain SAL refering
+ If we don't, something is odd. Create a plain SAL referring
just the PC and hope that skip_prologue_sal (if requested)
can find a line number for after the prologue. */
if (sal.pc < BLOCK_START (SYMBOL_BLOCK_VALUE (sym)))
diff --git a/gdb/target.c b/gdb/target.c
index 246d292..6bb5536 100644
--- a/gdb/target.c
+++ b/gdb/target.c
@@ -151,7 +151,7 @@ static int show_memory_breakpoints = 0;
/* These globals control whether GDB attempts to perform these
operations; they are useful for targets that need to prevent
- inadvertant disruption, such as in non-stop mode. */
+ inadvertent disruption, such as in non-stop mode. */
int may_write_registers = 1;
@@ -1435,7 +1435,7 @@ target_xfer_partial (struct target_ops *ops,
If an error occurs, no guarantee is made about the contents of the data at
MYADDR. In particular, the caller should not depend upon partial reads
filling the buffer with good data. There is no way for the caller to know
- how much good data might have been transfered anyway. Callers that can
+ how much good data might have been transferred anyway. Callers that can
deal with partial reads should call target_read (which will retry until
it makes no progress, and then return how much was transferred). */
diff --git a/gdb/target.h b/gdb/target.h
index a54b3db..32a0af5 100644
--- a/gdb/target.h
+++ b/gdb/target.h
@@ -126,7 +126,7 @@ enum inferior_event_type
INF_EXEC_COMPLETE,
};
\f
-/* Target objects which can be transfered using target_read,
+/* Target objects which can be transferred using target_read,
target_write, et cetera. */
enum target_object
@@ -150,7 +150,7 @@ enum target_object
TARGET_OBJECT_CODE_MEMORY,
/* Kernel Unwind Table. See "ia64-tdep.c". */
TARGET_OBJECT_UNWIND_TABLE,
- /* Transfer auxilliary vector. */
+ /* Transfer auxiliary vector. */
TARGET_OBJECT_AUXV,
/* StackGhost cookie. See "sparc-tdep.c". */
TARGET_OBJECT_WCOOKIE,
@@ -171,7 +171,7 @@ enum target_object
/* Currently loaded libraries specific to AIX systems, in XML format. */
TARGET_OBJECT_LIBRARIES_AIX,
/* Get OS specific data. The ANNEX specifies the type (running
- processes, etc.). The data being transfered is expected to follow
+ processes, etc.). The data being transferred is expected to follow
the DTD specified in features/osdata.dtd. */
TARGET_OBJECT_OSDATA,
/* Extra signal info. Usually the contents of `siginfo_t' on unix
@@ -187,7 +187,7 @@ enum target_object
/* The HP-UX shared library linkage pointer. ANNEX should be a string
image of the code address whose linkage pointer we are looking for.
- The size of the data transfered is always 8 bytes (the size of an
+ The size of the data transferred is always 8 bytes (the size of an
address on ia64). */
TARGET_OBJECT_HPUX_SOLIB_GOT,
/* Traceframe info, in XML format. */
@@ -725,7 +725,7 @@ struct target_ops
transferring if desired. This is handled in target.c.
The interface does not support a "retry" mechanism. Instead it
- assumes that at least one byte will be transfered on each
+ assumes that at least one byte will be transferred on each
successful call.
NOTE: cagney/2003-10-17: The current interface can lead to
@@ -1460,7 +1460,7 @@ void target_flash_done (void);
/* Describes a request for a memory write operation. */
struct memory_write_request
{
- /* Begining address that must be written. */
+ /* Beginning address that must be written. */
ULONGEST begin;
/* Past-the-end address. */
ULONGEST end;
diff --git a/gdb/target/waitstatus.h b/gdb/target/waitstatus.h
index fdd798f..5dd5c72 100644
--- a/gdb/target/waitstatus.h
+++ b/gdb/target/waitstatus.h
@@ -76,7 +76,7 @@ enum target_waitkind
should be resuming the inferior. */
TARGET_WAITKIND_SPURIOUS,
- /* An event has occured, but we should wait again.
+ /* An event has occurred, but we should wait again.
Remote_async_wait() returns this when there is an event
on the inferior, but the rest of the world is not interested in
it. The inferior has not stopped, but has just sent some output
diff --git a/gdb/testsuite/gdb.base/d10vovly.c b/gdb/testsuite/gdb.base/d10vovly.c
index bdb90fe..e4f9ae3 100644
--- a/gdb/testsuite/gdb.base/d10vovly.c
+++ b/gdb/testsuite/gdb.base/d10vovly.c
@@ -203,8 +203,8 @@ ovly_copy (unsigned long dst, unsigned long src, long size)
while (size > 0)
{
- /* NB: Transfer 4 byte (long) quantites, problems occure
- when only two bytes are transfered */
+ /* NB: Transfer 4 byte (long) quantites, problems occur
+ when only two bytes are transferred */
DMAP = dmap_src;
tmp = *s;
DMAP = dmap_dst;
diff --git a/gdb/testsuite/gdb.base/m32rovly.c b/gdb/testsuite/gdb.base/m32rovly.c
index bdb90fe..e4f9ae3 100644
--- a/gdb/testsuite/gdb.base/m32rovly.c
+++ b/gdb/testsuite/gdb.base/m32rovly.c
@@ -203,8 +203,8 @@ ovly_copy (unsigned long dst, unsigned long src, long size)
while (size > 0)
{
- /* NB: Transfer 4 byte (long) quantites, problems occure
- when only two bytes are transfered */
+ /* NB: Transfer 4 byte (long) quantites, problems occur
+ when only two bytes are transferred */
DMAP = dmap_src;
tmp = *s;
DMAP = dmap_dst;
diff --git a/gdb/testsuite/gdb.base/ovlymgr.c b/gdb/testsuite/gdb.base/ovlymgr.c
index 533606b..1b84825 100644
--- a/gdb/testsuite/gdb.base/ovlymgr.c
+++ b/gdb/testsuite/gdb.base/ovlymgr.c
@@ -220,8 +220,8 @@ ovly_copy (unsigned long dst, unsigned long src, long size)
while (size > 0)
{
- /* NB: Transfer 4 byte (long) quantites, problems occure
- when only two bytes are transfered */
+ /* NB: Transfer 4 byte (long) quantites, problems occur
+ when only two bytes are transferred */
DMAP = dmap_src;
tmp = *s;
DMAP = dmap_dst;
diff --git a/gdb/testsuite/gdb.base/scope0.c b/gdb/testsuite/gdb.base/scope0.c
index e7f4724..d2e6149 100644
--- a/gdb/testsuite/gdb.base/scope0.c
+++ b/gdb/testsuite/gdb.base/scope0.c
@@ -111,7 +111,7 @@ autovars (int bcd, int abc)
int i96 = useit (96), i97 = useit (97), i98 = useit (98);
int i99 = useit (99);
- /* Use all 100 of the local variables to derail agressive optimizers. */
+ /* Use all 100 of the local variables to derail aggressive optimizers. */
useit ( i0); useit ( i1); useit ( i2); useit ( i3); useit ( i4);
useit ( i5); useit ( i6); useit ( i7); useit ( i8); useit ( i9);
diff --git a/gdb/testsuite/gdb.base/sigrepeat.c b/gdb/testsuite/gdb.base/sigrepeat.c
index 93a4196..4fc2116 100644
--- a/gdb/testsuite/gdb.base/sigrepeat.c
+++ b/gdb/testsuite/gdb.base/sigrepeat.c
@@ -59,7 +59,7 @@ handler (int sig)
while (1)
{
/* Wait until a signal has become pending, that way when this
- handler returns it will be immediatly delivered leading to
+ handler returns it will be immediately delivered leading to
back-to-back signals. */
sigset_t set;
sigemptyset (&set);
diff --git a/gdb/testsuite/lib/compiler.c b/gdb/testsuite/lib/compiler.c
index 408435d..f82d09f 100755
--- a/gdb/testsuite/lib/compiler.c
+++ b/gdb/testsuite/lib/compiler.c
@@ -45,7 +45,7 @@ set compiler_info [join {gcc __GNUC__ __GNUC_MINOR__ "unknown"} -]
#if defined (__xlc__)
/* IBM'x xlc compiler. NOTE: __xlc__ expands to a double quoted string of four
- numbers seperated by '.'s: currently "7.0.0.0" */
+ numbers separated by '.'s: currently "7.0.0.0" */
set need_a_set [regsub -all {\.} [join {xlc __xlc__} -] - compiler_info]
#endif
diff --git a/gdb/testsuite/lib/compiler.cc b/gdb/testsuite/lib/compiler.cc
index dbe2c6f..a844851 100755
--- a/gdb/testsuite/lib/compiler.cc
+++ b/gdb/testsuite/lib/compiler.cc
@@ -33,7 +33,7 @@ set compiler_info [join {gcc __GNUC__ __GNUC_MINOR__ "unknown"} -]
#if defined (__xlc__)
/* IBM'x xlc compiler. NOTE: __xlc__ expands to a double quoted string of four
- numbers seperated by '.'s: currently "7.0.0.0" */
+ numbers separated by '.'s: currently "7.0.0.0" */
set need_a_set [regsub -all {\.} [join {xlc __xlc__} -] - compiler_info]
#endif
diff --git a/gdb/thread.c b/gdb/thread.c
index 57b20ff..833f5fd 100644
--- a/gdb/thread.c
+++ b/gdb/thread.c
@@ -1735,8 +1735,8 @@ tp_array_compar (const void *ap_voidp, const void *bp_voidp)
}
/* Apply a GDB command to a list of threads. List syntax is a whitespace
- seperated list of numbers, or ranges, or the keyword `all'. Ranges consist
- of two numbers seperated by a hyphen. Examples:
+ separated list of numbers, or ranges, or the keyword `all'. Ranges consist
+ of two numbers separated by a hyphen. Examples:
thread apply 1 2 7 4 backtrace Apply backtrace cmd to threads 1,2,7,4
thread apply 2-7 9 p foo(1) Apply p foo(1) cmd to threads 2->7 & 9
diff --git a/gdb/tilegx-linux-nat.c b/gdb/tilegx-linux-nat.c
index 2bf8183..1cec72b 100644
--- a/gdb/tilegx-linux-nat.c
+++ b/gdb/tilegx-linux-nat.c
@@ -47,7 +47,7 @@
/* Mapping between the general-purpose registers in `struct user'
format and GDB's register array layout. Note that we map the
- first 56 registers (0 thru 55) one-to-one. GDB maps the pc to
+ first 56 registers (0 through 55) one-to-one. GDB maps the pc to
slot 64, but ptrace returns it in slot 56. */
static const int regmap[] =
{
@@ -62,7 +62,7 @@ static const int regmap[] =
56, 58
};
-/* Transfering the general-purpose registers between GDB, inferiors
+/* Transferring the general-purpose registers between GDB, inferiors
and core files. */
/* Fill GDB's register array with the general-purpose register values
@@ -95,7 +95,7 @@ fill_gregset (const struct regcache* regcache,
regcache_raw_collect (regcache, i, regp + regmap[i]);
}
-/* Transfering floating-point registers between GDB, inferiors and cores. */
+/* Transferring floating-point registers between GDB, inferiors and cores. */
/* Fill GDB's register array with the floating-point register values in
*FPREGSETP. */
diff --git a/gdb/tracepoint.c b/gdb/tracepoint.c
index 7435380..e7c2fc2 100644
--- a/gdb/tracepoint.c
+++ b/gdb/tracepoint.c
@@ -744,7 +744,7 @@ validate_actionline (const char *line, struct breakpoint *b)
p = strchr (p, ',');
continue;
}
- /* else fall thru, treat p as an expression and parse it! */
+ /* else fall through, treat p as an expression and parse it! */
}
tmp_p = p;
for (loc = t->base.loc; loc; loc = loc->next)
@@ -2234,7 +2234,7 @@ tfind_1 (enum trace_find_type type, int num,
if you're in a user-defined command or especially in a
loop, then you need a way to detect that the command
failed WITHOUT aborting. This allows you to write
- scripts that search thru the trace buffer until the end,
+ scripts that search through the trace buffer until the end,
and then continue on to do something else. */
if (from_tty)
diff --git a/gdb/tui/tui-file.c b/gdb/tui/tui-file.c
index 6cac1d3..00b937b 100644
--- a/gdb/tui/tui-file.c
+++ b/gdb/tui/tui-file.c
@@ -198,7 +198,7 @@ tui_file_get_strbuf (struct ui_file *file)
}
/* Adjust the length of the buffer by the amount necessary to
- accomodate appending a string of length N to the buffer
+ accommodate appending a string of length N to the buffer
contents. */
void
tui_file_adjust_strbuf (int n, struct ui_file *file)
diff --git a/gdb/tui/tui-win.c b/gdb/tui/tui-win.c
index ac4d911..0a4fb04 100644
--- a/gdb/tui/tui-win.c
+++ b/gdb/tui/tui-win.c
@@ -594,7 +594,7 @@ tui_scroll_forward (struct tui_win_info *win_to_scroll,
_num_to_scroll = win_to_scroll->generic.height - 3;
/* If we are scrolling the source or disassembly window, do a
- "psuedo" scroll since not all of the source is in memory,
+ "pseudo" scroll since not all of the source is in memory,
only what is in the viewport. If win_to_scroll is the
command window do nothing since the term should handle
it. */
@@ -619,7 +619,7 @@ tui_scroll_backward (struct tui_win_info *win_to_scroll,
_num_to_scroll = win_to_scroll->generic.height - 3;
/* If we are scrolling the source or disassembly window, do a
- "psuedo" scroll since not all of the source is in memory,
+ "pseudo" scroll since not all of the source is in memory,
only what is in the viewport. If win_to_scroll is the
command window do nothing since the term should handle
it. */
@@ -645,7 +645,7 @@ tui_scroll_left (struct tui_win_info *win_to_scroll,
_num_to_scroll = 1;
/* If we are scrolling the source or disassembly window, do a
- "psuedo" scroll since not all of the source is in memory,
+ "pseudo" scroll since not all of the source is in memory,
only what is in the viewport. If win_to_scroll is the command
window do nothing since the term should handle it. */
if (win_to_scroll == TUI_SRC_WIN
@@ -668,7 +668,7 @@ tui_scroll_right (struct tui_win_info *win_to_scroll,
_num_to_scroll = 1;
/* If we are scrolling the source or disassembly window, do a
- "psuedo" scroll since not all of the source is in memory,
+ "pseudo" scroll since not all of the source is in memory,
only what is in the viewport. If win_to_scroll is the command
window do nothing since the term should handle it. */
if (win_to_scroll == TUI_SRC_WIN
@@ -1311,7 +1311,7 @@ tui_adjust_win_heights (struct tui_win_info *primary_win_info,
second_win = (tui_source_windows ())->list[0];
}
if (primary_win_info == TUI_CMD_WIN)
- { /* Split the change in height accross the 1st & 2nd
+ { /* Split the change in height across the 1st & 2nd
windows, adjusting them as well. */
/* Subtract the locator. */
int first_split_diff = diff / 2;
@@ -1407,7 +1407,7 @@ tui_adjust_win_heights (struct tui_win_info *primary_win_info,
}
-/* Function make the target window (and auxillary windows associated
+/* Function make the target window (and auxiliary windows associated
with the targer) invisible, and set the new height and
location. */
static void
@@ -1426,7 +1426,7 @@ make_invisible_and_set_new_height (struct tui_win_info *win_info,
if (win_info != TUI_CMD_WIN)
win_info->generic.viewport_height--;
- /* Now deal with the auxillary windows associated with win_info. */
+ /* Now deal with the auxiliary windows associated with win_info. */
switch (win_info->generic.type)
{
case SRC_WIN:
diff --git a/gdb/tui/tui-wingeneral.c b/gdb/tui/tui-wingeneral.c
index 52abc3d..487781b 100644
--- a/gdb/tui/tui-wingeneral.c
+++ b/gdb/tui/tui-wingeneral.c
@@ -75,7 +75,7 @@ tui_delete_win (WINDOW *window)
}
-/* Draw a border arround the window. */
+/* Draw a border around the window. */
static void
box_win (struct tui_gen_win_info *win_info,
int highlight_flag)
diff --git a/gdb/tui/tui.h b/gdb/tui/tui.h
index 5d56df0..fc1c8ef 100644
--- a/gdb/tui/tui.h
+++ b/gdb/tui/tui.h
@@ -42,7 +42,7 @@ enum tui_win_type
CMD_WIN,
/* This must ALWAYS be AFTER the major windows last. */
MAX_MAJOR_WINDOWS,
- /* Auxillary windows. */
+ /* Auxiliary windows. */
LOCATOR_WIN,
EXEC_INFO_WIN,
DATA_ITEM_WIN,
diff --git a/gdb/utils.c b/gdb/utils.c
index 751f099..d10914b 100644
--- a/gdb/utils.c
+++ b/gdb/utils.c
@@ -3211,7 +3211,7 @@ make_cleanup_free_char_ptr_vec (VEC (char_ptr) *char_ptr_vec)
return make_cleanup (do_free_char_ptr_vec, char_ptr_vec);
}
-/* Substitute all occurences of string FROM by string TO in *STRINGP. *STRINGP
+/* Substitute all occurrences of string FROM by string TO in *STRINGP. *STRINGP
must come from xrealloc-compatible allocator and it may be updated. FROM
needs to be delimited by IS_DIR_SEPARATOR or DIRNAME_SEPARATOR (or be
located at the start or end of *STRINGP. */
diff --git a/gdb/v850-tdep.c b/gdb/v850-tdep.c
index d69ee32..fad1691 100644
--- a/gdb/v850-tdep.c
+++ b/gdb/v850-tdep.c
@@ -200,7 +200,7 @@ enum
E_R149_REGNUM,
E_NUM_OF_V850E2_REGS,
- /* v850e3v5 system registers, selID 1 thru 7. */
+ /* v850e3v5 system registers, selID 1 through 7. */
E_SELID_1_R0_REGNUM = E_NUM_OF_V850E2_REGS,
E_SELID_1_R31_REGNUM = E_SELID_1_R0_REGNUM + 31,
@@ -1044,7 +1044,7 @@ v850_push_dummy_call (struct gdbarch *gdbarch,
/* Now load as many as possible of the first arguments into
registers, and push the rest onto the stack. There are 16 bytes
- in four registers available. Loop thru args from first to last. */
+ in four registers available. Loop through args from first to last. */
for (argnum = 0; argnum < nargs; argnum++)
{
int len;
diff --git a/gdb/valops.c b/gdb/valops.c
index 8a45641..916eb1b 100644
--- a/gdb/valops.c
+++ b/gdb/valops.c
@@ -927,7 +927,7 @@ get_value_at (struct type *type, CORE_ADDR addr, int lazy)
/* Return a value with type TYPE located at ADDR.
Call value_at only if the data needs to be fetched immediately;
- if we can be 'lazy' and defer the fetch, perhaps indefinately, call
+ if we can be 'lazy' and defer the fetch, perhaps indefinitely, call
value_at_lazy instead. value_at_lazy simply records the address of
the data and sets the lazy-evaluation-required flag. The lazy flag
is tested in the value_contents macro, which is used if and when
@@ -1266,7 +1266,7 @@ value_assign (struct value *toval, struct value *fromval)
/* We copy over the enclosing type and pointed-to offset from FROMVAL
in the case of pointer types. For object types, the enclosing type
- and embedded offset must *not* be copied: the target object refered
+ and embedded offset must *not* be copied: the target object referred
to by TOVAL retains its original dynamic type after assignment. */
if (TYPE_CODE (type) == TYPE_CODE_PTR)
{
@@ -1413,7 +1413,7 @@ value_coerce_to_target (struct value *val)
nonzero lower bound.
FIXME: A previous comment here indicated that this routine should
- be substracting the array's lower bound. It's not clear to me that
+ be subtracting the array's lower bound. It's not clear to me that
this is correct. Given an array subscripting operation, it would
certainly work to do the adjustment here, essentially computing:
diff --git a/gdb/windows-nat.c b/gdb/windows-nat.c
index 5b79f34..7339a9c 100644
--- a/gdb/windows-nat.c
+++ b/gdb/windows-nat.c
@@ -144,7 +144,7 @@ static GetConsoleFontSize_ftype *GetConsoleFontSize;
static int have_saved_context; /* True if we've saved context from a
cygwin signal. */
-static CONTEXT saved_context; /* Containes the saved context from a
+static CONTEXT saved_context; /* Contains the saved context from a
cygwin signal. */
/* If we're not using the old Cygwin header file set, define the
diff --git a/gdb/xtensa-tdep.c b/gdb/xtensa-tdep.c
index e47c90a..469b9f1 100644
--- a/gdb/xtensa-tdep.c
+++ b/gdb/xtensa-tdep.c
@@ -575,7 +575,7 @@ xtensa_pseudo_register_read (struct gdbarch *gdbarch,
if (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch))
return regcache_raw_read (regcache, regnum, buffer);
- /* We have to find out how to deal with priveleged registers.
+ /* We have to find out how to deal with privileged registers.
Let's treat them as pseudo-registers, but we cannot read/write them. */
else if (regnum < gdbarch_tdep (gdbarch)->a0_base)
@@ -668,7 +668,7 @@ xtensa_pseudo_register_write (struct gdbarch *gdbarch,
if (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch))
regcache_raw_write (regcache, regnum, buffer);
- /* We have to find out how to deal with priveleged registers.
+ /* We have to find out how to deal with privileged registers.
Let's treat them as pseudo-registers, but we cannot read/write them. */
else if (regnum < gdbarch_tdep (gdbarch)->a0_base)
@@ -3162,7 +3162,7 @@ xtensa_derive_tdep (struct gdbarch_tdep *tdep)
max_size = rmap->byte_size;
if (rmap->mask != 0 && tdep->num_regs == 0)
tdep->num_regs = n;
- /* Find out out how to deal with priveleged registers.
+ /* Find out out how to deal with privileged registers.
if ((rmap->flags & XTENSA_REGISTER_FLAGS_PRIVILEGED) != 0
&& tdep->num_nopriv_regs == 0)
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 06/23] Fix spelling mistakes in comments in makefiles
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
` (6 preceding siblings ...)
2016-11-20 17:39 ` [PATCH 05/23] Fix spelling mistakes in comments in configure scripts Ambrogino Modigliani
@ 2016-11-20 17:39 ` Ambrogino Modigliani
2016-11-20 17:40 ` [PATCH 09/23] Fix spelling mistakes in comments in Assembler files Ambrogino Modigliani
` (14 subsequent siblings)
22 siblings, 0 replies; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:39 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
gas/ChangeLog:
* gas/Makefile.am: Fix spelling in comments.
* gas/Makefile.in: Fix spelling in comments.
gdb/ChangeLog:
* gdb/Makefile.in: Fix spelling in comments.
readline/ChangeLog:
* readline/examples/rlfe/Makefile.in: Fix spelling in comments.
sim/mips/ChangeLog:
* sim/mips/Makefile.in: Fix spelling in comments.
---
gas/Makefile.am | 2 +-
gas/Makefile.in | 2 +-
gdb/Makefile.in | 6 +++---
readline/examples/rlfe/Makefile.in | 2 +-
sim/mips/Makefile.in | 2 +-
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/gas/Makefile.am b/gas/Makefile.am
index cdaf9f5..d4b833f 100644
--- a/gas/Makefile.am
+++ b/gas/Makefile.am
@@ -52,7 +52,7 @@ TARG_ENV_H = $(srcdir)/config/te-@te_file@.h
ATOF_TARG_C = $(srcdir)/config/atof-@atof@.c
ATOF_TARG_O = atof-@atof@.@OBJEXT@
-# use @target_cpu_type@ for refering to configured target name
+# use @target_cpu_type@ for referring to configured target name
IT_HDRS=itbl-parse.h $(srcdir)/itbl-ops.h
IT_SRCS=itbl-parse.c itbl-lex-wrapper.c $(srcdir)/itbl-ops.c
IT_DEPS=$(srcdir)/itbl-parse.y $(srcdir)/itbl-lex.l $(srcdir)/config/itbl-@target_cpu_type@.h
diff --git a/gas/Makefile.in b/gas/Makefile.in
index 84f746d..c9231dc 100644
--- a/gas/Makefile.in
+++ b/gas/Makefile.in
@@ -350,7 +350,7 @@ TARG_ENV_H = $(srcdir)/config/te-@te_file@.h
ATOF_TARG_C = $(srcdir)/config/atof-@atof@.c
ATOF_TARG_O = atof-@atof@.@OBJEXT@
-# use @target_cpu_type@ for refering to configured target name
+# use @target_cpu_type@ for referring to configured target name
IT_HDRS = itbl-parse.h $(srcdir)/itbl-ops.h
IT_SRCS = itbl-parse.c itbl-lex-wrapper.c $(srcdir)/itbl-ops.c
IT_DEPS = $(srcdir)/itbl-parse.y $(srcdir)/itbl-lex.l $(srcdir)/config/itbl-@target_cpu_type@.h
diff --git a/gdb/Makefile.in b/gdb/Makefile.in
index b68cf58..e94d450 100644
--- a/gdb/Makefile.in
+++ b/gdb/Makefile.in
@@ -1372,7 +1372,7 @@ test-cp-name-parser$(EXEEXT): test-cp-name-parser.o $(LIBIBERTY)
# FIXME: cagney/2002-06-09: gdb/564: gdb/563: Force the order so that
# the first call is to _initialize_gdbtypes (implemented by explicitly
# putting that function's name first in the init.l-tmp file). This is
-# a hack to ensure that all the architecture dependant global
+# a hack to ensure that all the architecture dependent global
# builtin_type_* variables are initialized before anything else
# (per-architecture code is called in the same order that it is
# registered). The ``correct fix'' is to have all the builtin types
@@ -1825,7 +1825,7 @@ ALLDEPFILES = \
# errors. It turns out that that is the least of monitor.c's
# problems. The function print_vsprintf appears to be using
# va_arg(long) to extract CORE_ADDR parameters - something that
-# definitly will not work. "monitor.c" needs to be rewritten so that
+# definitely will not work. "monitor.c" needs to be rewritten so that
# it doesn't use format strings and instead uses callbacks.
monitor.o: $(srcdir)/monitor.c
$(COMPILE.pre) $(INTERNAL_CFLAGS) $(GDB_WARN_CFLAGS_NO_FORMAT) \
@@ -1914,7 +1914,7 @@ clean-po:
# rule has no dependencies and always regenerates gdb.pot. This is
# relatively harmless since the .po files do not directly depend on
# it. The .pot file is left in the build directory. Since GDB's
-# Makefile lacks a cannonical list of sources (missing xm, tm and nm
+# Makefile lacks a canonical list of sources (missing xm, tm and nm
# files) force this rule.
$(PACKAGE).pot: po/$(PACKAGE).pot
po/$(PACKAGE).pot: force
diff --git a/readline/examples/rlfe/Makefile.in b/readline/examples/rlfe/Makefile.in
index 7d6fd53..f60c504 100644
--- a/readline/examples/rlfe/Makefile.in
+++ b/readline/examples/rlfe/Makefile.in
@@ -1,7 +1,7 @@
#
# Makefile template for rlfe
#
-# See machine dependant config.h for more configuration options.
+# See machine dependent config.h for more configuration options.
#
srcdir = @srcdir@
diff --git a/sim/mips/Makefile.in b/sim/mips/Makefile.in
index 7f1c916..9bb272a 100644
--- a/sim/mips/Makefile.in
+++ b/sim/mips/Makefile.in
@@ -119,7 +119,7 @@ IGEN_INCLUDE=\
$(srcdir)/mips3264r2.igen \
# NB: Since these can be built by a number of generators, care
-# must be taken to ensure that they are only dependant on
+# must be taken to ensure that they are only dependent on
# one of those generators.
BUILT_SRC_FROM_GEN = \
itable.h \
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 08/23] Fix spelling mistakes in comments in Ada source files
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
2016-11-20 17:38 ` [PATCH 01/23] Fix spelling mistakes in comments in C source files (bfd) Ambrogino Modigliani
@ 2016-11-20 17:39 ` Ambrogino Modigliani
2016-11-22 16:08 ` Pedro Alves
2016-11-20 17:39 ` [PATCH 02/23] Fix spelling mistakes in comments in C source files (gdb) Ambrogino Modigliani
` (20 subsequent siblings)
22 siblings, 1 reply; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:39 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
zlib/ChangeLog:
* zlib/contrib/ada/zlib-streams.ads: Fix spelling in comments.
* zlib/contrib/ada/zlib-thin.ads: Fix spelling in comments.
* zlib/contrib/ada/zlib.ads: Fix spelling in comments.
---
zlib/contrib/ada/zlib-streams.ads | 6 +++---
zlib/contrib/ada/zlib-thin.ads | 2 +-
zlib/contrib/ada/zlib.ads | 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/zlib/contrib/ada/zlib-streams.ads b/zlib/contrib/ada/zlib-streams.ads
index f0193c6..8e26cd4 100644
--- a/zlib/contrib/ada/zlib-streams.ads
+++ b/zlib/contrib/ada/zlib-streams.ads
@@ -31,7 +31,7 @@ package ZLib.Streams is
Mode : in Flush_Mode := Sync_Flush);
-- Flush the written data to the back stream,
-- all data placed to the compressor is flushing to the Back stream.
- -- Should not be used untill necessary, becouse it is decreasing
+ -- Should not be used until necessary, because it is decreasing
-- compression.
function Read_Total_In (Stream : in Stream_Type) return Count;
@@ -97,13 +97,13 @@ private
Rest_Last : Stream_Element_Offset;
-- Buffer for Read operation.
-- We need to have this buffer in the record
- -- becouse not all read data from back stream
+ -- because not all read data from back stream
-- could be processed during the read operation.
Buffer_Size : Stream_Element_Offset;
-- Buffer size for write operation.
-- We do not need to have this buffer
- -- in the record becouse all data could be
+ -- in the record because all data could be
-- processed in the write operation.
Back : Stream_Access;
diff --git a/zlib/contrib/ada/zlib-thin.ads b/zlib/contrib/ada/zlib-thin.ads
index d4407eb..810173c 100644
--- a/zlib/contrib/ada/zlib-thin.ads
+++ b/zlib/contrib/ada/zlib-thin.ads
@@ -436,7 +436,7 @@ private
pragma Import (C, inflateBackInit, "inflateBackInit_");
- -- I stopped binding the inflateBack routines, becouse realize that
+ -- I stopped binding the inflateBack routines, because realize that
-- it does not support zlib and gzip headers for now, and have no
-- symmetric deflateBack routines.
-- ZLib-Ada is symmetric regarding deflate/inflate data transformation
diff --git a/zlib/contrib/ada/zlib.ads b/zlib/contrib/ada/zlib.ads
index 79ffc40..29af826 100644
--- a/zlib/contrib/ada/zlib.ads
+++ b/zlib/contrib/ada/zlib.ads
@@ -260,7 +260,7 @@ package ZLib is
(Item : out Ada.Streams.Stream_Element_Array;
Last : out Ada.Streams.Stream_Element_Offset);
-- User should provide data for compression/decompression
- -- thru this routine.
+ -- through this routine.
Buffer : in out Ada.Streams.Stream_Element_Array;
-- Buffer for keep remaining data from the previous
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 09/23] Fix spelling mistakes in comments in Assembler files
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
` (7 preceding siblings ...)
2016-11-20 17:39 ` [PATCH 06/23] Fix spelling mistakes in comments in makefiles Ambrogino Modigliani
@ 2016-11-20 17:40 ` Ambrogino Modigliani
2016-11-22 16:10 ` Pedro Alves
2016-11-20 17:41 ` [PATCH 17/23] Fix spelling mistakes in comments in .inc files Ambrogino Modigliani
` (13 subsequent siblings)
22 siblings, 1 reply; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:40 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
gas/testsuite/ChangeLog:
* gas/testsuite/gas/arm/local_function.d: Fix spelling in
comments.
* gas/testsuite/gas/arm/req.s: Fix spelling in comments.
* gas/testsuite/gas/arm/vfp1.s: Fix spelling in comments.
* gas/testsuite/gas/arm/vfp1_t2.s: Fix spelling in comments.
* gas/testsuite/gas/arm/vfp1xD.s: Fix spelling in comments.
* gas/testsuite/gas/arm/vfp1xD_t2.s: Fix spelling in comments.
* gas/testsuite/gas/mcore/allinsn.s: Fix spelling in comments.
* gas/testsuite/gas/mips/24k-triple-stores-5.s: Fix spelling in
comments.
* gas/testsuite/gas/mips/delay.d: Fix spelling in comments.
* gas/testsuite/gas/mips/nodelay.d: Fix spelling in comments.
* gas/testsuite/gas/mips/r5900-full.s: Fix spelling in comments.
* gas/testsuite/gas/mips/r5900.s: Fix spelling in comments.
* gdb/testsuite/gdb.dwarf2/fission-reread.S: Fix spelling in
comments.
* gdb/testsuite/gdb.dwarf2/pr13961.S: Fix spelling in comments.
ld/testsuite/ChangeLog:
* ld/testsuite/ld-arm/stm32l4xx-fix-all.s: Fix spelling in
comments.
* ld/testsuite/ld-arm/thumb2-b-interwork.s: Fix spelling in
comments.
* ld/testsuite/ld-arm/thumb2-bl.s: Fix spelling in comments.
* ld/testsuite/ld-s390/tlspic1.s: Fix spelling in comments.
* ld/testsuite/ld-s390/tlspic1_64.s: Fix spelling in comments.
* ld/testsuite/ld-scripts/section-match-1.d: Fix spelling in
comments.
sim/testsuite/ChangeLog:
* sim/testsuite/d10v-elf/t-macros.i: Fix spelling in comments.
* sim/testsuite/sim/bfin/divq.s: Fix spelling in comments.
* sim/testsuite/sim/bfin/se_illegalcombination.S: Fix spelling in
comments.
* sim/testsuite/sim/bfin/se_undefinedinstruction1.S: Fix spelling
in comments.
* sim/testsuite/sim/bfin/se_undefinedinstruction2.S: Fix spelling
in comments.
* sim/testsuite/sim/fr30/addsp.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/bc.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/beq.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/bge.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/bgt.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/bhi.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/ble.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/bls.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/blt.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/bn.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/bnc.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/bne.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/bno.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/bnv.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/bp.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/bra.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/bv.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/copld.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/copop.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/copst.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/copsv.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/enter.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/extsb.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/extsh.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/extub.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/extuh.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/ldres.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/leave.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/nop.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/stres.cgs: Fix spelling in comments.
* sim/testsuite/sim/fr30/xchb.cgs: Fix spelling in comments.
* sim/testsuite/sim/h8300/ldc.s: Fix spelling in comments.
* sim/testsuite/sim/h8300/stc.s: Fix spelling in comments.
* sim/testsuite/sim/mips/hilo-hazard-3.s: Fix spelling in comments.
* sim/testsuite/sim/mips/hilo-hazard-4.s: Fix spelling in comments.
* sim/testsuite/sim/sh/fipr.s: Fix spelling in comments.
zlib`/ChangeLog:
* zlib/contrib/inflate86/inffast.S: Fix spelling in comments.
---
gas/testsuite/gas/arm/local_function.d | 2 +-
gas/testsuite/gas/arm/req.s | 2 +-
gas/testsuite/gas/arm/vfp1.s | 2 +-
gas/testsuite/gas/arm/vfp1_t2.s | 2 +-
gas/testsuite/gas/arm/vfp1xD.s | 2 +-
gas/testsuite/gas/arm/vfp1xD_t2.s | 2 +-
gas/testsuite/gas/mcore/allinsn.s | 4 +-
gas/testsuite/gas/mips/24k-triple-stores-5.s | 2 +-
gas/testsuite/gas/mips/delay.d | 2 +-
gas/testsuite/gas/mips/nodelay.d | 2 +-
gas/testsuite/gas/mips/r5900-full.s | 2 +-
gas/testsuite/gas/mips/r5900.s | 2 +-
gdb/testsuite/gdb.dwarf2/fission-reread.S | 2 +-
gdb/testsuite/gdb.dwarf2/pr13961.S | 4 +-
ld/testsuite/ld-arm/stm32l4xx-fix-all.s | 4 +-
ld/testsuite/ld-arm/thumb2-b-interwork.s | 2 +-
ld/testsuite/ld-arm/thumb2-bl.s | 2 +-
ld/testsuite/ld-s390/tlspic1.s | 4 +-
ld/testsuite/ld-s390/tlspic1_64.s | 4 +-
ld/testsuite/ld-scripts/section-match-1.d | 2 +-
sim/testsuite/d10v-elf/t-macros.i | 2 +-
sim/testsuite/sim/bfin/divq.s | 2 +-
sim/testsuite/sim/bfin/se_illegalcombination.S | 2 +-
sim/testsuite/sim/bfin/se_undefinedinstruction1.S | 2 +-
sim/testsuite/sim/bfin/se_undefinedinstruction2.S | 4 +-
sim/testsuite/sim/fr30/addsp.cgs | 6 +--
sim/testsuite/sim/fr30/bc.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/beq.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bge.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bgt.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bhi.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/ble.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bls.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/blt.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bn.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bnc.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bne.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bno.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bnv.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bp.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bra.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bv.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/copld.cgs | 4 +-
sim/testsuite/sim/fr30/copop.cgs | 4 +-
sim/testsuite/sim/fr30/copst.cgs | 4 +-
sim/testsuite/sim/fr30/copsv.cgs | 4 +-
sim/testsuite/sim/fr30/enter.cgs | 4 +-
sim/testsuite/sim/fr30/extsb.cgs | 8 +--
sim/testsuite/sim/fr30/extsh.cgs | 12 ++---
sim/testsuite/sim/fr30/extub.cgs | 10 ++--
sim/testsuite/sim/fr30/extuh.cgs | 14 ++---
sim/testsuite/sim/fr30/ldres.cgs | 4 +-
sim/testsuite/sim/fr30/leave.cgs | 2 +-
sim/testsuite/sim/fr30/nop.cgs | 2 +-
sim/testsuite/sim/fr30/stres.cgs | 4 +-
sim/testsuite/sim/fr30/xchb.cgs | 2 +-
sim/testsuite/sim/h8300/ldc.s | 4 +-
sim/testsuite/sim/h8300/stc.s | 4 +-
sim/testsuite/sim/mips/hilo-hazard-3.s | 2 +-
sim/testsuite/sim/mips/hilo-hazard-4.s | 2 +-
sim/testsuite/sim/sh/fipr.s | 2 +-
zlib/contrib/inflate86/inffast.S | 2 +-
62 files changed, 593 insertions(+), 593 deletions(-)
diff --git a/gas/testsuite/gas/arm/local_function.d b/gas/testsuite/gas/arm/local_function.d
index 2532f73..6d227d5 100644
--- a/gas/testsuite/gas/arm/local_function.d
+++ b/gas/testsuite/gas/arm/local_function.d
@@ -1,5 +1,5 @@
#objdump: -r
-#name: Relocations agains local function symbols
+#name: Relocations against local function symbols
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-vxworks
diff --git a/gas/testsuite/gas/arm/req.s b/gas/testsuite/gas/arm/req.s
index 1330e75..4399aee 100644
--- a/gas/testsuite/gas/arm/req.s
+++ b/gas/testsuite/gas/arm/req.s
@@ -37,5 +37,5 @@ test_dot_req_and_unreq:
add FOO, FOO, FOO
# Check that a second attempt to alias foo, using a mixed case
- # verison of the name, will fail.
+ # version of the name, will fail.
Foo .req r2
diff --git a/gas/testsuite/gas/arm/vfp1.s b/gas/testsuite/gas/arm/vfp1.s
index 1a80877..ff8a5fb 100644
--- a/gas/testsuite/gas/arm/vfp1.s
+++ b/gas/testsuite/gas/arm/vfp1.s
@@ -3,7 +3,7 @@
.global F
F:
@ First we test the basic syntax and bit patterns of the opcodes.
- @ Most of these tests deliberatly use d0/r0 to avoid setting
+ @ Most of these tests deliberately use d0/r0 to avoid setting
@ any more bits than necessary.
@ Comparison operations
diff --git a/gas/testsuite/gas/arm/vfp1_t2.s b/gas/testsuite/gas/arm/vfp1_t2.s
index dd596cb..763a34d 100644
--- a/gas/testsuite/gas/arm/vfp1_t2.s
+++ b/gas/testsuite/gas/arm/vfp1_t2.s
@@ -6,7 +6,7 @@
.global F
F:
@ First we test the basic syntax and bit patterns of the opcodes.
- @ Most of these tests deliberatly use d0/r0 to avoid setting
+ @ Most of these tests deliberately use d0/r0 to avoid setting
@ any more bits than necessary.
@ Comparison operations
diff --git a/gas/testsuite/gas/arm/vfp1xD.s b/gas/testsuite/gas/arm/vfp1xD.s
index 0e603e9..a760c9b 100644
--- a/gas/testsuite/gas/arm/vfp1xD.s
+++ b/gas/testsuite/gas/arm/vfp1xD.s
@@ -3,7 +3,7 @@
.global F
F:
@ First we test the basic syntax and bit patterns of the opcodes.
- @ Most of these tests deliberatly use s0/r0 to avoid setting
+ @ Most of these tests deliberately use s0/r0 to avoid setting
@ any more bits than necessary.
@ Comparison operations
diff --git a/gas/testsuite/gas/arm/vfp1xD_t2.s b/gas/testsuite/gas/arm/vfp1xD_t2.s
index 8e962c0..8372762 100644
--- a/gas/testsuite/gas/arm/vfp1xD_t2.s
+++ b/gas/testsuite/gas/arm/vfp1xD_t2.s
@@ -6,7 +6,7 @@
.global F
F:
@ First we test the basic syntax and bit patterns of the opcodes.
- @ Most of these tests deliberatly use s0/r0 to avoid setting
+ @ Most of these tests deliberately use s0/r0 to avoid setting
@ any more bits than necessary.
@ Comparison operations
diff --git a/gas/testsuite/gas/mcore/allinsn.s b/gas/testsuite/gas/mcore/allinsn.s
index e9196e7..7f21e51 100644
--- a/gas/testsuite/gas/mcore/allinsn.s
+++ b/gas/testsuite/gas/mcore/allinsn.s
@@ -13,14 +13,14 @@ footext:
test addc "r1,r2" // A double forward slash starts a line comment
test addi "r3, 1" # So does a hash
test addu "r4, r5" // White space between operands should be ignored
- test and "r6,r7" ; test andi "r8,2" // A semicolon seperates statements
+ test and "r6,r7" ; test andi "r8,2" // A semicolon separates statements
test andn "r9, r10"
test asr "r11, R12" // Uppercase R is allowed as a register prefix
test asrc "r13"
test asri "r14,0x1f"
test bclri "r15,0"
test bf footext
- test bgeni "sp, 7" // r0 can also be refered to as 'sp'
+ test bgeni "sp, 7" // r0 can also be referred to as 'sp'
test BGENI "r0, 8" // Officially upper case or mixed case
test BGENi "r0, 31" // mnemonics should not be allowed, but we relax this...
test bgenr "r1, r2"
diff --git a/gas/testsuite/gas/mips/24k-triple-stores-5.s b/gas/testsuite/gas/mips/24k-triple-stores-5.s
index eb0e92e..a5823ee 100644
--- a/gas/testsuite/gas/mips/24k-triple-stores-5.s
+++ b/gas/testsuite/gas/mips/24k-triple-stores-5.s
@@ -1,4 +1,4 @@
-# Mix byte/half/word sizes with arbitary base register.
+# Mix byte/half/word sizes with arbitrary base register.
foo:
# safe
diff --git a/gas/testsuite/gas/mips/delay.d b/gas/testsuite/gas/mips/delay.d
index 0c3ef08..63d7728 100644
--- a/gas/testsuite/gas/mips/delay.d
+++ b/gas/testsuite/gas/mips/delay.d
@@ -5,7 +5,7 @@
#
# Gas should produce nop's after mtc1 and related
# insn's if the target fpr is used in the
-# immediatly following insn. See also nodelay.d.
+# immediately following insn. See also nodelay.d.
#
.*: +file format .*mips.*
diff --git a/gas/testsuite/gas/mips/nodelay.d b/gas/testsuite/gas/mips/nodelay.d
index 10101f0..2b1ed5d 100644
--- a/gas/testsuite/gas/mips/nodelay.d
+++ b/gas/testsuite/gas/mips/nodelay.d
@@ -5,7 +5,7 @@
# For -mips4
# Gas should *not* produce nop's after mtc1 and related
-# insn's if the target fpr is used in the immediatly
+# insn's if the target fpr is used in the immediately
# following insn. See also delay.d.
#
diff --git a/gas/testsuite/gas/mips/r5900-full.s b/gas/testsuite/gas/mips/r5900-full.s
index 9560dc7..a5ca89d 100644
--- a/gas/testsuite/gas/mips/r5900-full.s
+++ b/gas/testsuite/gas/mips/r5900-full.s
@@ -48,7 +48,7 @@ stuff:
# The cvt.w.s instruction of the R5900 does the same as trunc.w.s in MIPS I.
# The cvt.w.s instruction of MIPS I doesn't exist in the R5900 CPU.
- # For compatibilty the instruction trunc.w.s uses the opcode of cvt.w.s.
+ # For compatibility the instruction trunc.w.s uses the opcode of cvt.w.s.
# cvt.w.s should not be used on R5900.
trunc.w.s $f0, $f31
trunc.w.s $f31, $f0
diff --git a/gas/testsuite/gas/mips/r5900.s b/gas/testsuite/gas/mips/r5900.s
index 022c4ab..3a16e28 100644
--- a/gas/testsuite/gas/mips/r5900.s
+++ b/gas/testsuite/gas/mips/r5900.s
@@ -44,7 +44,7 @@ stuff:
# The cvt.w.s instruction of the R5900 does the same as trunc.w.s in MIPS I.
# The cvt.w.s instruction of MIPS I doesn't exist in the R5900 CPU.
- # For compatibilty the instruction trunc.w.s uses the opcode of cvt.w.s.
+ # For compatibility the instruction trunc.w.s uses the opcode of cvt.w.s.
# cvt.w.s should not be used on R5900.
trunc.w.s $f0, $f31
trunc.w.s $f31, $f0
diff --git a/gdb/testsuite/gdb.dwarf2/fission-reread.S b/gdb/testsuite/gdb.dwarf2/fission-reread.S
index dc5885f..b00adb2 100644
--- a/gdb/testsuite/gdb.dwarf2/fission-reread.S
+++ b/gdb/testsuite/gdb.dwarf2/fission-reread.S
@@ -97,7 +97,7 @@ SYMBOL(main):
.byte 0x87
.4byte .Lskeleton_debug_line0 /* DW_AT_stmt_list */
- /* Manually inserted to have a DW_AT_specification refering to
+ /* Manually inserted to have a DW_AT_specification referring to
something and appearing ahead of it. */
.uleb128 0x8 /* DW_TAG_class_type */
.4byte .Ltu_class_type - .Ltu_start_dwo
diff --git a/gdb/testsuite/gdb.dwarf2/pr13961.S b/gdb/testsuite/gdb.dwarf2/pr13961.S
index afec8f8..1859a26 100644
--- a/gdb/testsuite/gdb.dwarf2/pr13961.S
+++ b/gdb/testsuite/gdb.dwarf2/pr13961.S
@@ -101,7 +101,7 @@ SYMBOL(main):
.byte 0x87
.4byte .Ldebug_line0 /* DW_AT_stmt_list */
- /* Manually inserted to have a DW_AT_specification refering to
+ /* Manually inserted to have a DW_AT_specification referring to
something and appearing ahead of it. */
.uleb128 0x8 /* DW_TAG_class_type */
.4byte .Ltu_class_type - .Ldebug_types0
@@ -178,7 +178,7 @@ SYMBOL(main):
.byte 0x3 /* DW_OP_addr */
.4byte baz
- /* Manually inserted to have a DW_AT_specification refering to
+ /* Manually inserted to have a DW_AT_specification referring to
something and appearing ahead of it. */
.uleb128 0x8 /* DW_TAG_class_type */
.4byte .Lcu_class_type - .Ldebug_info0 /* DW_AT_specification */
diff --git a/ld/testsuite/ld-arm/stm32l4xx-fix-all.s b/ld/testsuite/ld-arm/stm32l4xx-fix-all.s
index 580e5b2..e1e4a06 100644
--- a/ld/testsuite/ld-arm/stm32l4xx-fix-all.s
+++ b/ld/testsuite/ld-arm/stm32l4xx-fix-all.s
@@ -7,7 +7,7 @@
.thumb_func
.global _start
_start:
- @ All LDM treatments for word acces <= 8 go through the same
+ @ All LDM treatments for word access <= 8 go through the same
@ replication code, but decoding may vary
ldm.w r9, {r1-r8}
ldm.w r9!, {r1-r8}
@@ -15,7 +15,7 @@ _start:
ldmdb.w r9!, {r1-r8}
pop {r1-r8}
- @ All VLDM treatments for word acces <= 8 go through the same
+ @ All VLDM treatments for word access <= 8 go through the same
@ replication code, but decoding may vary
vldm r9, {s1-s8}
vldm r6!, {s9-s16}
diff --git a/ld/testsuite/ld-arm/thumb2-b-interwork.s b/ld/testsuite/ld-arm/thumb2-b-interwork.s
index 4452a8f..2f82c47 100644
--- a/ld/testsuite/ld-arm/thumb2-b-interwork.s
+++ b/ld/testsuite/ld-arm/thumb2-b-interwork.s
@@ -1,4 +1,4 @@
-@ Test to ensure that a Thumb-2 B.W can branch to an ARM funtion.
+@ Test to ensure that a Thumb-2 B.W can branch to an ARM function.
.arch armv7-a
.global _start
diff --git a/ld/testsuite/ld-arm/thumb2-bl.s b/ld/testsuite/ld-arm/thumb2-bl.s
index 80af810..306aa4e 100644
--- a/ld/testsuite/ld-arm/thumb2-bl.s
+++ b/ld/testsuite/ld-arm/thumb2-bl.s
@@ -1,5 +1,5 @@
@ Test to ensure that a Thumb-2 BL works with an offset that is
-@ not permissable for Thumb-1.
+@ not permissible for Thumb-1.
.global _start
.syntax unified
diff --git a/ld/testsuite/ld-s390/tlspic1.s b/ld/testsuite/ld-s390/tlspic1.s
index 28b9c3a..e423985 100644
--- a/ld/testsuite/ld-s390/tlspic1.s
+++ b/ld/testsuite/ld-s390/tlspic1.s
@@ -32,7 +32,7 @@ sh8: .long 264
.type fn1,@function
.balign 64
fn1:
- /* Funtion prolog */
+ /* Function prolog */
stm %r6,%r14,24(%r15)
bras %r13,.LTN1
/* Literal pool */
@@ -84,7 +84,7 @@ fn1:
.LC22:
.long sH2@gotntpoff
.LTN1:
- /* Funtion prolog */
+ /* Function prolog */
lr %r14,%r15
l %r12,.LC0-.LT1(%r13)
ahi %r15,-96
diff --git a/ld/testsuite/ld-s390/tlspic1_64.s b/ld/testsuite/ld-s390/tlspic1_64.s
index 4e50008..31abd78 100644
--- a/ld/testsuite/ld-s390/tlspic1_64.s
+++ b/ld/testsuite/ld-s390/tlspic1_64.s
@@ -32,7 +32,7 @@ sh8: .long 264
.type fn1,@function
.balign 64
fn1:
- /* Funtion prolog */
+ /* Function prolog */
stmg %r6,%r14,48(%r15)
bras %r13,.LTN1
/* Literal pool */
@@ -80,7 +80,7 @@ fn1:
.LC22:
.quad sH2@gotntpoff
.LTN1:
- /* Funtion prolog */
+ /* Function prolog */
lgr %r14,%r15
larl %r12,_GLOBAL_OFFSET_TABLE_
aghi %r15,-160
diff --git a/ld/testsuite/ld-scripts/section-match-1.d b/ld/testsuite/ld-scripts/section-match-1.d
index c68dbb8..519f7cd 100644
--- a/ld/testsuite/ld-scripts/section-match-1.d
+++ b/ld/testsuite/ld-scripts/section-match-1.d
@@ -2,7 +2,7 @@
#ld: -T section-match-1.t
#objdump: -s
#notarget: *-*-osf* *-*-aix* *-*-pe *-*-*aout *-*-*oldld *-*-ecoff *-*-netbsd *-*-vms h8300-*-* tic30-*-*
-# This test uses arbitary section names, which are not support by some
+# This test uses arbitrary section names, which are not support by some
# file formts. Also these section names must be present in the
# output, not translated into some other name, eg .text
diff --git a/sim/testsuite/d10v-elf/t-macros.i b/sim/testsuite/d10v-elf/t-macros.i
index f424acf..0de38d4 100644
--- a/sim/testsuite/d10v-elf/t-macros.i
+++ b/sim/testsuite/d10v-elf/t-macros.i
@@ -170,7 +170,7 @@ _start:
.data
1: ldi r1, 2f@word
jmp r1
-;;; Successfull trap jumps back to here
+;;; Successful trap jumps back to here
.text
;;; Verify the PSW
2: mvfc r2, cr0
diff --git a/sim/testsuite/sim/bfin/divq.s b/sim/testsuite/sim/bfin/divq.s
index 6cb881b..61880c7 100644
--- a/sim/testsuite/sim/bfin/divq.s
+++ b/sim/testsuite/sim/bfin/divq.s
@@ -7,7 +7,7 @@
start
/*
- * Evaluate given a signed integer dividend and signed interger divisor
+ * Evaluate given a signed integer dividend and signed integer divisor
* input is:
* r0 = dividend, or numerator
* r1 = divisor, or denominator
diff --git a/sim/testsuite/sim/bfin/se_illegalcombination.S b/sim/testsuite/sim/bfin/se_illegalcombination.S
index 0fe5f27..bd8f333 100644
--- a/sim/testsuite/sim/bfin/se_illegalcombination.S
+++ b/sim/testsuite/sim/bfin/se_illegalcombination.S
@@ -2,7 +2,7 @@
// Description: Multi-issue Illegal Combinations
# mach: bfin
# sim: --environment operating
-# xfail: "missing a few checks; hardware doesnt seem to match PRM?" bfin-*
+# xfail: "missing a few checks; hardware doesn't seem to match PRM?" bfin-*
#include "test.h"
.include "testutils.inc"
diff --git a/sim/testsuite/sim/bfin/se_undefinedinstruction1.S b/sim/testsuite/sim/bfin/se_undefinedinstruction1.S
index 5337a74..fa1ab72 100644
--- a/sim/testsuite/sim/bfin/se_undefinedinstruction1.S
+++ b/sim/testsuite/sim/bfin/se_undefinedinstruction1.S
@@ -200,7 +200,7 @@ BEGIN:
.dw 0x21 ;
.dw 0x22 ;
.dw 0x26 ;
- .dw 0x27 ; // XXX: hardware doesnt trigger illegal exception ?
+ .dw 0x27 ; // XXX: hardware doesn't trigger illegal exception ?
.dw 0x28 ;
.dw 0x29 ;
.dw 0x2A ;
diff --git a/sim/testsuite/sim/bfin/se_undefinedinstruction2.S b/sim/testsuite/sim/bfin/se_undefinedinstruction2.S
index d21e375..9d68ccb 100644
--- a/sim/testsuite/sim/bfin/se_undefinedinstruction2.S
+++ b/sim/testsuite/sim/bfin/se_undefinedinstruction2.S
@@ -175,12 +175,12 @@ BEGIN:
.dw 0x10E ;
.dw 0x124 ;
.ifndef BFIN_HW
- // XXX: hardware doesnt trigger illegal exception ?
+ // XXX: hardware doesn't trigger illegal exception ?
.dw 0x125 ;
.endif
.dw 0x164 ;
.ifndef BFIN_HW
- // XXX: hardware doesnt trigger illegal exception ?
+ // XXX: hardware doesn't trigger illegal exception ?
.dw 0x165 ;
.endif
.dw 0x128 ;
diff --git a/sim/testsuite/sim/fr30/addsp.cgs b/sim/testsuite/sim/fr30/addsp.cgs
index da5bc36..d12eefd 100644
--- a/sim/testsuite/sim/fr30/addsp.cgs
+++ b/sim/testsuite/sim/fr30/addsp.cgs
@@ -11,18 +11,18 @@ addsp:
; Test addsp $s10
mvr_h_gr sp,r7 ; save stack pointer permanently
mvr_h_gr sp,r8 ; Shadow updated sp
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
addsp 508
test_cc 1 1 1 1
inci_h_gr 508,r8
testr_h_gr r8,sp
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
addsp 0
test_cc 1 1 1 0
testr_h_gr r8,sp
- set_cc 0x0d ; Condition codes are irrelevent
+ set_cc 0x0d ; Condition codes are irrelevant
addsp -512
test_cc 1 1 0 1
inci_h_gr -512,r8
diff --git a/sim/testsuite/sim/fr30/bc.cgs b/sim/testsuite/sim/fr30/bc.cgs
index 0502625..e2233a1 100644
--- a/sim/testsuite/sim/fr30/bc.cgs
+++ b/sim/testsuite/sim/fr30/bc.cgs
@@ -9,101 +9,101 @@
.global bc
bc:
; Test bc $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch bc
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch bc
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch bc
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch bc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch bc
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch bc
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch bc
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch bc
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch bc
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch bc
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch bc
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch bc
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch bc
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch bc
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch bc
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch bc
; Test bc:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch_d bc:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch_d bc:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch_d bc:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch_d bc:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch_d bc:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch_d bc:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch_d bc:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch_d bc:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch_d bc:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch_d bc:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch_d bc:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch_d bc:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch_d bc:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch_d bc:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch_d bc:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch_d bc:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/beq.cgs b/sim/testsuite/sim/fr30/beq.cgs
index edd797e..443ebbe 100644
--- a/sim/testsuite/sim/fr30/beq.cgs
+++ b/sim/testsuite/sim/fr30/beq.cgs
@@ -9,101 +9,101 @@
.global beq
beq:
; Test beq $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch beq
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch beq
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch beq
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch beq
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch beq
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch beq
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch beq
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch beq
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch beq
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch beq
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch beq
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch beq
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch beq
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch beq
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch beq
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch beq
; Test beq:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch_d beq:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch_d beq:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch_d beq:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch_d beq:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch_d beq:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch_d beq:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch_d beq:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch_d beq:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch_d beq:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch_d beq:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch_d beq:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch_d beq:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch_d beq:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch_d beq:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch_d beq:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch_d beq:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bge.cgs b/sim/testsuite/sim/fr30/bge.cgs
index dd7796c..6db3f3e 100644
--- a/sim/testsuite/sim/fr30/bge.cgs
+++ b/sim/testsuite/sim/fr30/bge.cgs
@@ -9,101 +9,101 @@
.global bge
bge:
; Test bge $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch bge
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch bge
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch bge
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch bge
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch bge
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch bge
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch bge
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch bge
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch bge
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch bge
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch bge
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch bge
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch bge
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch bge
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch bge
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch bge
; Test bge:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch_d bge:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch_d bge:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch_d bge:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch_d bge:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch_d bge:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch_d bge:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch_d bge:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch_d bge:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch_d bge:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch_d bge:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch_d bge:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch_d bge:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch_d bge:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch_d bge:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch_d bge:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch_d bge:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bgt.cgs b/sim/testsuite/sim/fr30/bgt.cgs
index 525ac2e..f4924eb 100644
--- a/sim/testsuite/sim/fr30/bgt.cgs
+++ b/sim/testsuite/sim/fr30/bgt.cgs
@@ -9,101 +9,101 @@
.global bgt
bgt:
; Test bgt $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch bgt
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch bgt
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch bgt
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch bgt
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch bgt
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch bgt
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch bgt
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch bgt
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch bgt
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch bgt
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch bgt
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch bgt
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch bgt
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch bgt
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch bgt
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch bgt
; Test bgt:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch_d bgt:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch_d bgt:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch_d bgt:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch_d bgt:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch_d bgt:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch_d bgt:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch_d bgt:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch_d bgt:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch_d bgt:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch_d bgt:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch_d bgt:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch_d bgt:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch_d bgt:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch_d bgt:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch_d bgt:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch_d bgt:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bhi.cgs b/sim/testsuite/sim/fr30/bhi.cgs
index f5a1549..fb2bebf 100644
--- a/sim/testsuite/sim/fr30/bhi.cgs
+++ b/sim/testsuite/sim/fr30/bhi.cgs
@@ -9,101 +9,101 @@
.global bhi
bhi:
; Test bhi $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch bhi
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch bhi
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch bhi
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch bhi
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch bhi
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch bhi
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch bhi
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch bhi
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch bhi
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch bhi
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch bhi
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch bhi
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch bhi
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch bhi
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch bhi
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch bhi
; Test bhi:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch_d bhi:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch_d bhi:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch_d bhi:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch_d bhi:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch_d bhi:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch_d bhi:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch_d bhi:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch_d bhi:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch_d bhi:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch_d bhi:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch_d bhi:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch_d bhi:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch_d bhi:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch_d bhi:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch_d bhi:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch_d bhi:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/ble.cgs b/sim/testsuite/sim/fr30/ble.cgs
index 1a33f78..ae361bb 100644
--- a/sim/testsuite/sim/fr30/ble.cgs
+++ b/sim/testsuite/sim/fr30/ble.cgs
@@ -9,101 +9,101 @@
.global ble
ble:
; Test ble $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch ble
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch ble
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch ble
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch ble
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch ble
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch ble
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch ble
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch ble
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch ble
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch ble
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch ble
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch ble
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch ble
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch ble
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch ble
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch ble
; Test ble:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch_d ble:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch_d ble:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch_d ble:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch_d ble:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch_d ble:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch_d ble:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch_d ble:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch_d ble:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch_d ble:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch_d ble:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch_d ble:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch_d ble:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch_d ble:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch_d ble:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch_d ble:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch_d ble:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bls.cgs b/sim/testsuite/sim/fr30/bls.cgs
index c0148b7..bd13fd5 100644
--- a/sim/testsuite/sim/fr30/bls.cgs
+++ b/sim/testsuite/sim/fr30/bls.cgs
@@ -9,101 +9,101 @@
.global bls
bls:
; Test bls $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch bls
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch bls
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch bls
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch bls
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch bls
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch bls
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch bls
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch bls
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch bls
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch bls
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch bls
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch bls
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch bls
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch bls
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch bls
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch bls
; Test bls:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch_d bls:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch_d bls:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch_d bls:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch_d bls:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch_d bls:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch_d bls:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch_d bls:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch_d bls:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch_d bls:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch_d bls:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch_d bls:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch_d bls:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch_d bls:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch_d bls:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch_d bls:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch_d bls:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/blt.cgs b/sim/testsuite/sim/fr30/blt.cgs
index f7b6ff1..3b1222b 100644
--- a/sim/testsuite/sim/fr30/blt.cgs
+++ b/sim/testsuite/sim/fr30/blt.cgs
@@ -9,101 +9,101 @@
.global blt
blt:
; Test blt $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch blt
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch blt
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch blt
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch blt
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch blt
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch blt
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch blt
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch blt
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch blt
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch blt
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch blt
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch blt
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch blt
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch blt
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch blt
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch blt
; Test blt:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch_d blt:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch_d blt:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch_d blt:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch_d blt:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch_d blt:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch_d blt:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch_d blt:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch_d blt:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch_d blt:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch_d blt:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch_d blt:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch_d blt:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch_d blt:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch_d blt:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch_d blt:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch_d blt:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bn.cgs b/sim/testsuite/sim/fr30/bn.cgs
index 45858fc..10e57ad 100644
--- a/sim/testsuite/sim/fr30/bn.cgs
+++ b/sim/testsuite/sim/fr30/bn.cgs
@@ -9,101 +9,101 @@
.global bn
bn:
; Test bn $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch bn
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch bn
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch bn
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch bn
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch bn
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch bn
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch bn
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch bn
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch bn
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch bn
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch bn
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch bn
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch bn
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch bn
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch bn
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch bn
; Test bn:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch_d bn:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch_d bn:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch_d bn:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch_d bn:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch_d bn:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch_d bn:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch_d bn:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch_d bn:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch_d bn:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch_d bn:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch_d bn:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch_d bn:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch_d bn:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch_d bn:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch_d bn:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch_d bn:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bnc.cgs b/sim/testsuite/sim/fr30/bnc.cgs
index 9968c43..5d86cee 100644
--- a/sim/testsuite/sim/fr30/bnc.cgs
+++ b/sim/testsuite/sim/fr30/bnc.cgs
@@ -9,101 +9,101 @@
.global bnc
bc:
; Test bnc $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch bnc
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch bnc
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch bnc
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch bnc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch bnc
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch bnc
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch bnc
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch bnc
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch bnc
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch bnc
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch bnc
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch bnc
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch bnc
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch bnc
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch bnc
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch bnc
; Test bnc:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch_d bnc:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch_d bnc:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch_d bnc:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch_d bnc:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch_d bnc:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch_d bnc:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch_d bnc:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch_d bnc:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch_d bnc:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch_d bnc:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch_d bnc:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch_d bnc:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch_d bnc:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch_d bnc:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch_d bnc:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch_d bnc:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bne.cgs b/sim/testsuite/sim/fr30/bne.cgs
index 58971de..6ada810 100644
--- a/sim/testsuite/sim/fr30/bne.cgs
+++ b/sim/testsuite/sim/fr30/bne.cgs
@@ -9,101 +9,101 @@
.global bne
bne:
; Test bne $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch bne
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch bne
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch bne
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch bne
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch bne
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch bne
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch bne
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch bne
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch bne
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch bne
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch bne
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch bne
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch bne
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch bne
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch bne
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch bne
; Test bne:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch_d bne:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch_d bne:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch_d bne:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch_d bne:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch_d bne:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch_d bne:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch_d bne:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch_d bne:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch_d bne:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch_d bne:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch_d bne:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch_d bne:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch_d bne:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch_d bne:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch_d bne:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch_d bne:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bno.cgs b/sim/testsuite/sim/fr30/bno.cgs
index faef9ba..17f1356 100644
--- a/sim/testsuite/sim/fr30/bno.cgs
+++ b/sim/testsuite/sim/fr30/bno.cgs
@@ -9,101 +9,101 @@
.global bno
bno:
; Test bno $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch bno
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch bno
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch bno
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch bno
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch bno
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch bno
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch bno
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch bno
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch bno
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch bno
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch bno
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch bno
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch bno
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch bno
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch bno
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch bno
; Test bno:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch_d bno:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch_d bno:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch_d bno:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch_d bno:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch_d bno:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch_d bno:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch_d bno:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch_d bno:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch_d bno:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch_d bno:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch_d bno:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch_d bno:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch_d bno:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch_d bno:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch_d bno:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch_d bno:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bnv.cgs b/sim/testsuite/sim/fr30/bnv.cgs
index 7615abd..995dbb4 100644
--- a/sim/testsuite/sim/fr30/bnv.cgs
+++ b/sim/testsuite/sim/fr30/bnv.cgs
@@ -9,101 +9,101 @@
.global bnv
bnv:
; Test bnv $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch bnv
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch bnv
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch bnv
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch bnv
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch bnv
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch bnv
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch bnv
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch bnv
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch bnv
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch bnv
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch bnv
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch bnv
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch bnv
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch bnv
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch bnv
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch bnv
; Test bnv:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch_d bnv:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch_d bnv:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch_d bnv:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch_d bnv:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch_d bnv:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch_d bnv:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch_d bnv:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch_d bnv:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch_d bnv:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch_d bnv:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch_d bnv:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch_d bnv:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch_d bnv:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch_d bnv:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch_d bnv:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch_d bnv:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bp.cgs b/sim/testsuite/sim/fr30/bp.cgs
index 3753283..e89426a 100644
--- a/sim/testsuite/sim/fr30/bp.cgs
+++ b/sim/testsuite/sim/fr30/bp.cgs
@@ -9,101 +9,101 @@
.global bp
bp:
; Test bp $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch bp
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch bp
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch bp
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch bp
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch bp
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch bp
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch bp
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch bp
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch bp
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch bp
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch bp
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch bp
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch bp
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch bp
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch bp
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch bp
; Test bp:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch_d bp:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch_d bp:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch_d bp:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch_d bp:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch_d bp:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch_d bp:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch_d bp:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch_d bp:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch_d bp:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch_d bp:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch_d bp:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch_d bp:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch_d bp:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch_d bp:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch_d bp:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch_d bp:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bra.cgs b/sim/testsuite/sim/fr30/bra.cgs
index 3732f74..4afc585 100644
--- a/sim/testsuite/sim/fr30/bra.cgs
+++ b/sim/testsuite/sim/fr30/bra.cgs
@@ -9,101 +9,101 @@
.global bra
bra:
; Test bra $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch bra
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch bra
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch bra
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch bra
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch bra
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch bra
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch bra
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch bra
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch bra
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch bra
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch bra
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch bra
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch bra
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch bra
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch bra
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch bra
; Test bra:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch_d bra:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch_d bra:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch_d bra:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch_d bra:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch_d bra:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch_d bra:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch_d bra:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch_d bra:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch_d bra:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch_d bra:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch_d bra:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch_d bra:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch_d bra:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch_d bra:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch_d bra:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch_d bra:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bv.cgs b/sim/testsuite/sim/fr30/bv.cgs
index 68cb9acf..0a421e5 100644
--- a/sim/testsuite/sim/fr30/bv.cgs
+++ b/sim/testsuite/sim/fr30/bv.cgs
@@ -9,101 +9,101 @@
.global bv
bv:
; Test bv $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch bv
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch bv
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch bv
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch bv
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch bv
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch bv
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch bv
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch bv
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch bv
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch bv
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch bv
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch bv
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch bv
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch bv
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch bv
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch bv
; Test bv:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch_d bv:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch_d bv:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch_d bv:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch_d bv:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch_d bv:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch_d bv:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch_d bv:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch_d bv:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch_d bv:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch_d bv:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch_d bv:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch_d bv:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch_d bv:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch_d bv:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch_d bv:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch_d bv:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/copld.cgs b/sim/testsuite/sim/fr30/copld.cgs
index e0ababb..2273243 100644
--- a/sim/testsuite/sim/fr30/copld.cgs
+++ b/sim/testsuite/sim/fr30/copld.cgs
@@ -10,11 +10,11 @@
copld:
; Test copld copld $u4,$cc,$Rj,CRi
; The current implementation is a noop
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
copld 0,0,r0,cr15
test_cc 1 1 1 1
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
copld 15,255,r15,cr0
test_cc 1 1 1 0
diff --git a/sim/testsuite/sim/fr30/copop.cgs b/sim/testsuite/sim/fr30/copop.cgs
index b0afd77..3fe785a 100644
--- a/sim/testsuite/sim/fr30/copop.cgs
+++ b/sim/testsuite/sim/fr30/copop.cgs
@@ -10,11 +10,11 @@
copop:
; Test copop copop $u4,$cc,$CRj,CRi
; The current implementation is a noop
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
copop 0,0,cr0,cr15
test_cc 1 1 1 1
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
copop 15,255,cr0,cr15
test_cc 1 1 1 0
diff --git a/sim/testsuite/sim/fr30/copst.cgs b/sim/testsuite/sim/fr30/copst.cgs
index 00120b2..034b920 100644
--- a/sim/testsuite/sim/fr30/copst.cgs
+++ b/sim/testsuite/sim/fr30/copst.cgs
@@ -10,11 +10,11 @@
copst:
; Test copst copst $u4,$cc,$CRj,Ri
; The current implementation is a noop
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
copst 0,0,cr0,r15
test_cc 1 1 1 1
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
copst 15,255,cr15,r0
test_cc 1 1 1 0
diff --git a/sim/testsuite/sim/fr30/copsv.cgs b/sim/testsuite/sim/fr30/copsv.cgs
index e00a4f5..45b3e98 100644
--- a/sim/testsuite/sim/fr30/copsv.cgs
+++ b/sim/testsuite/sim/fr30/copsv.cgs
@@ -10,11 +10,11 @@
copsv:
; Test copsv copsv $u4,$cc,$CRj,Ri
; The current implementation is a noop
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
copsv 0,0,cr0,r15
test_cc 1 1 1 1
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
copsv 15,255,cr15,r0
test_cc 1 1 1 0
diff --git a/sim/testsuite/sim/fr30/enter.cgs b/sim/testsuite/sim/fr30/enter.cgs
index ae75e16..7d20845 100644
--- a/sim/testsuite/sim/fr30/enter.cgs
+++ b/sim/testsuite/sim/fr30/enter.cgs
@@ -12,7 +12,7 @@ enter:
mvr_h_gr sp,r7 ; save stack pointer
mvr_h_gr sp,r8 ; shadow stack pointer
mvr_h_gr sp,r14 ; Initialize
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
enter 0
test_cc 1 1 1 1
testr_h_gr r8,sp
@@ -22,7 +22,7 @@ enter:
mvr_h_gr sp,r8 ; shadow stack pointer
mvr_h_gr r14,r9 ; save
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
enter 0x3fc
test_cc 1 1 1 0
inci_h_gr -4,r8
diff --git a/sim/testsuite/sim/fr30/extsb.cgs b/sim/testsuite/sim/fr30/extsb.cgs
index 6a18d7e..8d4158a 100644
--- a/sim/testsuite/sim/fr30/extsb.cgs
+++ b/sim/testsuite/sim/fr30/extsb.cgs
@@ -10,25 +10,25 @@
extsb:
; Test extsb $Ri
mvi_h_gr 0,r7
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
extsb r7
test_cc 1 1 1 1
test_h_gr 0,r7
mvi_h_gr 0x7f,r7
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
extsb r7
test_cc 1 1 1 0
test_h_gr 0x7f,r7
mvi_h_gr 0x80,r7
- set_cc 0x0d ; Condition codes are irrelevent
+ set_cc 0x0d ; Condition codes are irrelevant
extsb r7
test_cc 1 1 0 1
test_h_gr 0xffffff80,r7
mvi_h_gr 0xffffff7f,r7
- set_cc 0x0c ; Condition codes are irrelevent
+ set_cc 0x0c ; Condition codes are irrelevant
extsb r7
test_cc 1 1 0 0
test_h_gr 0x7f,r7
diff --git a/sim/testsuite/sim/fr30/extsh.cgs b/sim/testsuite/sim/fr30/extsh.cgs
index eb12fd0..1e575ee 100644
--- a/sim/testsuite/sim/fr30/extsh.cgs
+++ b/sim/testsuite/sim/fr30/extsh.cgs
@@ -10,37 +10,37 @@
extsh:
; Test extsh $Ri
mvi_h_gr 0,r7
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
extsh r7
test_cc 1 1 1 1
test_h_gr 0,r7
mvi_h_gr 0x7f,r7
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
extsh r7
test_cc 1 1 1 0
test_h_gr 0x7f,r7
mvi_h_gr 0x80,r7
- set_cc 0x0d ; Condition codes are irrelevent
+ set_cc 0x0d ; Condition codes are irrelevant
extsh r7
test_cc 1 1 0 1
test_h_gr 0x80,r7
mvi_h_gr 0x7fff,r7
- set_cc 0x0c ; Condition codes are irrelevent
+ set_cc 0x0c ; Condition codes are irrelevant
extsh r7
test_cc 1 1 0 0
test_h_gr 0x7fff,r7
mvi_h_gr 0x8000,r7
- set_cc 0x0b ; Condition codes are irrelevent
+ set_cc 0x0b ; Condition codes are irrelevant
extsh r7
test_cc 1 0 1 1
test_h_gr 0xffff8000,r7
mvi_h_gr 0xffff7fff,r7
- set_cc 0x0a ; Condition codes are irrelevent
+ set_cc 0x0a ; Condition codes are irrelevant
extsh r7
test_cc 1 0 1 0
test_h_gr 0x7fff,r7
diff --git a/sim/testsuite/sim/fr30/extub.cgs b/sim/testsuite/sim/fr30/extub.cgs
index ddcc683..846f95f 100644
--- a/sim/testsuite/sim/fr30/extub.cgs
+++ b/sim/testsuite/sim/fr30/extub.cgs
@@ -10,31 +10,31 @@
extub:
; Test extub $Ri
mvi_h_gr 0,r7
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
extub r7
test_cc 1 1 1 1
test_h_gr 0,r7
mvi_h_gr 0x7f,r7
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
extub r7
test_cc 1 1 1 0
test_h_gr 0x7f,r7
mvi_h_gr 0x80,r7
- set_cc 0x0d ; Condition codes are irrelevent
+ set_cc 0x0d ; Condition codes are irrelevant
extub r7
test_cc 1 1 0 1
test_h_gr 0x80,r7
mvi_h_gr 0xffffff7f,r7
- set_cc 0x0c ; Condition codes are irrelevent
+ set_cc 0x0c ; Condition codes are irrelevant
extub r7
test_cc 1 1 0 0
test_h_gr 0x7f,r7
mvi_h_gr 0xffffff80,r7
- set_cc 0x0b ; Condition codes are irrelevent
+ set_cc 0x0b ; Condition codes are irrelevant
extub r7
test_cc 1 0 1 1
test_h_gr 0x80,r7
diff --git a/sim/testsuite/sim/fr30/extuh.cgs b/sim/testsuite/sim/fr30/extuh.cgs
index fa2579e..c4ed4ad 100644
--- a/sim/testsuite/sim/fr30/extuh.cgs
+++ b/sim/testsuite/sim/fr30/extuh.cgs
@@ -10,43 +10,43 @@
extuh:
; Test extuh $Ri
mvi_h_gr 0,r7
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
extuh r7
test_cc 1 1 1 1
test_h_gr 0,r7
mvi_h_gr 0x7f,r7
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
extuh r7
test_cc 1 1 1 0
test_h_gr 0x7f,r7
mvi_h_gr 0x80,r7
- set_cc 0x0d ; Condition codes are irrelevent
+ set_cc 0x0d ; Condition codes are irrelevant
extuh r7
test_cc 1 1 0 1
test_h_gr 0x80,r7
mvi_h_gr 0x7fff,r7
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
extuh r7
test_cc 1 1 1 0
test_h_gr 0x7fff,r7
mvi_h_gr 0x8000,r7
- set_cc 0x0d ; Condition codes are irrelevent
+ set_cc 0x0d ; Condition codes are irrelevant
extuh r7
test_cc 1 1 0 1
test_h_gr 0x8000,r7
mvi_h_gr 0xffff7fff,r7
- set_cc 0x0c ; Condition codes are irrelevent
+ set_cc 0x0c ; Condition codes are irrelevant
extuh r7
test_cc 1 1 0 0
test_h_gr 0x7fff,r7
mvi_h_gr 0xffff8000,r7
- set_cc 0x0b ; Condition codes are irrelevent
+ set_cc 0x0b ; Condition codes are irrelevant
extuh r7
test_cc 1 0 1 1
test_h_gr 0x8000,r7
diff --git a/sim/testsuite/sim/fr30/ldres.cgs b/sim/testsuite/sim/fr30/ldres.cgs
index 0083489..c03e341 100644
--- a/sim/testsuite/sim/fr30/ldres.cgs
+++ b/sim/testsuite/sim/fr30/ldres.cgs
@@ -11,13 +11,13 @@ ldres:
; Test ldres $@Ri+,$u4
; The current implementation simply increments Ri
mvi_h_gr 0x1000,r7
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
ldres @r7+,0
test_cc 1 1 1 1
test_h_gr 0x1004,r7
mvi_h_gr 0x1000,r7
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
ldres @r7+,0xf
test_cc 1 1 1 1
test_h_gr 0x1004,r7
diff --git a/sim/testsuite/sim/fr30/leave.cgs b/sim/testsuite/sim/fr30/leave.cgs
index 4d3dd70..225d3ed 100644
--- a/sim/testsuite/sim/fr30/leave.cgs
+++ b/sim/testsuite/sim/fr30/leave.cgs
@@ -14,7 +14,7 @@ leave:
inci_h_gr -4,r14
mvi_h_mem 0xdeadbeef,r14
mvi_h_gr 0xbeefdead,r15
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
leave
test_cc 1 1 1 1
testr_h_gr sp,r7
diff --git a/sim/testsuite/sim/fr30/nop.cgs b/sim/testsuite/sim/fr30/nop.cgs
index 885c55c..10848ae 100644
--- a/sim/testsuite/sim/fr30/nop.cgs
+++ b/sim/testsuite/sim/fr30/nop.cgs
@@ -9,7 +9,7 @@
.global nop
nop:
; Test nop
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
nop
test_cc 1 1 1 1
diff --git a/sim/testsuite/sim/fr30/stres.cgs b/sim/testsuite/sim/fr30/stres.cgs
index a85fdf3..fd9c07e 100644
--- a/sim/testsuite/sim/fr30/stres.cgs
+++ b/sim/testsuite/sim/fr30/stres.cgs
@@ -11,13 +11,13 @@ stres:
; Test stres $@Ri+,$u4
; The current implementation simply increments Ri
mvi_h_gr 0x1000,r7
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
stres 0,@r7+
test_cc 1 1 1 1
test_h_gr 0x1004,r7
mvi_h_gr 0x1000,r7
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
stres 0xf,@r7+
test_cc 1 1 1 1
test_h_gr 0x1004,r7
diff --git a/sim/testsuite/sim/fr30/xchb.cgs b/sim/testsuite/sim/fr30/xchb.cgs
index 3450a2e..08b8fb5 100644
--- a/sim/testsuite/sim/fr30/xchb.cgs
+++ b/sim/testsuite/sim/fr30/xchb.cgs
@@ -11,7 +11,7 @@ xchb:
; Test xchb @$Rj,Ri
mvi_h_mem 0xdeadbeef,sp
mvi_h_gr 0xbeefdead,r0
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
xchb @sp,r0
test_cc 1 1 1 1
test_h_gr 0xde,r0
diff --git a/sim/testsuite/sim/h8300/ldc.s b/sim/testsuite/sim/h8300/ldc.s
index 3712a6c..56eb949 100644
--- a/sim/testsuite/sim/h8300/ldc.s
+++ b/sim/testsuite/sim/h8300/ldc.s
@@ -341,7 +341,7 @@ ldc_reg_sbr:
mov #0xaaaaaaaa, er0
ldc er0, sbr ; set sbr to 0xaaaaaaaa
- stc sbr, er1 ; retreive and check sbr value
+ stc sbr, er1 ; retrieve and check sbr value
test_h_gr32 0xaaaaaaaa er1
test_h_gr32 0xaaaaaaaa er0 ; Register 0 modified by test procedure.
@@ -358,7 +358,7 @@ ldc_reg_vbr:
mov #0xaaaaaaaa, er0
ldc er0, vbr ; set sbr to 0xaaaaaaaa
- stc vbr, er1 ; retreive and check sbr value
+ stc vbr, er1 ; retrieve and check sbr value
test_h_gr32 0xaaaaaaaa er1
test_h_gr32 0xaaaaaaaa er0 ; Register 0 modified by test procedure.
diff --git a/sim/testsuite/sim/h8300/stc.s b/sim/testsuite/sim/h8300/stc.s
index 232bd5a..4b86ff3 100644
--- a/sim/testsuite/sim/h8300/stc.s
+++ b/sim/testsuite/sim/h8300/stc.s
@@ -304,7 +304,7 @@ stc_sbr_reg:
mov #0xaaaaaaaa, er0
ldc er0, sbr ; set sbr to 0xaaaaaaaa
- stc sbr, er1 ; retreive and check sbr value
+ stc sbr, er1 ; retrieve and check sbr value
test_h_gr32 0xaaaaaaaa er1
test_h_gr32 0xaaaaaaaa er0 ; Register 0 modified by test procedure.
@@ -321,7 +321,7 @@ stc_vbr_reg:
mov #0xaaaaaaaa, er0
ldc er0, vbr ; set sbr to 0xaaaaaaaa
- stc vbr, er1 ; retreive and check sbr value
+ stc vbr, er1 ; retrieve and check sbr value
test_h_gr32 0xaaaaaaaa er1
test_h_gr32 0xaaaaaaaa er0 ; Register 0 modified by test procedure.
diff --git a/sim/testsuite/sim/mips/hilo-hazard-3.s b/sim/testsuite/sim/mips/hilo-hazard-3.s
index 1a0949d..e9a1595 100644
--- a/sim/testsuite/sim/mips/hilo-hazard-3.s
+++ b/sim/testsuite/sim/mips/hilo-hazard-3.s
@@ -1,4 +1,4 @@
-# Test for mf{hi,lo} -> mult/div/mt{hi,lo} with 2 nops inbetween.
+# Test for mf{hi,lo} -> mult/div/mt{hi,lo} with 2 nops in between.
#
# mach: all
# as: -mabi=eabi
diff --git a/sim/testsuite/sim/mips/hilo-hazard-4.s b/sim/testsuite/sim/mips/hilo-hazard-4.s
index 8a4c888..ba298b4 100644
--- a/sim/testsuite/sim/mips/hilo-hazard-4.s
+++ b/sim/testsuite/sim/mips/hilo-hazard-4.s
@@ -1,4 +1,4 @@
-# Test for mf{hi,lo} -> mult/div/mt{hi,lo} with 2 nops inbetween.
+# Test for mf{hi,lo} -> mult/div/mt{hi,lo} with 2 nops in between.
#
# mach: all
# as: -mabi=eabi -mmicromips
diff --git a/sim/testsuite/sim/sh/fipr.s b/sim/testsuite/sim/sh/fipr.s
index 6a949aa..50bbc5c 100644
--- a/sim/testsuite/sim/sh/fipr.s
+++ b/sim/testsuite/sim/sh/fipr.s
@@ -58,7 +58,7 @@ test_infp:
# fr11 should be plus infinity
assert_fpreg_x 0x7f800000, fr11
test_infm:
- # Test negitive infinity
+ # Test negative infinity
fldi0 fr11
mov.l infm, r0
lds r0, fpul
diff --git a/zlib/contrib/inflate86/inffast.S b/zlib/contrib/inflate86/inffast.S
index 2245a29..8619833 100644
--- a/zlib/contrib/inflate86/inffast.S
+++ b/zlib/contrib/inflate86/inffast.S
@@ -26,7 +26,7 @@
* Jan-26-2003 -- Added runtime check for MMX support with cpuid instruction.
* With -DUSE_MMX, only MMX code is compiled. With -DNO_MMX, only non-MMX code
* is compiled. Without either option, runtime detection is enabled. Runtime
- * detection should work on all modern cpus and the recomended algorithm (flip
+ * detection should work on all modern cpus and the recommended algorithm (flip
* ID bit on eflags and then use the cpuid instruction) is used in many
* multimedia applications. Tested under win2k with gcc-2.95 and gas-2.12
* distributed with cygwin3. Compiling with gcc-2.95 -c inffast.S -o
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 13/23] Fix spelling mistakes in comments in .def files
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
` (16 preceding siblings ...)
2016-11-20 17:41 ` [PATCH 12/23] Fix spelling mistakes in comments in .cpu files Ambrogino Modigliani
@ 2016-11-20 17:41 ` Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 10/23] Fix spelling mistakes in comments in Expect scripts Ambrogino Modigliani
` (4 subsequent siblings)
22 siblings, 0 replies; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:41 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
gold/ChangeLog:
* gold/aarch64-reloc.def: Fix spelling in comments.
---
gold/aarch64-reloc.def | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gold/aarch64-reloc.def b/gold/aarch64-reloc.def
index 6d2981d..4a7a675 100644
--- a/gold/aarch64-reloc.def
+++ b/gold/aarch64-reloc.def
@@ -118,5 +118,5 @@ ARD(TLSDESC_CALL , STATIC , CFLOW , Y, -1, 0,0
// Note -
// A - Checking X, (L,U), if L == 0 && U == 0, no check. Otherwise, L!=0,
-// check that -2^L<=X<2^U. Also an extra alignment check could be embeded
+// check that -2^L<=X<2^U. Also an extra alignment check could be embedded
// into U.
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 12/23] Fix spelling mistakes in comments in .cpu files
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
` (15 preceding siblings ...)
2016-11-20 17:41 ` [PATCH 23/23] Fix spelling mistakes in comments in .y files Ambrogino Modigliani
@ 2016-11-20 17:41 ` Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 13/23] Fix spelling mistakes in comments in .def files Ambrogino Modigliani
` (5 subsequent siblings)
22 siblings, 0 replies; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:41 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
cpu/ChangeLog:
* cpu/m32c.cpu: Fix spelling in comments.
* cpu/m32r.cpu: Fix spelling in comments.
* cpu/mt.cpu: Fix spelling in comments.
* cpu/or1k.cpu: Fix spelling in comments.
* cpu/xstormy16.cpu: Fix spelling in comments.
---
cpu/m32c.cpu | 2 +-
cpu/m32r.cpu | 2 +-
cpu/mt.cpu | 2 +-
cpu/or1k.cpu | 2 +-
cpu/xstormy16.cpu | 8 ++++----
5 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/cpu/m32c.cpu b/cpu/m32c.cpu
index bcc3616..7d313bc 100644
--- a/cpu/m32c.cpu
+++ b/cpu/m32c.cpu
@@ -10292,7 +10292,7 @@
(binary-arith32-imm-dst-defn HI HI .w 1 stz X #x9 #x0 #xF stz-sem)
;-------------------------------------------------------------
-; stzx - store on zero extention
+; stzx - store on zero extension
;-------------------------------------------------------------
(define-pmacro (stzx-sem mode src1 src2 dst)
diff --git a/cpu/m32r.cpu b/cpu/m32r.cpu
index 003c848..8de8a43 100644
--- a/cpu/m32r.cpu
+++ b/cpu/m32r.cpu
@@ -742,7 +742,7 @@
(dnop disp16 "16 bit displacement" () h-iaddr f-disp16)
(dnop disp24 "24 bit displacement" (RELAX) h-iaddr f-disp24)
-; These hardware elements are refered to frequently.
+; These hardware elements are referred to frequently.
(dnop condbit "condition bit" (SEM-ONLY) h-cond f-nil)
(dnop accum "accumulator" (SEM-ONLY) h-accum f-nil)
diff --git a/cpu/mt.cpu b/cpu/mt.cpu
index bb987f3..bf49a28 100644
--- a/cpu/mt.cpu
+++ b/cpu/mt.cpu
@@ -163,7 +163,7 @@
; f-imm16: 16 bit immediate value when not an offset.
; f-imm16a: 16 bit immediate value when it's a pc-rel offset.
; f-uu4a: unused 4 bit field.
-; f-uu4b: second unsed 4 bit field.
+; f-uu4b: second unused 4 bit field.
; f-uu1: unused 1 bit field
; f-uu12: unused 12 bit field.
; f-uu16: unused 16 bit field.
diff --git a/cpu/or1k.cpu b/cpu/or1k.cpu
index 3a932bc..169344c 100644
--- a/cpu/or1k.cpu
+++ b/cpu/or1k.cpu
@@ -20,7 +20,7 @@
(include "simplify.inc")
; The OpenRISC family is a set of RISC microprocessor architectures with an
-; emphasis on scalability and is targetted at embedded use.
+; emphasis on scalability and is targeted at embedded use.
; The CPU RTL development is a collaborative open source effort.
; http://opencores.org/or1k
; http://openrisc.net
diff --git a/cpu/xstormy16.cpu b/cpu/xstormy16.cpu
index ae7e042..61b27cb 100644
--- a/cpu/xstormy16.cpu
+++ b/cpu/xstormy16.cpu
@@ -941,7 +941,7 @@
(set-psw Rdm (index-of Rdm) (and #xFF (mem QI (add (join SI HI Rb Rs) imm12))) ws2))
(set Rs (add Rs (add ws2 1)))
; Note - despite the XStormy16 ISA documentation the
- ; addition *is* propogated into the base register.
+ ; addition *is* propagated into the base register.
(if (eq Rs 0) (set Rb (add Rb 1)))
)
()
@@ -954,7 +954,7 @@
(+ OP1_6 OP2A_C ws2 Rs OP4M_1 Rdm OP5A_0 Rb imm12)
(sequence ()
; Note - despite the XStormy16 ISA documentation the
- ; subtraction *is* propogated into the base register.
+ ; subtraction *is* propagated into the base register.
(if (eq Rs 0) (set Rb (sub Rb 1)))
(set Rs (sub Rs (add ws2 1)))
(if ws2
@@ -990,7 +990,7 @@
(set-psw-nowrite (index-of Rdm) Rdm ws2)
(set Rs (add Rs (add ws2 1)))
; Note - despite the XStormy16 ISA documentation the
- ; addition *is* propogated into the base register.
+ ; addition *is* propagated into the base register.
(if (eq Rs 0) (set Rb (add Rb 1)))
)
()
@@ -1003,7 +1003,7 @@
(+ OP1_6 OP2A_E ws2 Rs OP4M_1 Rdm OP5A_0 Rb imm12)
(sequence ()
; Note - despite the XStormy16 ISA documentation the
- ; subtraction *is* propogated into the base register.
+ ; subtraction *is* propagated into the base register.
(if (eq Rs 0) (set Rb (sub Rb 1)))
(set Rs (sub Rs (add ws2 1)))
(set-psw-nowrite (index-of Rdm) Rdm ws2)
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 19/23] Fix spelling mistakes in comments in .m4 files
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
` (19 preceding siblings ...)
2016-11-20 17:41 ` [PATCH 11/23] Fix spelling mistakes in comments in XML files Ambrogino Modigliani
@ 2016-11-20 17:41 ` Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 21/23] Fix spelling mistakes in comments in .sc files Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 18/23] Fix spelling mistakes in comments in .l files Ambrogino Modigliani
22 siblings, 0 replies; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:41 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
bfd/ChangeLog:
* bfd/warning.m4: Fix spelling in comments.
config/ChangeLog:
* config/stdint.m4: Fix spelling in comments.
---
bfd/warning.m4 | 2 +-
config/stdint.m4 | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/bfd/warning.m4 b/bfd/warning.m4
index 3fe4340..1022364 100644
--- a/bfd/warning.m4
+++ b/bfd/warning.m4
@@ -56,7 +56,7 @@ AC_EGREP_CPP([^[0-4]$],[__GNUC__],,GCC_WARN_CFLAGS="$GCC_WARN_CFLAGS -Wstack-usa
WARN_WRITE_STRINGS=""
AC_EGREP_CPP([^[0-3]$],[__GNUC__],,WARN_WRITE_STRINGS="-Wwrite-strings")
-# Verify CC_FOR_BUILD to be compatible with waring flags
+# Verify CC_FOR_BUILD to be compatible with warning flags
# Add -Wshadow if the compiler is a sufficiently recent version of GCC.
AC_EGREP_CPP_FOR_BUILD([^[0-3]$],[__GNUC__],,GCC_WARN_CFLAGS_FOR_BUILD="$GCC_WARN_CFLAGS_FOR_BUILD -Wshadow")
diff --git a/config/stdint.m4 b/config/stdint.m4
index 59f4359..2894f08 100644
--- a/config/stdint.m4
+++ b/config/stdint.m4
@@ -20,7 +20,7 @@ dnl typedefs, especially uint8_t,int32_t,uintptr_t.
dnl Many older installations will not provide this file, but some will
dnl have the very same definitions in <inttypes.h>. In other environments
dnl we can use the inet-types in <sys/types.h> which would define the
-dnl typedefs int8_t and u_int8_t respectivly.
+dnl typedefs int8_t and u_int8_t respectively.
dnl
dnl This macros will create a local "_stdint.h" or the headerfile given as
dnl an argument. In many cases that file will pick the definition from a
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 23/23] Fix spelling mistakes in comments in .y files
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
` (14 preceding siblings ...)
2016-11-20 17:41 ` [PATCH 14/23] Fix spelling mistakes in comments in .em files Ambrogino Modigliani
@ 2016-11-20 17:41 ` Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 12/23] Fix spelling mistakes in comments in .cpu files Ambrogino Modigliani
` (6 subsequent siblings)
22 siblings, 0 replies; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:41 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
binutils/ChangeLog:
* binutils/arparse.y: Fix spelling in comments.
gdb/ChangeLog:
* gdb/c-exp.y: Fix spelling in comments.
* gdb/cp-name-parser.y: Fix spelling in comments.
* gdb/d-exp.y: Fix spelling in comments.
* gdb/f-exp.y: Fix spelling in comments.
* gdb/go-exp.y: Fix spelling in comments.
* gdb/p-exp.y: Fix spelling in comments.
ld/ChangeLog:
* ld/deffilep.y: Fix spelling in comments.
---
binutils/arparse.y | 2 +-
gdb/c-exp.y | 2 +-
gdb/cp-name-parser.y | 2 +-
gdb/d-exp.y | 2 +-
gdb/f-exp.y | 2 +-
gdb/go-exp.y | 2 +-
gdb/p-exp.y | 2 +-
ld/deffilep.y | 4 ++--
8 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/binutils/arparse.y b/binutils/arparse.y
index 9b2fefb..0048621 100644
--- a/binutils/arparse.y
+++ b/binutils/arparse.y
@@ -1,5 +1,5 @@
%{
-/* arparse.y - Stange script language parser */
+/* arparse.y - Strange script language parser */
/* Copyright (C) 1992-2016 Free Software Foundation, Inc.
diff --git a/gdb/c-exp.y b/gdb/c-exp.y
index f08bb69..ea7e2ec 100644
--- a/gdb/c-exp.y
+++ b/gdb/c-exp.y
@@ -2524,7 +2524,7 @@ lex_one_token (struct parser_state *par_state, int *is_quoted_name)
last_was_structop = 1;
goto symbol; /* Nope, must be a symbol. */
}
- /* FALL THRU into number case. */
+ /* FALL THROUGH into number case. */
case '0':
case '1':
diff --git a/gdb/cp-name-parser.y b/gdb/cp-name-parser.y
index c6a5c34..a1b427a 100644
--- a/gdb/cp-name-parser.y
+++ b/gdb/cp-name-parser.y
@@ -1673,7 +1673,7 @@ yylex (void)
lexptr++;
return '-';
}
- /* FALL THRU into number case. */
+ /* FALL THROUGH into number case. */
try_number:
case '0':
diff --git a/gdb/d-exp.y b/gdb/d-exp.y
index 426f9b3..b8de4f5 100644
--- a/gdb/d-exp.y
+++ b/gdb/d-exp.y
@@ -1123,7 +1123,7 @@ lex_one_token (struct parser_state *par_state)
last_was_structop = 1;
goto symbol; /* Nope, must be a symbol. */
}
- /* FALL THRU into number case. */
+ /* FALL THROUGH into number case. */
case '0':
case '1':
diff --git a/gdb/f-exp.y b/gdb/f-exp.y
index 420f18e..b553736 100644
--- a/gdb/f-exp.y
+++ b/gdb/f-exp.y
@@ -1006,7 +1006,7 @@ yylex (void)
/* Might be a floating point number. */
if (lexptr[1] < '0' || lexptr[1] > '9')
goto symbol; /* Nope, must be a symbol. */
- /* FALL THRU into number case. */
+ /* FALL THROUGH into number case. */
case '0':
case '1':
diff --git a/gdb/go-exp.y b/gdb/go-exp.y
index 1b0fe5b..1795b97 100644
--- a/gdb/go-exp.y
+++ b/gdb/go-exp.y
@@ -1089,7 +1089,7 @@ lex_one_token (struct parser_state *par_state)
last_was_structop = 1;
goto symbol; /* Nope, must be a symbol. */
}
- /* FALL THRU into number case. */
+ /* FALL THROUGH into number case. */
case '0':
case '1':
diff --git a/gdb/p-exp.y b/gdb/p-exp.y
index fa6b22c..260f162 100644
--- a/gdb/p-exp.y
+++ b/gdb/p-exp.y
@@ -1211,7 +1211,7 @@ yylex (void)
goto symbol; /* Nope, must be a symbol. */
}
- /* FALL THRU into number case. */
+ /* FALL THROUGH into number case. */
case '0':
case '1':
diff --git a/ld/deffilep.y b/ld/deffilep.y
index 837de0e..302016c 100644
--- a/ld/deffilep.y
+++ b/ld/deffilep.y
@@ -904,8 +904,8 @@ def_file_add_directive (def_file *my_def, const char *param, int len)
/* Scan forward until we encounter any of:
- the end of the buffer
- the start of a new option
- - a newline seperating options
- - a NUL seperating options. */
+ - a newline separating options
+ - a NUL separating options. */
for (tend = (char *) (param + 1);
(tend < pend
&& !(ISSPACE (tend[-1]) && *tend == '-')
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 16/23] Fix spelling mistakes in comments in .in files
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
` (11 preceding siblings ...)
2016-11-20 17:41 ` [PATCH 20/23] Fix spelling mistakes in comments in .opc files Ambrogino Modigliani
@ 2016-11-20 17:41 ` Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 15/23] Fix spelling mistakes in comments in .igen files Ambrogino Modigliani
` (9 subsequent siblings)
22 siblings, 0 replies; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:41 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
ChangeLog:
* config-ml.in: Fix spelling in comments.
opcodes/ChangeLog:
* opcodes/cgen-asm.in: Fix spelling in comments.
* opcodes/cgen-dis.in: Fix spelling in comments.
readline/ChangeLog:
* readline/examples/rlfe/config.h.in: Fix spelling in
comments.
sim/m32r/ChangeLog:
* sim/m32r/mloop2.in: Fix spelling in comments.
* sim/m32r/mloopx.in: Fix spelling in comments.
---
config-ml.in | 2 +-
opcodes/cgen-asm.in | 2 +-
opcodes/cgen-dis.in | 2 +-
readline/examples/rlfe/config.h.in | 2 +-
sim/m32r/mloop2.in | 2 +-
sim/m32r/mloopx.in | 2 +-
6 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/config-ml.in b/config-ml.in
index 5e51994..67d3c05 100644
--- a/config-ml.in
+++ b/config-ml.in
@@ -51,7 +51,7 @@
# To implement this, a symlink tree is built for each library and for each
# multilib subdir.
#
-# The build tree is layed out as
+# The build tree is laid out as
#
# ./
# newlib
diff --git a/opcodes/cgen-asm.in b/opcodes/cgen-asm.in
index e468e7a..015b1b8 100644
--- a/opcodes/cgen-asm.in
+++ b/opcodes/cgen-asm.in
@@ -314,7 +314,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/cgen-dis.in b/opcodes/cgen-dis.in
index bcfcc69..da86366 100644
--- a/opcodes/cgen-dis.in
+++ b/opcodes/cgen-dis.in
@@ -298,7 +298,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/readline/examples/rlfe/config.h.in b/readline/examples/rlfe/config.h.in
index dbfc369..5dbda05 100644
--- a/readline/examples/rlfe/config.h.in
+++ b/readline/examples/rlfe/config.h.in
@@ -242,7 +242,7 @@
#undef NAMEDPIPE
/*
- * Define this if your system exits select() immediatly if a pipe is
+ * Define this if your system exits select() immediately if a pipe is
* opened read-only and no writer has opened it.
*/
#undef BROKEN_PIPE
diff --git a/sim/m32r/mloop2.in b/sim/m32r/mloop2.in
index 8324297..5be87c8 100644
--- a/sim/m32r/mloop2.in
+++ b/sim/m32r/mloop2.in
@@ -107,7 +107,7 @@ emit_parallel (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn,
with the first insn. */
/* ??? Revisit to handle exceptions right. */
- /* FIXME: No need to handle this parallely if second is nop. */
+ /* FIXME: No need to handle this parallelly if second is nop. */
id = emit_16 (current_cpu, pc, insn >> 16, sc, fast_p, 1);
/* Note that this can never be a cti. No cti's go in the S pipeline. */
diff --git a/sim/m32r/mloopx.in b/sim/m32r/mloopx.in
index c665078..0ce5e66 100644
--- a/sim/m32r/mloopx.in
+++ b/sim/m32r/mloopx.in
@@ -107,7 +107,7 @@ emit_parallel (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn,
with the first insn. */
/* ??? Revisit to handle exceptions right. */
- /* FIXME: No need to handle this parallely if second is nop. */
+ /* FIXME: No need to handle this parallelly if second is nop. */
id = emit_16 (current_cpu, pc, insn >> 16, sc, fast_p, 1);
/* Note that this can never be a cti. No cti's go in the S pipeline. */
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 10/23] Fix spelling mistakes in comments in Expect scripts
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
` (17 preceding siblings ...)
2016-11-20 17:41 ` [PATCH 13/23] Fix spelling mistakes in comments in .def files Ambrogino Modigliani
@ 2016-11-20 17:41 ` Ambrogino Modigliani
2016-11-21 22:23 ` Yao Qi
2016-11-20 17:41 ` [PATCH 11/23] Fix spelling mistakes in comments in XML files Ambrogino Modigliani
` (3 subsequent siblings)
22 siblings, 1 reply; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:41 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
gas/testsuite/ChangeLog:
* gas/testsuite/gas/all/gas.exp: Fix spelling in comments.
* gas/testsuite/gas/cris/cris.exp: Fix spelling in comments.
* gas/testsuite/gas/hppa/basic/basic.exp: Fix spelling in comments.
* gas/testsuite/gas/hppa/parse/parse.exp: Fix spelling in comments.
* gas/testsuite/gas/hppa/reloc/reloc.exp: Fix spelling in comments.
* gas/testsuite/gas/sh/arch/arch.exp: Fix spelling in comments.
* gas/testsuite/gas/tic4x/tic4x.exp: Fix spelling in comments.
gdb/testsuite/ChangeLog:
* gdb/testsuite/gdb.ada/exec_changed.exp: Fix spelling in comments.
* gdb/testsuite/gdb.arch/e500-prologue.exp: Fix spelling in comments.
* gdb/testsuite/gdb.arch/i386-mpx.exp: Fix spelling in comments.
* gdb/testsuite/gdb.arch/powerpc-aix-prologue.exp: Fix spelling in
comments.
* gdb/testsuite/gdb.base/bigcore.exp: Fix spelling in comments.
* gdb/testsuite/gdb.base/call-sc.exp: Fix spelling in comments.
* gdb/testsuite/gdb.base/dbx.exp: Fix spelling in comments.
* gdb/testsuite/gdb.base/default.exp: Fix spelling in comments.
* gdb/testsuite/gdb.base/double-prompt-target-event-error.exp: Fix
spelling in comments.
* gdb/testsuite/gdb.base/exitsignal.exp: Fix spelling in comments.
* gdb/testsuite/gdb.base/gdb11531.exp: Fix spelling in comments.
* gdb/testsuite/gdb.base/gnu-ifunc.exp: Fix spelling in comments.
* gdb/testsuite/gdb.base/gnu_vector.exp: Fix spelling in comments.
* gdb/testsuite/gdb.base/lineinc.exp: Fix spelling in comments.
* gdb/testsuite/gdb.base/killed-outside.exp: Fix spelling in comments.
* gdb/testsuite/gdb.base/overlays.exp: Fix spelling in comments.
* gdb/testsuite/gdb.base/remote.exp: Fix spelling in comments.
* gdb/testsuite/gdb.base/savedregs.exp: Fix spelling in comments.
* gdb/testsuite/gdb.base/scope.exp: Fix spelling in comments.
* gdb/testsuite/gdb.base/sigbpt.exp: Fix spelling in comments.
* gdb/testsuite/gdb.base/signals.exp: Fix spelling in comments.
* gdb/testsuite/gdb.base/signull.exp: Fix spelling in comments.
* gdb/testsuite/gdb.base/store.exp: Fix spelling in comments.
* gdb/testsuite/gdb.base/structs.exp: Fix spelling in comments.
* gdb/testsuite/gdb.base/watchpoint-stops-at-right-insn.exp: Fix
spelling in comments.
* gdb/testsuite/gdb.cell/mem-access.exp: Fix spelling in comments.
* gdb/testsuite/gdb.cp/rtti.exp: Fix spelling in comments.
* gdb/testsuite/gdb.cp/static-print-quit.exp: Fix spelling in
comments.
* gdb/testsuite/gdb.cp/virtfunc.exp: Fix spelling in comments.
* gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp: Fix spelling in
comments.
* gdb/testsuite/gdb.fortran/types.exp: Fix spelling in comments.
* gdb/testsuite/gdb.fortran/vla-value-sub-arbitrary.exp: Fix spelling
in comments.
* gdb/testsuite/gdb.go/integers.exp: Fix spelling in comments.
* gdb/testsuite/gdb.mi/mi-breakpoint-changed.exp: Fix spelling in
comments.
* gdb/testsuite/gdb.multi/multi-arch-exec.exp: Fix spelling in
comments.
* gdb/testsuite/gdb.pascal/floats.exp: Fix spelling in comments.
* gdb/testsuite/gdb.pascal/integers.exp: Fix spelling in comments.
* gdb/testsuite/gdb.pascal/types.exp: Fix spelling in comments.
* gdb/testsuite/gdb.reverse/step-precsave.exp: Fix spelling in
comments.
* gdb/testsuite/gdb.reverse/step-reverse.exp: Fix spelling in
comments.
* gdb/testsuite/gdb.threads/thread_check.exp: Fix spelling in
comments.
* gdb/testsuite/gdb.trace/collection.exp: Fix spelling in comments.
* gdb/testsuite/gdb.trace/mi-tracepoint-changed.exp: Fix spelling in
comments.
* gdb/testsuite/lib/gdb.exp: Fix spelling in comments.
* gdb/testsuite/lib/prelink-support.exp: Fix spelling in comments.
ld/testsuite/ChangeLog:
* ld/testsuite/ld-sh/arch/arch.exp: Fix spelling in comments.
* ld/testsuite/ld-sh/rd-sh.exp: Fix spelling in comments.
* ld/testsuite/ld-sh/sh64/rd-sh64.exp: Fix spelling in comments.
* ld/testsuite/ld-undefined/undefined.exp: Fix spelling in comments.
---
gas/testsuite/gas/all/gas.exp | 4 ++--
gas/testsuite/gas/cris/cris.exp | 2 +-
gas/testsuite/gas/hppa/basic/basic.exp | 2 +-
gas/testsuite/gas/hppa/parse/parse.exp | 2 +-
gas/testsuite/gas/hppa/reloc/reloc.exp | 2 +-
gas/testsuite/gas/sh/arch/arch.exp | 2 +-
gas/testsuite/gas/tic4x/tic4x.exp | 8 ++++----
gdb/testsuite/gdb.ada/exec_changed.exp | 2 +-
gdb/testsuite/gdb.arch/e500-prologue.exp | 2 +-
gdb/testsuite/gdb.arch/i386-mpx.exp | 2 +-
gdb/testsuite/gdb.arch/powerpc-aix-prologue.exp | 2 +-
gdb/testsuite/gdb.base/bigcore.exp | 2 +-
gdb/testsuite/gdb.base/call-sc.exp | 6 +++---
gdb/testsuite/gdb.base/dbx.exp | 2 +-
gdb/testsuite/gdb.base/default.exp | 2 +-
gdb/testsuite/gdb.base/double-prompt-target-event-error.exp | 4 ++--
gdb/testsuite/gdb.base/exitsignal.exp | 2 +-
gdb/testsuite/gdb.base/gdb11531.exp | 2 +-
gdb/testsuite/gdb.base/gnu-ifunc.exp | 2 +-
gdb/testsuite/gdb.base/gnu_vector.exp | 2 +-
gdb/testsuite/gdb.base/killed-outside.exp | 2 +-
gdb/testsuite/gdb.base/lineinc.exp | 2 +-
gdb/testsuite/gdb.base/overlays.exp | 2 +-
gdb/testsuite/gdb.base/remote.exp | 6 +++---
gdb/testsuite/gdb.base/savedregs.exp | 2 +-
gdb/testsuite/gdb.base/scope.exp | 2 +-
gdb/testsuite/gdb.base/sigbpt.exp | 2 +-
gdb/testsuite/gdb.base/signals.exp | 2 +-
gdb/testsuite/gdb.base/signull.exp | 2 +-
gdb/testsuite/gdb.base/store.exp | 2 +-
gdb/testsuite/gdb.base/structs.exp | 6 +++---
gdb/testsuite/gdb.base/watchpoint-stops-at-right-insn.exp | 2 +-
gdb/testsuite/gdb.cell/mem-access.exp | 6 +++---
gdb/testsuite/gdb.cp/rtti.exp | 2 +-
gdb/testsuite/gdb.cp/static-print-quit.exp | 2 +-
gdb/testsuite/gdb.cp/virtfunc.exp | 2 +-
gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp | 2 +-
gdb/testsuite/gdb.fortran/types.exp | 2 +-
gdb/testsuite/gdb.fortran/vla-value-sub-arbitrary.exp | 2 +-
gdb/testsuite/gdb.go/integers.exp | 2 +-
gdb/testsuite/gdb.mi/mi-breakpoint-changed.exp | 2 +-
gdb/testsuite/gdb.multi/multi-arch-exec.exp | 2 +-
gdb/testsuite/gdb.pascal/floats.exp | 2 +-
gdb/testsuite/gdb.pascal/integers.exp | 2 +-
gdb/testsuite/gdb.pascal/types.exp | 2 +-
gdb/testsuite/gdb.reverse/step-precsave.exp | 8 ++++----
gdb/testsuite/gdb.reverse/step-reverse.exp | 8 ++++----
gdb/testsuite/gdb.threads/thread_check.exp | 2 +-
gdb/testsuite/gdb.trace/collection.exp | 4 ++--
gdb/testsuite/gdb.trace/mi-tracepoint-changed.exp | 2 +-
gdb/testsuite/lib/gdb.exp | 8 ++++----
gdb/testsuite/lib/prelink-support.exp | 4 ++--
ld/testsuite/ld-sh/arch/arch.exp | 2 +-
ld/testsuite/ld-sh/rd-sh.exp | 2 +-
ld/testsuite/ld-sh/sh64/rd-sh64.exp | 2 +-
ld/testsuite/ld-undefined/undefined.exp | 2 +-
56 files changed, 80 insertions(+), 80 deletions(-)
diff --git a/gas/testsuite/gas/all/gas.exp b/gas/testsuite/gas/all/gas.exp
index eb225fc..c9577e2 100644
--- a/gas/testsuite/gas/all/gas.exp
+++ b/gas/testsuite/gas/all/gas.exp
@@ -247,7 +247,7 @@ proc do_930509a {} {
set x 0
gas_start "x930509.s" "-al"
while 1 {
-# We need to accomodate both byte orders here.
+# We need to accommodate both byte orders here.
# If ".long" means an 8-byte value on some target someday, this test will have
# to be fixed.
expect {
@@ -311,7 +311,7 @@ case $target_triplet in {
# character (it is allowed to be a line comment character).
if [string match "" [lindex [gas_run excl.s "-o /dev/null" ""] 0]] {
run_dump_test altmac2
- # Similarly this test does not work when ! is a line seperator.
+ # Similarly this test does not work when ! is a line separator.
run_dump_test eval
}
}
diff --git a/gas/testsuite/gas/cris/cris.exp b/gas/testsuite/gas/cris/cris.exp
index 02dc358..7894542 100644
--- a/gas/testsuite/gas/cris/cris.exp
+++ b/gas/testsuite/gas/cris/cris.exp
@@ -60,7 +60,7 @@ proc test_template_insn_reg_mem { args } {
}
# Any extra replacements (like modifying the test name to something
- # else than the @OC@ modification). Replaces occurences of @OR@.
+ # else than the @OC@ modification). Replaces occurrences of @OR@.
if { [llength $args] >= 11 } then {
set extra_OR_replace [lindex $args 10]
} else {
diff --git a/gas/testsuite/gas/hppa/basic/basic.exp b/gas/testsuite/gas/hppa/basic/basic.exp
index de85e88..94ecef3 100644
--- a/gas/testsuite/gas/hppa/basic/basic.exp
+++ b/gas/testsuite/gas/hppa/basic/basic.exp
@@ -17,7 +17,7 @@
# Please email any bugs, comments, and/or additions to this file to:
# dejagnu@gnu.org
-# Written by the Center for Software Science at the Univeristy of Utah
+# Written by the Center for Software Science at the University of Utah
# and by Cygnus Support.
proc do_imem {} {
diff --git a/gas/testsuite/gas/hppa/parse/parse.exp b/gas/testsuite/gas/hppa/parse/parse.exp
index 8168def..eaf2595 100644
--- a/gas/testsuite/gas/hppa/parse/parse.exp
+++ b/gas/testsuite/gas/hppa/parse/parse.exp
@@ -192,7 +192,7 @@ if [istarget hppa*-*-*] then {
setup_xfail "hppa*-*-*elf*" "hppa*-*-linux*" "hppa*64*-*-*"
gas_test "ssbug.s" "" "" "Check for acceptance of non-default subspaces"
- # To be compatable with certain "features" of the HP compiler
+ # To be compatible with certain "features" of the HP compiler
# non-existant registers should default to %r0.
gas_test "defbug.s" "" "" "Missing register should default to %%r0"
diff --git a/gas/testsuite/gas/hppa/reloc/reloc.exp b/gas/testsuite/gas/hppa/reloc/reloc.exp
index ccb88a3..8edfa8b 100644
--- a/gas/testsuite/gas/hppa/reloc/reloc.exp
+++ b/gas/testsuite/gas/hppa/reloc/reloc.exp
@@ -657,7 +657,7 @@ if [istarget hppa*-*-*] then {
# Make sure we put the right relocation entry on a BLE instruction.
do_ble_relocation_test
- # Make sure relocation reductions are not too agressive about
+ # Make sure relocation reductions are not too aggressive about
# adjusting relocations against some symbols.
do_relocation_reduction_tests
diff --git a/gas/testsuite/gas/sh/arch/arch.exp b/gas/testsuite/gas/sh/arch/arch.exp
index 9c79ebb..d79c2d0 100644
--- a/gas/testsuite/gas/sh/arch/arch.exp
+++ b/gas/testsuite/gas/sh/arch/arch.exp
@@ -100,7 +100,7 @@ proc test_arch { file opt arch resultfile } {
}
-# This procedure tests that a file that is not suposed to assemble
+# This procedure tests that a file that is not supposed to assemble
# with a given option does, in fact, not assemble.
# It also writes an entry to the arch_results.txt file.
diff --git a/gas/testsuite/gas/tic4x/tic4x.exp b/gas/testsuite/gas/tic4x/tic4x.exp
index ab37dd8..9f2d22c 100644
--- a/gas/testsuite/gas/tic4x/tic4x.exp
+++ b/gas/testsuite/gas/tic4x/tic4x.exp
@@ -23,7 +23,7 @@ proc do_930509a_tic4x {} {
set x 0
gas_start "../all/x930509.s" "-al"
while 1 {
-# We need to accomodate both byte orders here.
+# We need to accommodate both byte orders here.
# If ".long" means an 8-byte value on some target someday, this test will have
# to be fixed.
expect {
@@ -53,7 +53,7 @@ if [istarget *c4x*-*-*] then {
run_dump_test "registers_c3x"
run_dump_test "registers_c4x"
- # Make sure the c4x registers dont work on c3x
+ # Make sure the c4x registers don't work on c3x
gas_test_error "registers.s" "-m30 --defsym TEST_C4X=1" "c4x register usage in c3x"
# Test data storage
@@ -66,7 +66,7 @@ if [istarget *c4x*-*-*] then {
run_dump_test "addressing_c3x"
run_dump_test "addressing_c4x"
- # Make sure the c4x addressing dont work on c3x
+ # Make sure the c4x addressing don't work on c3x
gas_test_error "addressing.s" "-m30 --defsym TEST_C4X=1" "c4x addressing usage in c3x"
# Test float instructions
@@ -74,7 +74,7 @@ if [istarget *c4x*-*-*] then {
run_dump_test "opcodes_c4x"
run_dump_test "opcodes_new"
- # Make sure the c4x ops dont work on c3x
+ # Make sure the c4x ops don't work on c3x
#gas_test_error "opcodes.s" "-m30 --defsym TEST_C4X=1" "c4x instruction usage in c3x"
# -- for some reason this test crashes dejagnu, hence disabled!
}
diff --git a/gdb/testsuite/gdb.ada/exec_changed.exp b/gdb/testsuite/gdb.ada/exec_changed.exp
index a574cd5..06e1c2a 100644
--- a/gdb/testsuite/gdb.ada/exec_changed.exp
+++ b/gdb/testsuite/gdb.ada/exec_changed.exp
@@ -85,7 +85,7 @@ if { [gdb_start_cmd] < 0 } {
clean_restart "${binfile}$EXEEXT"
-# Ensure we don't accidently use the main symbol cache.
+# Ensure we don't accidentally use the main symbol cache.
gdb_test_no_output "mt set symbol-cache-size 0"
# Put something in the symbol lookup cache that will get looked up when
diff --git a/gdb/testsuite/gdb.arch/e500-prologue.exp b/gdb/testsuite/gdb.arch/e500-prologue.exp
index 3019b3e..7084ea1 100644
--- a/gdb/testsuite/gdb.arch/e500-prologue.exp
+++ b/gdb/testsuite/gdb.arch/e500-prologue.exp
@@ -60,7 +60,7 @@ proc insert_breakpoint {function expected_location} {
# If we managed to get the breakpoing address, then check that
# we inserted it at the expected location by examining the
# instruction at that address (we're not interested in the insn
- # itself, but rather at the address printed at the begining of
+ # itself, but rather at the address printed at the beginning of
# the instruction).
if { $address != "" } then {
gdb_test "x /i $address" \
diff --git a/gdb/testsuite/gdb.arch/i386-mpx.exp b/gdb/testsuite/gdb.arch/i386-mpx.exp
index 7f4727e..a0610b1 100644
--- a/gdb/testsuite/gdb.arch/i386-mpx.exp
+++ b/gdb/testsuite/gdb.arch/i386-mpx.exp
@@ -138,7 +138,7 @@ gdb_test "print /x \$bnd0raw" "$test_string" "bnd0raw after setting full bnd0"
gdb_test "print \$bndstatus.status.error" "= 2" "bndstatus error is 2\
after a failure on allocating an entry"
-# Going to test the python extension for lenght.
+# Going to test the python extension for length.
if { [skip_python_tests] } { continue }
# Verify if size is right
set test_string ".*\\\: size 17.*"
diff --git a/gdb/testsuite/gdb.arch/powerpc-aix-prologue.exp b/gdb/testsuite/gdb.arch/powerpc-aix-prologue.exp
index d82c4de..e0975e4 100644
--- a/gdb/testsuite/gdb.arch/powerpc-aix-prologue.exp
+++ b/gdb/testsuite/gdb.arch/powerpc-aix-prologue.exp
@@ -60,7 +60,7 @@ proc insert_breakpoint {function expected_location} {
# If we managed to get the breakpoing address, then check that
# we inserted it at the expected location by examining the
# instruction at that address (we're not interested in the insn
- # itself, but rather at the address printed at the begining of
+ # itself, but rather at the address printed at the beginning of
# the instruction).
if { $address != "" } then {
gdb_test "x /i $address" \
diff --git a/gdb/testsuite/gdb.base/bigcore.exp b/gdb/testsuite/gdb.base/bigcore.exp
index ae00d0a..441b2ef 100644
--- a/gdb/testsuite/gdb.base/bigcore.exp
+++ b/gdb/testsuite/gdb.base/bigcore.exp
@@ -28,7 +28,7 @@ if ![isnative] then {
# Can the system run this test (in particular support sparse
# corefiles)? On systems that lack sparse corefile support this test
# consumes too many resources - gigabytes worth of disk space and
-# I/O bandwith.
+# I/O bandwidth.
if { [istarget "*-*-*bsd*"]
|| [istarget "*-*-solaris*"]
diff --git a/gdb/testsuite/gdb.base/call-sc.exp b/gdb/testsuite/gdb.base/call-sc.exp
index 89065e1..28ed6bd 100644
--- a/gdb/testsuite/gdb.base/call-sc.exp
+++ b/gdb/testsuite/gdb.base/call-sc.exp
@@ -177,7 +177,7 @@ proc test_scalar_returns { } {
# Check that "return" works.
# GDB must always force the return of a function that has
- # a struct result. Dependant on the ABI, it may, or may not be
+ # a struct result. Dependent on the ABI, it may, or may not be
# possible to store the return value in a register.
# The relevant code looks like "L{n} = fun{n}()". The test forces
@@ -202,7 +202,7 @@ proc test_scalar_returns { } {
# known, both failed to print a final "source and line" and misplaced
# the frame ("No frame").
- # The test is writen so that it only reports one FAIL/PASS for the
+ # The test is written so that it only reports one FAIL/PASS for the
# entire operation. The value returned is checked further down.
# "return_value_unknown", if non-empty, records why GDB realised
# that it didn't know where the return value was.
@@ -291,7 +291,7 @@ proc test_scalar_returns { } {
}
-re ".*${gdb_prompt} $" {
if $return_value_unimplemented {
- # What a suprize. The architecture hasn't implemented
+ # What a surprise. The architecture hasn't implemented
# return_value, and hence has to fail.
kfail "$test" gdb/1444
} else {
diff --git a/gdb/testsuite/gdb.base/dbx.exp b/gdb/testsuite/gdb.base/dbx.exp
index 3d18d6f..e9f3a4d 100644
--- a/gdb/testsuite/gdb.base/dbx.exp
+++ b/gdb/testsuite/gdb.base/dbx.exp
@@ -129,7 +129,7 @@ proc dbx_reinitialize_dir { subdir } {
# as a side effect of running a particular test (in this case,
# "testsuite/gdb.compat/dbx.exp").
#
-# CM: Renamed the procedure so it does not override the orginal file name.
+# CM: Renamed the procedure so it does not override the original file name.
# Having the test suite change behavior depending on the tests run makes
# it extremely difficult to reproduce errors. I've also added a
# "dbx_gdb_load" procedure. This and only this test will call these
diff --git a/gdb/testsuite/gdb.base/default.exp b/gdb/testsuite/gdb.base/default.exp
index b8a449b..5edfb2a 100644
--- a/gdb/testsuite/gdb.base/default.exp
+++ b/gdb/testsuite/gdb.base/default.exp
@@ -455,7 +455,7 @@ gdb_test "rbreak" "rbreak"
gdb_test "restore" "You can't do that without a process to debug\."
#test return
-# The middle case accomodated the obsolete a29k, where doing the "ni"
+# The middle case accommodated the obsolete a29k, where doing the "ni"
# above causes an initial stack to be created.
gdb_test "return" "No selected frame..*" "return" "Make .* return now.*y or n. $" "y"
diff --git a/gdb/testsuite/gdb.base/double-prompt-target-event-error.exp b/gdb/testsuite/gdb.base/double-prompt-target-event-error.exp
index ebf2231..229f8ee 100644
--- a/gdb/testsuite/gdb.base/double-prompt-target-event-error.exp
+++ b/gdb/testsuite/gdb.base/double-prompt-target-event-error.exp
@@ -54,7 +54,7 @@ proc cancel_pagination_in_target_event { command } {
if { $command == "wrapcont" } {
gdb_test_multiple "define wrapcont" "define user command: wrapcont" {
-re "Type commands for definition of \"wrapcont\".\r\nEnd with a line saying just \"end\".\r\n>$" {
- # Note that "Continuing." is ommitted when
+ # Note that "Continuing." is omitted when
# "continue" is issued from a user-defined
# command. Issue it ourselves.
gdb_test "echo Continuing\.\ncontinue\nend" "" \
@@ -98,7 +98,7 @@ proc cancel_pagination_in_target_event { command } {
}
# We should only see one prompt more, and it should be
- # preceeded by print's output.
+ # preceded by print's output.
set test "no double prompt"
gdb_test_multiple "" $test {
-re "$gdb_prompt.*$gdb_prompt $" {
diff --git a/gdb/testsuite/gdb.base/exitsignal.exp b/gdb/testsuite/gdb.base/exitsignal.exp
index d7027d3..d4149a2 100644
--- a/gdb/testsuite/gdb.base/exitsignal.exp
+++ b/gdb/testsuite/gdb.base/exitsignal.exp
@@ -17,7 +17,7 @@
# purpose of this checking is to ensure that the variables are
# mutually exclusive, i.e., that when $_exitsignal is set, $_exitcode
# is not, and vice-versa. This mutual exclusion happens because if an
-# inferior exited (either successfuly or not), it certainly was not
+# inferior exited (either successfully or not), it certainly was not
# killed by a signal. However, if it was killed by an uncaught
# signal, then there is no way for it to have exited.
diff --git a/gdb/testsuite/gdb.base/gdb11531.exp b/gdb/testsuite/gdb.base/gdb11531.exp
index 3ed5a0b..fa2d1b5 100644
--- a/gdb/testsuite/gdb.base/gdb11531.exp
+++ b/gdb/testsuite/gdb.base/gdb11531.exp
@@ -40,7 +40,7 @@ if { ![runto main] } then {
# watched (myrec.x) gets updated. This is the instruction where we
# expect to receive a watchpoint notification when we do the "stepi"
# below. However, having the breakpoint at the same location as this
-# intruction can possibly interfere with our testcase, as stepping
+# instruction can possibly interfere with our testcase, as stepping
# over the breakpoint in order to get past it may incorrectly lead
# to the debugger missing the watchpoint hit. This would be a bug
# in GDB, but this is not the bug that we are trying to test here.
diff --git a/gdb/testsuite/gdb.base/gnu-ifunc.exp b/gdb/testsuite/gdb.base/gnu-ifunc.exp
index 3b2775b..a430817 100644
--- a/gdb/testsuite/gdb.base/gnu-ifunc.exp
+++ b/gdb/testsuite/gdb.base/gnu-ifunc.exp
@@ -66,7 +66,7 @@ if ![runto_main] then {
return 1
}
-# The "if" condition is artifical to test regression of a former patch.
+# The "if" condition is artificial to test regression of a former patch.
gdb_breakpoint "[gdb_get_line_number "break-at-nextcall"] if i && gnu_ifunc (i) != 42"
gdb_breakpoint [gdb_get_line_number "break-at-call"]
diff --git a/gdb/testsuite/gdb.base/gnu_vector.exp b/gdb/testsuite/gdb.base/gnu_vector.exp
index aafaedd..fe76933 100644
--- a/gdb/testsuite/gdb.base/gnu_vector.exp
+++ b/gdb/testsuite/gdb.base/gnu_vector.exp
@@ -47,7 +47,7 @@ if { ![runto main] } {
return -1
}
-# Get endianess for the scalar->vector casts
+# Get endianness for the scalar->vector casts
gdb_test_multiple "show endian" "show endian" {
-re ".* (big|little) endian.*$gdb_prompt $" {
set endian $expect_out(1,string)
diff --git a/gdb/testsuite/gdb.base/killed-outside.exp b/gdb/testsuite/gdb.base/killed-outside.exp
index 2720052..6ab2886 100644
--- a/gdb/testsuite/gdb.base/killed-outside.exp
+++ b/gdb/testsuite/gdb.base/killed-outside.exp
@@ -102,7 +102,7 @@ with_test_prefix "continue" {
}
}
-# Try stepping the program. Stepping may go through diferent code
+# Try stepping the program. Stepping may go through different code
# paths in the target backends.
with_test_prefix "stepi" {
test {
diff --git a/gdb/testsuite/gdb.base/lineinc.exp b/gdb/testsuite/gdb.base/lineinc.exp
index 4070f4e..5e7ca0d 100644
--- a/gdb/testsuite/gdb.base/lineinc.exp
+++ b/gdb/testsuite/gdb.base/lineinc.exp
@@ -70,7 +70,7 @@
# #included by a given source file in a list sorted by the line at
# which they were #included; this gives GDB the chance to detect
# multiple #inclusions at the same line, complain, and assign
-# distinct, albiet incorrect, line numbers to each #inclusion.
+# distinct, albeit incorrect, line numbers to each #inclusion.
#
# However, at one point GDB was sorting the list in reverse order,
# while the code to assign new, distinct line numbers assumed it was
diff --git a/gdb/testsuite/gdb.base/overlays.exp b/gdb/testsuite/gdb.base/overlays.exp
index cf4213a..dd92351 100644
--- a/gdb/testsuite/gdb.base/overlays.exp
+++ b/gdb/testsuite/gdb.base/overlays.exp
@@ -163,7 +163,7 @@ if $data_overlays then {
}
# Verify that early-mapped overlays have been bumped out
-# by later-mapped overlays layed over in the same VMA range.
+# by later-mapped overlays laid over in the same VMA range.
send_gdb "overlay list\n"
gdb_expect {
diff --git a/gdb/testsuite/gdb.base/remote.exp b/gdb/testsuite/gdb.base/remote.exp
index a3c34eb..6d03fd2 100644
--- a/gdb/testsuite/gdb.base/remote.exp
+++ b/gdb/testsuite/gdb.base/remote.exp
@@ -32,7 +32,7 @@ if {$result != "" } then {
#
-# Part ONE: Check the down load commands
+# Part ONE: Check the download commands
#
gdb_test "show remote memory-write-packet-size" \
@@ -54,7 +54,7 @@ gdb_test "show remote memory-write-packet-size" \
"set write-packet - very-small"
#
-# Part TWO: Check the download behavour
+# Part TWO: Check the download behaviour
#
proc gdb_load_timed {executable class writesize} {
@@ -124,7 +124,7 @@ gdb_load_timed $binfile "limit" 0
set sizeof_random_data [get_sizeof "random_data" 48*1024]
#
-# Part THREE: Check the upload behavour
+# Part THREE: Check the upload behaviour
#
if ![runto_main] then {
fail "Cannot run to main"
diff --git a/gdb/testsuite/gdb.base/savedregs.exp b/gdb/testsuite/gdb.base/savedregs.exp
index eea30d1..cab5ec1 100644
--- a/gdb/testsuite/gdb.base/savedregs.exp
+++ b/gdb/testsuite/gdb.base/savedregs.exp
@@ -60,7 +60,7 @@ proc process_saved_regs { current inner outer } {
# and for dummy frames won't have saved registers. If there's a
# problem, fail but capture the output anyway, hopefully later
# "info frame" requests for that same frame will at least fail in
- # a consistent manner (stops propogated fails).
+ # a consistent manner (stops propagated fails).
foreach func $inner {
set saved_regs($func) "error"
diff --git a/gdb/testsuite/gdb.base/scope.exp b/gdb/testsuite/gdb.base/scope.exp
index 37d0657..5f2d960 100644
--- a/gdb/testsuite/gdb.base/scope.exp
+++ b/gdb/testsuite/gdb.base/scope.exp
@@ -511,7 +511,7 @@ gdb_test "print 'scope0.c'::filelocal_ro" "= 201"
# For PA boards using monitor/remote-pa.c, the bss test is going to
# randomly fail. We've already put remote-pa on the target stack,
# so we actually read memory from the board. Problem is crt0.o
-# is responsible for clearing bss and that hasnt' happened yet.
+# is responsible for clearing bss and that hasn't happened yet.
#
# This is a problem for all non-native targets. -- manson
if [is_remote target] {
diff --git a/gdb/testsuite/gdb.base/sigbpt.exp b/gdb/testsuite/gdb.base/sigbpt.exp
index d291c97..8a1c638 100644
--- a/gdb/testsuite/gdb.base/sigbpt.exp
+++ b/gdb/testsuite/gdb.base/sigbpt.exp
@@ -22,7 +22,7 @@
# This test is known to tickle the following problems: kernel letting
# the inferior execute both the system call, and the instruction
# following, when single-stepping a system call; kernel failing to
-# propogate the single-step state when single-stepping the sigreturn
+# propagate the single-step state when single-stepping the sigreturn
# system call, instead resuming the inferior at full speed; GDB
# doesn't know how to software single-step across a sigreturn
# instruction. Since the kernel problems can be "fixed" using
diff --git a/gdb/testsuite/gdb.base/signals.exp b/gdb/testsuite/gdb.base/signals.exp
index 677e77f..2c616bb 100644
--- a/gdb/testsuite/gdb.base/signals.exp
+++ b/gdb/testsuite/gdb.base/signals.exp
@@ -114,7 +114,7 @@ if [runto_main] then {
"next to ++count #2"
sleep 2
- # ...call the function, which is immediatly interrupted
+ # ...call the function, which is immediately interrupted
gdb_test "p func1 ()" \
"Breakpoint \[0-9\]*, handler.*
diff --git a/gdb/testsuite/gdb.base/signull.exp b/gdb/testsuite/gdb.base/signull.exp
index a10c83e..c283167 100644
--- a/gdb/testsuite/gdb.base/signull.exp
+++ b/gdb/testsuite/gdb.base/signull.exp
@@ -93,7 +93,7 @@ gdb_test "break keeper"
gdb_test "handle SIGSEGV" "SIGSEGV.*Yes.*Yes.*Yes.*Segmentation fault"
gdb_test "handle SIGBUS" "SIGBUS.*Yes.*Yes.*Yes.*Bus error"
-# For the given signal type, check that: the SIGSEGV occures; a
+# For the given signal type, check that: the SIGSEGV occurs; a
# backtrace from the SEGV works; the sigsegv is delivered; a backtrace
# through the SEGV works.
diff --git a/gdb/testsuite/gdb.base/store.exp b/gdb/testsuite/gdb.base/store.exp
index fed5c8a..895c321 100644
--- a/gdb/testsuite/gdb.base/store.exp
+++ b/gdb/testsuite/gdb.base/store.exp
@@ -156,7 +156,7 @@ proc check_field { t } {
gdb_test "continue" "register struct f_${t} u = f_${t};" \
"continue field ${t}"
- # Match either the return statement, or the line immediatly after
+ # Match either the return statement, or the line immediately after
# it. The compiler can end up merging the return statement into
# the return instruction.
gdb_test "next" "(return u;|\})" "next field ${t}"
diff --git a/gdb/testsuite/gdb.base/structs.exp b/gdb/testsuite/gdb.base/structs.exp
index 4fcef52..e9f4343 100644
--- a/gdb/testsuite/gdb.base/structs.exp
+++ b/gdb/testsuite/gdb.base/structs.exp
@@ -288,7 +288,7 @@ proc test_struct_returns { n } {
# Check that "return" works.
# GDB must always force the return of a function that has
- # a struct result. Dependant on the ABI, it may, or may not be
+ # a struct result. Dependent on the ABI, it may, or may not be
# possible to store the return value in a register.
# The relevant code looks like "L{n} = fun{n}()". The test forces
@@ -313,7 +313,7 @@ proc test_struct_returns { n } {
# known, both failed to print a final "source and line" and misplaced
# the frame ("No frame").
- # The test is writen so that it only reports one FAIL/PASS for the
+ # The test is written so that it only reports one FAIL/PASS for the
# entire operation. The value returned is checked further down.
# "return_value_known", if non-zero, indicates that GDB knew where
# the return value was located.
@@ -393,7 +393,7 @@ proc test_struct_returns { n } {
}
-re ".*${gdb_prompt} $" {
if $return_value_unimplemented {
- # What a suprize. The architecture hasn't implemented
+ # What a surprise. The architecture hasn't implemented
# return_value, and hence has to fail.
kfail "$test" gdb/1444
} else {
diff --git a/gdb/testsuite/gdb.base/watchpoint-stops-at-right-insn.exp b/gdb/testsuite/gdb.base/watchpoint-stops-at-right-insn.exp
index 4d158c3..a90faf3 100644
--- a/gdb/testsuite/gdb.base/watchpoint-stops-at-right-insn.exp
+++ b/gdb/testsuite/gdb.base/watchpoint-stops-at-right-insn.exp
@@ -62,7 +62,7 @@
#
# If the target has non-continuable watchpoints, while GDB thinks it
# has continuable watchpoints, GDB will see a watchpoint trigger,
-# notice no value changed, and immediatly continue the target. Now,
+# notice no value changed, and immediately continue the target. Now,
# either the target manages to step-over the watchpoint transparently,
# and GDB thus fails to present to value change to the user, or, the
# watchpoint will keep re-triggering, with the program never making
diff --git a/gdb/testsuite/gdb.cell/mem-access.exp b/gdb/testsuite/gdb.cell/mem-access.exp
index 4ba5e48..0160004 100644
--- a/gdb/testsuite/gdb.cell/mem-access.exp
+++ b/gdb/testsuite/gdb.cell/mem-access.exp
@@ -51,7 +51,7 @@ if [get_compiler_info] {
return -1
}
-# Get the adress to symbol name. If $reg
+# Get the address to symbol name. If $reg
# is set to 1, get address from a register.
proc get_adress_from_name { name reg } {
global gdb_prompt
@@ -85,7 +85,7 @@ proc get_adress_from_name { name reg } {
return ${adr}
}
-# Try to set a $value at adress $adr.
+# Try to set a $value at address $adr.
proc set_adr_content { adr value } {
gdb_test "set *$adr=$value" \
"" \
@@ -112,7 +112,7 @@ proc test_symbol_content { symbol value } {
"(symbol) $symbol==$value"
}
-# Check VARNAME. Check if it has the inital
+# Check VARNAME. Check if it has the initial
# value INITIALVALUE. Set it to NEWVALUE.
# Check if set properly. Do it via symbols and
# pointers.
diff --git a/gdb/testsuite/gdb.cp/rtti.exp b/gdb/testsuite/gdb.cp/rtti.exp
index 4969c4b..1e7e6a0 100644
--- a/gdb/testsuite/gdb.cp/rtti.exp
+++ b/gdb/testsuite/gdb.cp/rtti.exp
@@ -76,7 +76,7 @@ gdb_test_multiple "print *e1" "print *e1" {
# NOTE: carlton/2004-01-14: This test with an "<incomplete type>"
# message because, within rtt1.cc, GDB has no way of knowing that the
-# class is called 'n2::D2' instead of just 'D2'. This is an artifical
+# class is called 'n2::D2' instead of just 'D2'. This is an artificial
# test case, though: if we were using these classes in a more
# substantial way, G++ would emit more debug info. As is, I don't
# think there's anything that GDB can do about this case until G++
diff --git a/gdb/testsuite/gdb.cp/static-print-quit.exp b/gdb/testsuite/gdb.cp/static-print-quit.exp
index 6157245..05a02dc 100644
--- a/gdb/testsuite/gdb.cp/static-print-quit.exp
+++ b/gdb/testsuite/gdb.cp/static-print-quit.exp
@@ -55,7 +55,7 @@ gdb_test_multiple "" $test {
gdb_test "q" ".*"
-# Now the obstack is uninitialized. Excercise it.
+# Now the obstack is uninitialized. Exercise it.
gdb_test_no_output "set pagination off"
gdb_test "print c" ".*" "first print"
diff --git a/gdb/testsuite/gdb.cp/virtfunc.exp b/gdb/testsuite/gdb.cp/virtfunc.exp
index 04fe5aa..daed4a1 100644
--- a/gdb/testsuite/gdb.cp/virtfunc.exp
+++ b/gdb/testsuite/gdb.cp/virtfunc.exp
@@ -197,7 +197,7 @@ proc test_virtual_calls {} {
# wrong value "202"
# gcc 2.95.3 -gdwarf-2
# gcc 2.95.3 -gstabs+
- # attempt to take addres of value not located in memory
+ # attempt to take address of value not located in memory
# gcc 3.3.2 -gdwarf-2
# gcc 3.3.2 -gstabs+
#
diff --git a/gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp b/gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp
index 3417a5c..88f5c5a 100644
--- a/gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp
+++ b/gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp
@@ -49,7 +49,7 @@ Dwarf::assemble $asm_file {
[function_range frame3 [list ${srcdir}/${subdir}/$srcfile]]
# Very simple info for this test program. We don't care about
- # this information being correct (w.r.t. funtion / argument types)
+ # this information being correct (w.r.t. function / argument types)
# just so long as the compilation using makes use of the
# .debug_ranges data then the test achieves its objective.
cu {} {
diff --git a/gdb/testsuite/gdb.fortran/types.exp b/gdb/testsuite/gdb.fortran/types.exp
index 9eb799e..e6dfb44 100644
--- a/gdb/testsuite/gdb.fortran/types.exp
+++ b/gdb/testsuite/gdb.fortran/types.exp
@@ -57,7 +57,7 @@ proc test_float_literal_types_accepted {} {
# Test various floating point formats
# this used to guess whether to look for "real*4" or
- # "real*8" based on a target config variable, but noone
+ # "real*8" based on a target config variable, but no one
# maintained it properly.
gdb_test "pt .44" "type = real\\*\[0-9\]+"
diff --git a/gdb/testsuite/gdb.fortran/vla-value-sub-arbitrary.exp b/gdb/testsuite/gdb.fortran/vla-value-sub-arbitrary.exp
index ce33d70..a808c0b 100644
--- a/gdb/testsuite/gdb.fortran/vla-value-sub-arbitrary.exp
+++ b/gdb/testsuite/gdb.fortran/vla-value-sub-arbitrary.exp
@@ -25,7 +25,7 @@ if ![runto_main] {
return -1
}
-# Check VLA with arbitary length and check that elements outside of
+# Check VLA with arbitrary length and check that elements outside of
# bounds of the passed VLA can be accessed correctly.
gdb_breakpoint [gdb_get_line_number "end-of-bar"]
gdb_continue_to_breakpoint "end-of-bar"
diff --git a/gdb/testsuite/gdb.go/integers.exp b/gdb/testsuite/gdb.go/integers.exp
index b823f5a..09e447f 100644
--- a/gdb/testsuite/gdb.go/integers.exp
+++ b/gdb/testsuite/gdb.go/integers.exp
@@ -67,7 +67,7 @@ gdb_test "print i + k" " = 4"
gdb_test "print j + k" " = 5"
gdb_test "print i + j + k" " = 6"
-# Test substraction
+# Test subtraction
gdb_test "print j - i" " = 1"
gdb_test "print i - j" "= -1"
gdb_test "print k -i -j" " = 0"
diff --git a/gdb/testsuite/gdb.mi/mi-breakpoint-changed.exp b/gdb/testsuite/gdb.mi/mi-breakpoint-changed.exp
index cda8c4a..fb76e78 100644
--- a/gdb/testsuite/gdb.mi/mi-breakpoint-changed.exp
+++ b/gdb/testsuite/gdb.mi/mi-breakpoint-changed.exp
@@ -157,7 +157,7 @@ with_test_prefix "test_insert_delete_modify" {
test_insert_delete_modify
}
-# Test 'breakpoint-modified' notification is emited when pending breakpoints are
+# Test 'breakpoint-modified' notification is emitted when pending breakpoints are
# resolved.
proc test_pending_resolved { } {
diff --git a/gdb/testsuite/gdb.multi/multi-arch-exec.exp b/gdb/testsuite/gdb.multi/multi-arch-exec.exp
index 88e5a62..c2e2314 100644
--- a/gdb/testsuite/gdb.multi/multi-arch-exec.exp
+++ b/gdb/testsuite/gdb.multi/multi-arch-exec.exp
@@ -82,6 +82,6 @@ if ![runto_main] then {
return -1
}
-# Test that GDB updates the target description / arch successfuly
+# Test that GDB updates the target description / arch successfully
# after the exec.
gdb_test "continue" "Breakpoint 1, main.*" "continue across exec that changes architecture"
diff --git a/gdb/testsuite/gdb.pascal/floats.exp b/gdb/testsuite/gdb.pascal/floats.exp
index 43065ed..3e580e0 100644
--- a/gdb/testsuite/gdb.pascal/floats.exp
+++ b/gdb/testsuite/gdb.pascal/floats.exp
@@ -91,7 +91,7 @@ gdb_test "print r + (-1)" " = 0\\.2(499.*|5|500.*)"
gdb_test "print r + (-5)" " = -3\\.7(499.*|5|500.*)"
gdb_test "print r + (-10)" " = -8\\.7(499.*|5|500.*)"
-# Test substraction
+# Test subtraction
gdb_test "print r - s" " = -0\\.9(499.*|5|500.*)"
gdb_test "print r - t" " = 4\\.4(499.*|5|500.*)"
diff --git a/gdb/testsuite/gdb.pascal/integers.exp b/gdb/testsuite/gdb.pascal/integers.exp
index ec9739c..18a66fd 100644
--- a/gdb/testsuite/gdb.pascal/integers.exp
+++ b/gdb/testsuite/gdb.pascal/integers.exp
@@ -74,7 +74,7 @@ gdb_test "print i + k" " = 4"
gdb_test "print j + k" " = 5"
gdb_test "print i + j + k" " = 6"
-# Test substraction
+# Test subtraction
gdb_test "print j - i" " = 1"
gdb_test "print i - j" "= -1"
gdb_test "print k -i -j" " = 0"
diff --git a/gdb/testsuite/gdb.pascal/types.exp b/gdb/testsuite/gdb.pascal/types.exp
index 112c612..863e3f2 100644
--- a/gdb/testsuite/gdb.pascal/types.exp
+++ b/gdb/testsuite/gdb.pascal/types.exp
@@ -59,7 +59,7 @@ proc test_float_literal_types_accepted {} {
# Test various floating point formats
# this used to guess whether to look for "real*4" or
- # "real*8" based on a target config variable, but noone
+ # "real*8" based on a target config variable, but no one
# maintained it properly.
gdb_test "pt .44" "type = double"
diff --git a/gdb/testsuite/gdb.reverse/step-precsave.exp b/gdb/testsuite/gdb.reverse/step-precsave.exp
index 92574b6..662521e 100644
--- a/gdb/testsuite/gdb.reverse/step-precsave.exp
+++ b/gdb/testsuite/gdb.reverse/step-precsave.exp
@@ -135,7 +135,7 @@ gdb_test_multiple "stepi" "$test_message" {
}
}
-# stepi thru return of a function call
+# stepi through return of a function call
set test_message "stepi back from function call"
gdb_test_multiple "stepi" "$test_message" {
@@ -167,7 +167,7 @@ gdb_test_multiple "stepi" "$test_message" {
gdb_test_no_output "set exec-dir reverse" "set reverse execution"
-# stepi backward thru return and into a function
+# stepi backward through return and into a function
set stepi_location [gdb_get_line_number "ARRIVED IN CALLEE" "$srcfile"]
set test_message "reverse stepi thru function return"
@@ -238,12 +238,12 @@ gdb_test_multiple "stepi" "$test_message" {
}
}
-# step backward into function (thru return)
+# step backward into function (through return)
gdb_test "step" "(RETURN FROM CALLEE|ARRIVED IN CALLEE).*" \
"reverse step into fn call"
-# step backward out of called function (thru call)
+# step backward out of called function (through call)
set test_message "reverse step out of called fn"
gdb_test_multiple "step" "$test_message" {
diff --git a/gdb/testsuite/gdb.reverse/step-reverse.exp b/gdb/testsuite/gdb.reverse/step-reverse.exp
index 6f1e8b6..7bcb93b 100644
--- a/gdb/testsuite/gdb.reverse/step-reverse.exp
+++ b/gdb/testsuite/gdb.reverse/step-reverse.exp
@@ -108,7 +108,7 @@ gdb_test_multiple "stepi" "$test_message" {
}
}
-# stepi thru return of a function call
+# stepi through return of a function call
set test_message "stepi back from function call"
gdb_test_multiple "stepi" "$test_message" {
@@ -140,7 +140,7 @@ gdb_test_multiple "stepi" "$test_message" {
gdb_test_no_output "set exec-dir reverse" "set reverse execution"
-# stepi backward thru return and into a function
+# stepi backward through return and into a function
set stepi_location [gdb_get_line_number "ARRIVED IN CALLEE" "$srcfile"]
set test_message "reverse stepi thru function return"
@@ -211,12 +211,12 @@ gdb_test_multiple "stepi" "$test_message" {
}
}
-# step backward into function (thru return)
+# step backward into function (through return)
gdb_test "step" "(RETURN FROM CALLEE|ARRIVED IN CALLEE).*" \
"reverse step into fn call"
-# step backward out of called function (thru call)
+# step backward out of called function (through call)
set test_message "reverse step out of called fn"
gdb_test_multiple "step" "$test_message" {
diff --git a/gdb/testsuite/gdb.threads/thread_check.exp b/gdb/testsuite/gdb.threads/thread_check.exp
index 52c6fa4..7dd7ff4 100644
--- a/gdb/testsuite/gdb.threads/thread_check.exp
+++ b/gdb/testsuite/gdb.threads/thread_check.exp
@@ -48,7 +48,7 @@ if ![runto_main] then {
#
-# set breakpoint at thread fucntion tf
+# set breakpoint at thread function tf
#
gdb_test "break tf" \
"Breakpoint.*at.* file .*$srcfile, line.*" \
diff --git a/gdb/testsuite/gdb.trace/collection.exp b/gdb/testsuite/gdb.trace/collection.exp
index f225429..8107802 100644
--- a/gdb/testsuite/gdb.trace/collection.exp
+++ b/gdb/testsuite/gdb.trace/collection.exp
@@ -163,7 +163,7 @@ proc gdb_collect_args_test { myargs msg } {
# collected. In C, an array as function parameters is a special
# case; it's just a pointer into the caller's array, and as such,
# that's what normally the debug info describes. Maybe this was
- # originaly written for a compiler where array parameters were
+ # originally written for a compiler where array parameters were
# really described as arrays in debug info.
setup_xfail "*-*-*"
@@ -249,7 +249,7 @@ proc gdb_collect_argarray_test { myargs msg } {
# collected. In C, an array as function parameters is a special
# case; it's just a pointer into the caller's array, and as such,
# that's what normally the debug info describes. Maybe this was
- # originaly written for a compiler where array parameters were
+ # originally written for a compiler where array parameters were
# really described as arrays in debug info.
setup_xfail "*-*-*"
diff --git a/gdb/testsuite/gdb.trace/mi-tracepoint-changed.exp b/gdb/testsuite/gdb.trace/mi-tracepoint-changed.exp
index a0e49af..ecde32c 100644
--- a/gdb/testsuite/gdb.trace/mi-tracepoint-changed.exp
+++ b/gdb/testsuite/gdb.trace/mi-tracepoint-changed.exp
@@ -157,7 +157,7 @@ proc test_reconnect { } {
}
}
-# Test 'breakpoint-modified' notification is emited when pending tracepoints are
+# Test 'breakpoint-modified' notification is emitted when pending tracepoints are
# resolved.
proc test_pending_resolved { } {
diff --git a/gdb/testsuite/lib/gdb.exp b/gdb/testsuite/lib/gdb.exp
index e1e9880..bab99b3 100644
--- a/gdb/testsuite/lib/gdb.exp
+++ b/gdb/testsuite/lib/gdb.exp
@@ -1015,7 +1015,7 @@ proc gdb_test { args } {
# Send a command to GDB and verify that this command generated no output.
#
# See gdb_test_multiple for a description of the COMMAND and MESSAGE
-# parameters. If MESSAGE is ommitted, then COMMAND will be used as
+# parameters. If MESSAGE is omitted, then COMMAND will be used as
# the message. (If MESSAGE is the empty string, then sometimes we do not
# call pass or fail at all; I don't understand this at all.)
@@ -1249,7 +1249,7 @@ proc gdb_test_list_exact { cmd name elm_find_regexp elm_extract_regexp result_ma
#
# Both inferior and gdb patterns must match for a PASS.
#
-# If MESSAGE is ommitted, then COMMAND will be used as the message.
+# If MESSAGE is omitted, then COMMAND will be used as the message.
#
# Returns:
# 1 if the test failed,
@@ -3512,7 +3512,7 @@ proc gdb_compile {source dest type options} {
# Force output to unbuffered mode, by linking in an object file
# with a global contructor that calls setvbuf.
#
- # Compile the special object seperatelly for two reasons:
+ # Compile the special object separately for two reasons:
# 1) Insulate it from $options.
# 2) Avoid compiling it for every gdb_compile invocation,
# which is time consuming, especially if we're remote
@@ -5553,7 +5553,7 @@ proc get_integer_valueof { exp default } {
# Retrieve the value of EXP in the inferior, as an hexadecimal value
# (using "print /x"). DEFAULT is used as fallback if print fails.
-# TEST is the test message to use. If can be ommitted, in which case
+# TEST is the test message to use. If can be omitted, in which case
# a test message is built from EXP.
proc get_hexadecimal_valueof { exp default {test ""} } {
diff --git a/gdb/testsuite/lib/prelink-support.exp b/gdb/testsuite/lib/prelink-support.exp
index 0584669..1b45278 100644
--- a/gdb/testsuite/lib/prelink-support.exp
+++ b/gdb/testsuite/lib/prelink-support.exp
@@ -70,7 +70,7 @@ proc symlink_resolve {file} {
}
# Copy SRC to DEST, resolving any symlinks in SRC. Return nonzero iff
-# the copy was succesful.
+# the copy was successful.
#
# This function is guaranteed to never raise any exception, even when the copy
# fails.
@@ -107,7 +107,7 @@ proc file_copy {src dest} {
# depend on system libraries. To properly prelink an executable, all
# of its dynamically linked libraries must be prelinked as well. If
# the executable depends on some system libraries, we may not have
-# sufficient write priviledges on these files to perform the prelink.
+# sufficient write privileges on these files to perform the prelink.
# This is why we make a copy of these shared libraries, and link the
# executable against these copies instead.
#
diff --git a/ld/testsuite/ld-sh/arch/arch.exp b/ld/testsuite/ld-sh/arch/arch.exp
index cd80beb..7065ef6 100644
--- a/ld/testsuite/ld-sh/arch/arch.exp
+++ b/ld/testsuite/ld-sh/arch/arch.exp
@@ -110,7 +110,7 @@ proc test_arch { file1 file2 arch resultfile } {
# This procedure tests that a pair of files that are not
-# suposed to link does, in fact, not link.
+# supposed to link does, in fact, not link.
# It also writes an entry to the arch_results.txt file.
proc test_arch_error { file1 file2 resultfile} {
diff --git a/ld/testsuite/ld-sh/rd-sh.exp b/ld/testsuite/ld-sh/rd-sh.exp
index 62ffe18..0ab9f43 100644
--- a/ld/testsuite/ld-sh/rd-sh.exp
+++ b/ld/testsuite/ld-sh/rd-sh.exp
@@ -58,7 +58,7 @@ foreach shtest $rd_test_list {
}
if [string match $srcdir/$subdir/*-dso.d $shtest] {
# Copy the output of the DSO-createing test to .so file.
- # Notice that a DSO-creating test must preceed the tests
+ # Notice that a DSO-creating test must precede the tests
# which need that DSO in sort-order by name.
set cmd "cp tmpdir/dump tmpdir/[file rootname [file tail $shtest]].so"
send_log "$cmd\n"
diff --git a/ld/testsuite/ld-sh/sh64/rd-sh64.exp b/ld/testsuite/ld-sh/sh64/rd-sh64.exp
index fe76df1..099f0cf 100644
--- a/ld/testsuite/ld-sh/sh64/rd-sh64.exp
+++ b/ld/testsuite/ld-sh/sh64/rd-sh64.exp
@@ -32,7 +32,7 @@ foreach sh64test $rd_test_list {
run_dump_test [file rootname $sh64test]
if [string match $srcdir/$subdir/*-dso.d $sh64test] {
# Copy the output of the DSO-createing test to .so file.
- # Notice that a DSO-creating test must preceed the tests
+ # Notice that a DSO-creating test must precede the tests
# which need that DSO in sort-order by name.
set cmd "cp tmpdir/dump \
tmpdir/[file rootname [file tail $sh64test]].so"
diff --git a/ld/testsuite/ld-undefined/undefined.exp b/ld/testsuite/ld-undefined/undefined.exp
index 8319ee0..af17f1e 100644
--- a/ld/testsuite/ld-undefined/undefined.exp
+++ b/ld/testsuite/ld-undefined/undefined.exp
@@ -109,7 +109,7 @@ set ml "undefined.c:9: undefined reference to `*this_function_is_not_defined'"
# debug sections have not yet been resolved, so the low/high addresses and the
# line number address are all set at zero. Thus when _bfd_elf_find_nearest_line()
# calls _bfd_dwarf2_find_nearest_line() no comp_unit can be found which
-# actually covers the address where the reference occured, and so
+# actually covers the address where the reference occurred, and so
# _bfd_elf_find_nearest_line() fails.
#
# The upshot of all of this, is that the error message reported by the
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 17/23] Fix spelling mistakes in comments in .inc files
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
` (8 preceding siblings ...)
2016-11-20 17:40 ` [PATCH 09/23] Fix spelling mistakes in comments in Assembler files Ambrogino Modigliani
@ 2016-11-20 17:41 ` Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 22/23] Fix spelling mistakes in comments in .tbl files Ambrogino Modigliani
` (12 subsequent siblings)
22 siblings, 0 replies; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:41 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
sim/testsuite/ChangeLog:
* sim/testsuite/sim/frv/testutils.inc: Fix spelling in comments.
* sim/testsuite/sim/h8300/testutils.inc: Fix spelling in comments.
---
sim/testsuite/sim/frv/testutils.inc | 2 +-
sim/testsuite/sim/h8300/testutils.inc | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/sim/testsuite/sim/frv/testutils.inc b/sim/testsuite/sim/frv/testutils.inc
index 8261b4f..3ff78f0 100644
--- a/sim/testsuite/sim/frv/testutils.inc
+++ b/sim/testsuite/sim/frv/testutils.inc
@@ -347,7 +347,7 @@ test_gr\@:
test_fr_iimmed \val,fr31
.endm
-; Test CPR agains an immediate value
+; Test CPR against an immediate value
.macro test_cpr_limmed valh vall reg
addi sp,-4,gr31
stc \reg,@(gr31,gr0)
diff --git a/sim/testsuite/sim/h8300/testutils.inc b/sim/testsuite/sim/h8300/testutils.inc
index 9c2c27a..63d27d4 100644
--- a/sim/testsuite/sim/h8300/testutils.inc
+++ b/sim/testsuite/sim/h8300/testutils.inc
@@ -326,7 +326,7 @@ tccr\@: .byte 0
mov.b @tccr\@, r0l
.endm
-; Test that all (accessable) condition codes are clear
+; Test that all (accessible) condition codes are clear
.macro test_cc_clear
test_carry_clear
test_ovf_clear
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 15/23] Fix spelling mistakes in comments in .igen files
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
` (12 preceding siblings ...)
2016-11-20 17:41 ` [PATCH 16/23] Fix spelling mistakes in comments in .in files Ambrogino Modigliani
@ 2016-11-20 17:41 ` Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 14/23] Fix spelling mistakes in comments in .em files Ambrogino Modigliani
` (8 subsequent siblings)
22 siblings, 0 replies; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:41 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
sim/mips/ChangeLog:
* sim/mips/m16.igen: Fix spelling in comments.
* sim/mips/mips.igen: Fix spelling in comments.
sim/v850/ChangeLog:
* sim/v850/v850.igen: Fix spelling in comments.
---
sim/mips/m16.igen | 4 ++--
sim/mips/mips.igen | 6 +++---
sim/v850/v850.igen | 4 ++--
3 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/sim/mips/m16.igen b/sim/mips/m16.igen
index 74adacd..db58184 100644
--- a/sim/mips/m16.igen
+++ b/sim/mips/m16.igen
@@ -1044,12 +1044,12 @@
return target;
}
-// compute basepc dependant on us being in a delay slot
+// compute basepc dependent on us being in a delay slot
:function:::address_word:basepc:
{
if (STATE & simDELAYSLOT)
{
- return DSPC; /* return saved address of preceeding jmp */
+ return DSPC; /* return saved address of preceding jmp */
}
else
{
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index 522cad6..99caefb 100644
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -254,9 +254,9 @@
// suggest they don't.
//
// In reality, some MIPS IV parts, such as the VR5000 and VR5400, do have
-// these restrictions, while others, like the VR5500, don't. To accomodate
+// these restrictions, while others, like the VR5500, don't. To accommodate
// such differences, the MIPS IV and MIPS V version of these helper functions
-// use auxillary routines to determine whether the restriction applies.
+// use auxiliary routines to determine whether the restriction applies.
// check_mf_cycles:
//
@@ -417,7 +417,7 @@
*micromips32:
*micromips64:
{
- /* FIXME: could record the fact that a stall occured if we want */
+ /* FIXME: could record the fact that a stall occurred if we want */
signed64 time = sim_events_time (SD);
hi->op.timestamp = time;
lo->op.timestamp = time;
diff --git a/sim/v850/v850.igen b/sim/v850/v850.igen
index 41a9075..af9b57b 100644
--- a/sim/v850/v850.igen
+++ b/sim/v850/v850.igen
@@ -1149,7 +1149,7 @@ rrrrr,111111,RRRRR + wwww,0011110,mmmm,0:XI:::mac
hi = (((op0 >> 16) & 0xFFFF) * ((op1 >> 16) & 0xFFFF));
/* We now need to add all of these results together, taking care
- to propogate the carries from the additions: */
+ to propagate the carries from the additions: */
RdLo = Add32 (lo, (mid1 << 16), & carry);
RdHi = carry;
RdLo = Add32 (RdLo, (mid2 << 16), & carry);
@@ -1214,7 +1214,7 @@ rrrrr,111111,RRRRR + wwww,0011111,mmmm,0:XI:::macu
hi = (((op0 >> 16) & 0xFFFF) * ((op1 >> 16) & 0xFFFF));
/* We now need to add all of these results together, taking care
- to propogate the carries from the additions: */
+ to propagate the carries from the additions: */
RdLo = Add32 (lo, (mid1 << 16), & carry);
RdHi = carry;
RdLo = Add32 (RdLo, (mid2 << 16), & carry);
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 21/23] Fix spelling mistakes in comments in .sc files
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
` (20 preceding siblings ...)
2016-11-20 17:41 ` [PATCH 19/23] Fix spelling mistakes in comments in .m4 files Ambrogino Modigliani
@ 2016-11-20 17:41 ` Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 18/23] Fix spelling mistakes in comments in .l files Ambrogino Modigliani
22 siblings, 0 replies; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:41 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
ld/ChangeLog:
* ld/scripttempl/ia64vms.sc: Fix spelling in comments.
* ld/scripttempl/ip2k.sc: Fix spelling in comments.
* ld/scripttempl/v850.sc: Fix spelling in comments.
* ld/scripttempl/v850_rh850.sc: Fix spelling in comments.
---
ld/scripttempl/ia64vms.sc | 2 +-
ld/scripttempl/ip2k.sc | 2 +-
ld/scripttempl/v850.sc | 4 ++--
ld/scripttempl/v850_rh850.sc | 4 ++--
4 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/ld/scripttempl/ia64vms.sc b/ld/scripttempl/ia64vms.sc
index 72b6747..ff67589 100644
--- a/ld/scripttempl/ia64vms.sc
+++ b/ld/scripttempl/ia64vms.sc
@@ -74,7 +74,7 @@ SECTIONS
*(.IA_64.pltoff)
}
\$TFR\$ ALIGN (16) : {
- /* Tranfer vector. */
+ /* Transfer vector. */
__entry = .;
*(.transfer)
}
diff --git a/ld/scripttempl/ip2k.sc b/ld/scripttempl/ip2k.sc
index 313c504..e1e09fd 100644
--- a/ld/scripttempl/ip2k.sc
+++ b/ld/scripttempl/ip2k.sc
@@ -31,7 +31,7 @@ MEMORY
SECTIONS
{
/* Allocated memory end markers
- (initialized to start of appropiate memory address). */
+ (initialized to start of appropriate memory address). */
__data_end = 0x01000100;
__pram_end = 0x02000000;
__flash_end = 0x02010000;
diff --git a/ld/scripttempl/v850.sc b/ld/scripttempl/v850.sc
index 9ff5e9a..0e83ae0 100644
--- a/ld/scripttempl/v850.sc
+++ b/ld/scripttempl/v850.sc
@@ -31,7 +31,7 @@ SECTIONS
}
/* This is the read only part of the zero data area.
- Having it as a seperate section prevents its
+ Having it as a separate section prevents its
attributes from being inherited by the zdata
section. Specifically it prevents the zdata
section from being marked READONLY. */
@@ -167,7 +167,7 @@ SECTIONS
}
/* We place the .sbss data section AFTER the .rosdata section, so that
- it can directly preceed the .bss section. This allows runtime startup
+ it can directly precede the .bss section. This allows runtime startup
code to initialise all the zero-data sections by simply taking the
value of '_edata' and zeroing until it reaches '_end'. */
diff --git a/ld/scripttempl/v850_rh850.sc b/ld/scripttempl/v850_rh850.sc
index b54e956..06268f7 100644
--- a/ld/scripttempl/v850_rh850.sc
+++ b/ld/scripttempl/v850_rh850.sc
@@ -33,7 +33,7 @@ SECTIONS
}
/* This is the read only part of the zero data area.
- Having it as a seperate section prevents its
+ Having it as a separate section prevents its
attributes from being inherited by the zdata
section. Specifically it prevents the zdata
section from being marked READONLY. */
@@ -186,7 +186,7 @@ SECTIONS
}
/* We place the .sbss data section AFTER the .rosdata section, so that
- it can directly preceed the .bss section. This allows runtime startup
+ it can directly precede the .bss section. This allows runtime startup
code to initialise all the zero-data sections by simply taking the
value of '_edata' and zeroing until it reaches '_end'. */
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 11/23] Fix spelling mistakes in comments in XML files
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
` (18 preceding siblings ...)
2016-11-20 17:41 ` [PATCH 10/23] Fix spelling mistakes in comments in Expect scripts Ambrogino Modigliani
@ 2016-11-20 17:41 ` Ambrogino Modigliani
2016-11-21 20:41 ` Yao Qi
2016-11-20 17:41 ` [PATCH 19/23] Fix spelling mistakes in comments in .m4 files Ambrogino Modigliani
` (2 subsequent siblings)
22 siblings, 1 reply; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:41 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
gdb/ChangeLog:
* gdb/features/rs6000/powerpc-601.xml: Fix spelling in comments.
* gdb/features/rs6000/rs6000.xml: Fix spelling in comments.
---
gdb/features/rs6000/powerpc-601.xml | 2 +-
gdb/features/rs6000/rs6000.xml | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/gdb/features/rs6000/powerpc-601.xml b/gdb/features/rs6000/powerpc-601.xml
index f1da9f9..d1ca6ef 100644
--- a/gdb/features/rs6000/powerpc-601.xml
+++ b/gdb/features/rs6000/powerpc-601.xml
@@ -11,7 +11,7 @@
<!DOCTYPE target SYSTEM "gdb-target.dtd">
<target>
<!-- This description is slightly different from the standard
- org.gnu.gdb.power.core, to accomodate mq. -->
+ org.gnu.gdb.power.core, to accommodate mq. -->
<feature name="org.gnu.gdb.power.core">
<reg name="r0" bitsize="32"/>
<reg name="r1" bitsize="32"/>
diff --git a/gdb/features/rs6000/rs6000.xml b/gdb/features/rs6000/rs6000.xml
index fc450a4..0572aed 100644
--- a/gdb/features/rs6000/rs6000.xml
+++ b/gdb/features/rs6000/rs6000.xml
@@ -13,7 +13,7 @@
<architecture>rs6000:6000</architecture>
<!-- This description is slightly different from the standard
- org.gnu.gdb.power.core, to accomodate mq, cnd, and cnt. -->
+ org.gnu.gdb.power.core, to accommodate mq, cnd, and cnt. -->
<feature name="org.gnu.gdb.power.core">
<reg name="r0" bitsize="32"/>
<reg name="r1" bitsize="32"/>
@@ -58,7 +58,7 @@
</feature>
<!-- This description is slightly different from the standard
- org.gnu.gdb.power.core, to accomodate historical numbering
+ org.gnu.gdb.power.core, to accommodate historical numbering
for fpscr. -->
<feature name="org.gnu.gdb.power.fpu">
<reg name="f0" bitsize="64" type="ieee_double" regnum="32"/>
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 14/23] Fix spelling mistakes in comments in .em files
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
` (13 preceding siblings ...)
2016-11-20 17:41 ` [PATCH 15/23] Fix spelling mistakes in comments in .igen files Ambrogino Modigliani
@ 2016-11-20 17:41 ` Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 23/23] Fix spelling mistakes in comments in .y files Ambrogino Modigliani
` (7 subsequent siblings)
22 siblings, 0 replies; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:41 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
ld/ChangeLog:
* ld/emultempl/avrelf.em: Fix spelling in comments.
* ld/emultempl/elf32.em: Fix spelling in comments.
* ld/emultempl/pe.em: Fix spelling in comments.
* ld/emultempl/pep.em: Fix spelling in comments.
* ld/emultempl/spuelf.em: Fix spelling in comments.
---
ld/emultempl/avrelf.em | 2 +-
ld/emultempl/elf32.em | 4 ++--
ld/emultempl/pe.em | 2 +-
ld/emultempl/pep.em | 2 +-
ld/emultempl/spuelf.em | 2 +-
5 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/ld/emultempl/avrelf.em b/ld/emultempl/avrelf.em
index 4710b6e..f9f0111 100644
--- a/ld/emultempl/avrelf.em
+++ b/ld/emultempl/avrelf.em
@@ -36,7 +36,7 @@ fragment <<EOF
static lang_input_statement_type *stub_file;
static asection *avr_stub_section;
-/* Variables set by the command-line parameters and transfered
+/* Variables set by the command-line parameters and transferred
to the bfd without use of global shared variables. */
static bfd_boolean avr_no_stubs = FALSE;
diff --git a/ld/emultempl/elf32.em b/ld/emultempl/elf32.em
index 8c63638..2ff494c 100644
--- a/ld/emultempl/elf32.em
+++ b/ld/emultempl/elf32.em
@@ -534,7 +534,7 @@ gld${EMULATION_NAME}_search_needed (const char *path,
while ((var = strchr (filename + offset, '$')) != NULL)
{
/* The ld.so manual page does not say, but I am going to assume that
- these tokens are terminated by a directory seperator character
+ these tokens are terminated by a directory separator character
(/) or the end of the string. There is also an implication that
$ORIGIN should only be used at the start of a path, but that is
not enforced here.
@@ -1512,7 +1512,7 @@ gld${EMULATION_NAME}_find_exp_assignment (etree_type *exp)
case etree_provide:
case etree_provided:
provide = TRUE;
- /* Fall thru */
+ /* Fall through */
case etree_assign:
/* We call record_link_assignment even if the symbol is defined.
This is because if it is defined by a dynamic object, we
diff --git a/ld/emultempl/pe.em b/ld/emultempl/pe.em
index 7b8fec7..b4385b0 100644
--- a/ld/emultempl/pe.em
+++ b/ld/emultempl/pe.em
@@ -1231,7 +1231,7 @@ This should work unless it involves constant data structures referencing symbols
undef->type = bfd_link_hash_defweak;
/* We replace original name with __imp_ prefixed, this
1) may trash memory 2) leads to duplicate symbol generation.
- Still, IMHO it's better than having name poluted. */
+ Still, IMHO it's better than having name polluted. */
undef->root.string = sym->root.string;
undef->u.def.value = sym->u.def.value;
undef->u.def.section = sym->u.def.section;
diff --git a/ld/emultempl/pep.em b/ld/emultempl/pep.em
index 60deeed..1312bec 100644
--- a/ld/emultempl/pep.em
+++ b/ld/emultempl/pep.em
@@ -1197,7 +1197,7 @@ pep_find_data_imports (void)
undef->type = bfd_link_hash_defweak;
/* We replace original name with __imp_ prefixed, this
1) may trash memory 2) leads to duplicate symbol generation.
- Still, IMHO it's better than having name poluted. */
+ Still, IMHO it's better than having name polluted. */
undef->root.string = sym->root.string;
undef->u.def.value = sym->u.def.value;
undef->u.def.section = sym->u.def.section;
diff --git a/ld/emultempl/spuelf.em b/ld/emultempl/spuelf.em
index a94e1df..e289e45 100644
--- a/ld/emultempl/spuelf.em
+++ b/ld/emultempl/spuelf.em
@@ -719,7 +719,7 @@ PARSE_AND_LIST_ARGS_CASES='
auto_overlay_file = optarg;
break;
}
- /* Fall thru */
+ /* Fall through */
case OPTION_SPU_AUTO_RELINK:
params.auto_overlay |= 2;
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 20/23] Fix spelling mistakes in comments in .opc files
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
` (10 preceding siblings ...)
2016-11-20 17:41 ` [PATCH 22/23] Fix spelling mistakes in comments in .tbl files Ambrogino Modigliani
@ 2016-11-20 17:41 ` Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 16/23] Fix spelling mistakes in comments in .in files Ambrogino Modigliani
` (10 subsequent siblings)
22 siblings, 0 replies; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:41 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
cpu/ChangeLog:
* cpu/frv.opc: Fix spelling in comments.
* cpu/mep.opc: Fix spelling in comments.
opcodes/ChangeLog:
* opcodes/msp430-decode.opc: Fix spelling in comments.
---
cpu/frv.opc | 2 +-
cpu/mep.opc | 4 ++--
opcodes/msp430-decode.opc | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/cpu/frv.opc b/cpu/frv.opc
index 869155d..2c23b07 100644
--- a/cpu/frv.opc
+++ b/cpu/frv.opc
@@ -488,7 +488,7 @@ match_vliw (VLIW_COMBO *vliw1, VLIW_COMBO *vliw2, int vliw_size)
return TRUE;
}
-/* Find the next vliw vliw in the table that can accomodate the new insn.
+/* Find the next vliw vliw in the table that can accommodate the new insn.
If one is found then return it. Otherwise return NULL. */
static VLIW_COMBO *
diff --git a/cpu/mep.opc b/cpu/mep.opc
index 7ed3ea8..2b59392 100644
--- a/cpu/mep.opc
+++ b/cpu/mep.opc
@@ -1163,7 +1163,7 @@ mep_examine_vliw32_insns (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
cop1buflength = 2;
}
- /* Now we have the distrubution set. Print them out. */
+ /* Now we have the distribution set. Print them out. */
status = mep_print_vliw_insns (cd, pc, info, buf, corebuflength,
cop1buflength, cop2buflength);
@@ -1252,7 +1252,7 @@ mep_examine_vliw64_insns (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
cop1buflength = 6;
}
- /* Now we have the distrubution set. Print them out. */
+ /* Now we have the distribution set. Print them out. */
status = mep_print_vliw_insns (cd, pc, info, buf, corebuflength,
cop1buflength, cop2buflength);
diff --git a/opcodes/msp430-decode.opc b/opcodes/msp430-decode.opc
index 9428467..9185637 100644
--- a/opcodes/msp430-decode.opc
+++ b/opcodes/msp430-decode.opc
@@ -346,7 +346,7 @@ msp430_decode_opcode (unsigned long pc,
post_extension_word:
;
- /* 430X extention word. */
+ /* 430X extension word. */
/** 0001 1srx t l 00 dsxt 430x */
al_bit = l;
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 22/23] Fix spelling mistakes in comments in .tbl files
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
` (9 preceding siblings ...)
2016-11-20 17:41 ` [PATCH 17/23] Fix spelling mistakes in comments in .inc files Ambrogino Modigliani
@ 2016-11-20 17:41 ` Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 20/23] Fix spelling mistakes in comments in .opc files Ambrogino Modigliani
` (11 subsequent siblings)
22 siblings, 0 replies; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:41 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
opcodes/ChangeLog:
* opcodes/i386-opc.tbl: Fix spelling in comments.
---
opcodes/i386-opc.tbl | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index fba01b6..054d7c1 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -77,7 +77,7 @@ movsxd, 2, 0x63, None, 1, Cpu64, Modrm|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_ldSuf|
// Move with zero extend.
movzb, 2, 0xfb6, None, 2, Cpu386, Modrm|No_bSuf|No_sSuf|No_ldSuf, { Reg8|Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg16|Reg32|Reg64 }
movzw, 2, 0xfb7, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg16|Word|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64 }
-// Intel Syntax next 2 insns (the 64-bit variants are not particulary
+// Intel Syntax next 2 insns (the 64-bit variants are not particularly
// useful since the zero extend 32->64 is implicit, but we can encode them).
movzx, 2, 0xfb6, None, 2, Cpu386, Modrm|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg8|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg16|Reg32|Reg64 }
movzx, 2, 0xfb7, None, 2, Cpu386, Modrm|No_bSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg16|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64 }
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 18/23] Fix spelling mistakes in comments in .l files
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
` (21 preceding siblings ...)
2016-11-20 17:41 ` [PATCH 21/23] Fix spelling mistakes in comments in .sc files Ambrogino Modigliani
@ 2016-11-20 17:41 ` Ambrogino Modigliani
22 siblings, 0 replies; 32+ messages in thread
From: Ambrogino Modigliani @ 2016-11-20 17:41 UTC (permalink / raw)
To: gdb-patches, pedro_alves, ambrogino.modigliani, ambrogino.modigliani
gas/ChangeLog:
* gas/config/bfin-lex.l: Fix spelling in comments.
gdb/ChangeLog:
* gdb/ada-lex.l: Fix spelling in comments.
---
gas/config/bfin-lex.l | 2 +-
gdb/ada-lex.l | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/gas/config/bfin-lex.l b/gas/config/bfin-lex.l
index 04fda4c..cb18469 100644
--- a/gas/config/bfin-lex.l
+++ b/gas/config/bfin-lex.l
@@ -362,7 +362,7 @@ static long parse_int (char **end)
fmt = 'd';
break;
- case '0': /* Accept different formated integers hex octal and binary. */
+ case '0': /* Accept different formatted integers hex octal and binary. */
{
char c = *++arg;
arg++;
diff --git a/gdb/ada-lex.l b/gdb/ada-lex.l
index 03204ff..05e663d 100644
--- a/gdb/ada-lex.l
+++ b/gdb/ada-lex.l
@@ -320,7 +320,7 @@ canonicalizeNumeral (char *s1, const char *s2)
/* Interprets the prefix of NUM that consists of digits of the given BASE
as an integer of that BASE, with the string EXP as an exponent.
Puts value in yylval, and returns INT, if the string is valid. Causes
- an error if the number is improperly formated. BASE, if NULL, defaults
+ an error if the number is improperly formatted. BASE, if NULL, defaults
to "10", and EXP to "1". The EXP does not contain a leading 'e' or 'E'.
*/
@@ -414,7 +414,7 @@ processReal (struct parser_state *par_state, const char *num0)
NAME0 contains the substring "___", it is assumed to be already
encoded and the resulting name is equal to it. Otherwise, it differs
from NAME0 in that:
- + Characters between '...' or <...> are transfered verbatim to
+ + Characters between '...' or <...> are transferred verbatim to
yylval.ssym.
+ <, >, and trailing "'" characters in quoted sequences are removed
(a leading quote is preserved to indicate that the name is not to be
--
2.7.4
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH 02/23] Fix spelling mistakes in comments in C source files (gdb)
2016-11-20 17:39 ` [PATCH 02/23] Fix spelling mistakes in comments in C source files (gdb) Ambrogino Modigliani
@ 2016-11-21 15:43 ` Yao Qi
2016-11-22 15:21 ` Pedro Alves
0 siblings, 1 reply; 32+ messages in thread
From: Yao Qi @ 2016-11-21 15:43 UTC (permalink / raw)
To: Ambrogino Modigliani; +Cc: gdb-patches, pedro_alves, ambrogino.modigliani
On Sun, Nov 20, 2016 at 06:37:57PM +0100, Ambrogino Modigliani wrote:
> gdb/ChangeLog:
>
> * gdb/ada-lang.c: Fix spelling in comments.
The file name refers to the file location relative to the ChangeLog
file, so don't need "gdb/".
* ada-lang.c: Fix spelling in comments.
>
> gdb/gdbserver/ChangeLog:
>
> * gdb/gdbserver/event-loop.c: Fix spelling in comments.
Likewise, drop "gdb/gdbserver/".
> * gdb/gdbserver/linux-aarch64-low.c: Fix spelling in comments.
> * gdb/gdbserver/linux-arm-low.c: Fix spelling in comments.
> * gdb/gdbserver/linux-low.c: Fix spelling in comments.
> * gdb/gdbserver/linux-ppc-low.c: Fix spelling in comments.
> * gdb/gdbserver/nto-low.c: Fix spelling in comments.
> * gdb/gdbserver/server.c: Fix spelling in comments.
> * gdb/gdbserver/server.h: Fix spelling in comments.
> * gdb/gdbserver/tracepoint.c: Fix spelling in comments.
> * gdb/gdbserver/win32-low.c: Fix spelling in comments.
>
> gdb/testsuite/ChangeLog:
>
> * gdb/testsuite/gdb.base/d10vovly.c: Fix spelling in comments.
drop "gdb/testsuite/".
> * gdb/testsuite/gdb.base/m32rovly.c: Fix spelling in comments.
> * gdb/testsuite/gdb.base/ovlymgr.c: Fix spelling in comments.
> * gdb/testsuite/gdb.base/scope0.c: Fix spelling in comments.
> * gdb/testsuite/gdb.base/sigrepeat.c: Fix spelling in comments.
> * gdb/testsuite/lib/compiler.c: Fix spelling in comments.
> * gdb/testsuite/lib/compiler.cc: Fix spelling in comments.
> diff --git a/gdb/s390-linux-tdep.c b/gdb/s390-linux-tdep.c
> index 885aadd..ecd1647 100644
> @@ -7253,7 +7253,7 @@ ex:
> /* op3c */
> if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
> return -1;
> - /* fallthru */
> + /* fall through */
fallthru is an annotate to the source to suppress the warnings from
compiler or other static analysis tools. I don't know we need to "fix"
them.
Otherwise, the patch is good to me. Please remove these "fallthru"
replacement in your patch, and send it again. It can be merged.
Ambrogino doesn't have FSF copyright assignment, but I don't think
it is required in this case, because IMO, this patch is not a
"legally significant change"
https://www.gnu.org/prep/maintain/html_node/Legally-Significant.html
and it can be regarded as "tiny change", although the patch is
not tiny, and the url above doesn't explicitly mention "fixing typo"
is not legally significant change.
--
Yao (é½å°§)
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH 11/23] Fix spelling mistakes in comments in XML files
2016-11-20 17:41 ` [PATCH 11/23] Fix spelling mistakes in comments in XML files Ambrogino Modigliani
@ 2016-11-21 20:41 ` Yao Qi
0 siblings, 0 replies; 32+ messages in thread
From: Yao Qi @ 2016-11-21 20:41 UTC (permalink / raw)
To: Ambrogino Modigliani; +Cc: gdb-patches, pedro_alves, ambrogino.modigliani
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset=unknown-8bit, Size: 304 bytes --]
On Sun, Nov 20, 2016 at 06:38:06PM +0100, Ambrogino Modigliani wrote:
> gdb/ChangeLog:
>
> * gdb/features/rs6000/powerpc-601.xml: Fix spelling in comments.
> * gdb/features/rs6000/rs6000.xml: Fix spelling in comments.
Please drop "gdb/", otherwise, patch is OK.
--
Yao (é½å°§)
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH 10/23] Fix spelling mistakes in comments in Expect scripts
2016-11-20 17:41 ` [PATCH 10/23] Fix spelling mistakes in comments in Expect scripts Ambrogino Modigliani
@ 2016-11-21 22:23 ` Yao Qi
0 siblings, 0 replies; 32+ messages in thread
From: Yao Qi @ 2016-11-21 22:23 UTC (permalink / raw)
To: Ambrogino Modigliani; +Cc: gdb-patches, pedro_alves, ambrogino.modigliani
On Sun, Nov 20, 2016 at 06:38:05PM +0100, Ambrogino Modigliani wrote:
> gas/testsuite/ChangeLog:
>
> * gas/testsuite/gas/all/gas.exp: Fix spelling in comments.
> * gas/testsuite/gas/cris/cris.exp: Fix spelling in comments.
> * gas/testsuite/gas/hppa/basic/basic.exp: Fix spelling in comments.
> * gas/testsuite/gas/hppa/parse/parse.exp: Fix spelling in comments.
> * gas/testsuite/gas/hppa/reloc/reloc.exp: Fix spelling in comments.
> * gas/testsuite/gas/sh/arch/arch.exp: Fix spelling in comments.
> * gas/testsuite/gas/tic4x/tic4x.exp: Fix spelling in comments.
>
> gdb/testsuite/ChangeLog:
>
> * gdb/testsuite/gdb.ada/exec_changed.exp: Fix spelling in comments.
ChangeLog entry should be prefixed with tab rather than spaces. Again,
drop "gdb/testsuite/".
> * gdb/testsuite/gdb.arch/e500-prologue.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.arch/i386-mpx.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.arch/powerpc-aix-prologue.exp: Fix spelling in
> comments.
> * gdb/testsuite/gdb.base/bigcore.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.base/call-sc.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.base/dbx.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.base/default.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.base/double-prompt-target-event-error.exp: Fix
> spelling in comments.
> * gdb/testsuite/gdb.base/exitsignal.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.base/gdb11531.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.base/gnu-ifunc.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.base/gnu_vector.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.base/lineinc.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.base/killed-outside.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.base/overlays.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.base/remote.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.base/savedregs.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.base/scope.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.base/sigbpt.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.base/signals.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.base/signull.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.base/store.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.base/structs.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.base/watchpoint-stops-at-right-insn.exp: Fix
> spelling in comments.
> * gdb/testsuite/gdb.cell/mem-access.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.cp/rtti.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.cp/static-print-quit.exp: Fix spelling in
> comments.
> * gdb/testsuite/gdb.cp/virtfunc.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp: Fix spelling in
> comments.
> * gdb/testsuite/gdb.fortran/types.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.fortran/vla-value-sub-arbitrary.exp: Fix spelling
> in comments.
> * gdb/testsuite/gdb.go/integers.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.mi/mi-breakpoint-changed.exp: Fix spelling in
> comments.
> * gdb/testsuite/gdb.multi/multi-arch-exec.exp: Fix spelling in
> comments.
> * gdb/testsuite/gdb.pascal/floats.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.pascal/integers.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.pascal/types.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.reverse/step-precsave.exp: Fix spelling in
> comments.
> * gdb/testsuite/gdb.reverse/step-reverse.exp: Fix spelling in
> comments.
> * gdb/testsuite/gdb.threads/thread_check.exp: Fix spelling in
> comments.
> * gdb/testsuite/gdb.trace/collection.exp: Fix spelling in comments.
> * gdb/testsuite/gdb.trace/mi-tracepoint-changed.exp: Fix spelling in
> comments.
> * gdb/testsuite/lib/gdb.exp: Fix spelling in comments.
> * gdb/testsuite/lib/prelink-support.exp: Fix spelling in comments.
>
All changes in gdb/testsuite/ are OK. Please send a new version which
only includes gdb/testsuite changes. It can be merged. Changes about
ld and gas should be sent to binutils@sourceware.org. Although the
changes are straightforward as well, it should be reviewed there.
> ld/testsuite/ChangeLog:
>
> * ld/testsuite/ld-sh/arch/arch.exp: Fix spelling in comments.
> * ld/testsuite/ld-sh/rd-sh.exp: Fix spelling in comments.
> * ld/testsuite/ld-sh/sh64/rd-sh64.exp: Fix spelling in comments.
> * ld/testsuite/ld-undefined/undefined.exp: Fix spelling in comments.
--
Yao
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH 02/23] Fix spelling mistakes in comments in C source files (gdb)
2016-11-21 15:43 ` Yao Qi
@ 2016-11-22 15:21 ` Pedro Alves
0 siblings, 0 replies; 32+ messages in thread
From: Pedro Alves @ 2016-11-22 15:21 UTC (permalink / raw)
To: Yao Qi, Ambrogino Modigliani; +Cc: gdb-patches, ambrogino.modigliani
On 11/21/2016 03:43 PM, Yao Qi wrote:
> Ambrogino doesn't have FSF copyright assignment, but I don't think
> it is required in this case, because IMO, this patch is not a
> "legally significant change"
> https://www.gnu.org/prep/maintain/html_node/Legally-Significant.html
> and it can be regarded as "tiny change", although the patch is
> not tiny, and the url above doesn't explicitly mention "fixing typo"
> is not legally significant change.
I agree. IANAL and all that, but IMHO there's no copyrightable
content here. Two patches independently written from scratch to
fix these typos would be indistinguishable. I.e., it's a mechanical
change. I think we're OK.
Please find a couple comments below.
> --- a/gdb/cli/cli-decode.c
> +++ b/gdb/cli/cli-decode.c
> @@ -956,7 +956,7 @@ apropos_cmd (struct ui_file *stream,
> command that requires subcommands. Also called by saying just
> "help".)
>
> - I am going to split this into two seperate comamnds, help_cmd and
> + I am going to split this into two separate comamnds, help_cmd and
"commands" too, while at it.
> help_list. */
>
> void
> --- a/gdb/arch-utils.c
> +++ b/gdb/arch-utils.c
> @@ -98,7 +98,7 @@ legacy_register_sim_regno (struct gdbarch *gdbarch, int regnum)
> gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch));
> /* NOTE: cagney/2002-05-13: The old code did it this way and it is
> suspected that some GDB/SIM combinations may rely on this
> - behavour. The default should be one2one_register_sim_regno
> + behaviour. The default should be one2one_register_sim_regno
We use American English spelling, so should be "behavior", I believe.
> (below). */
> if (gdbarch_register_name (gdbarch, regnum) != NULL
> && gdbarch_register_name (gdbarch, regnum)[0] != '\0')
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH 05/23] Fix spelling mistakes in comments in configure scripts
2016-11-20 17:39 ` [PATCH 05/23] Fix spelling mistakes in comments in configure scripts Ambrogino Modigliani
@ 2016-11-22 15:55 ` Pedro Alves
0 siblings, 0 replies; 32+ messages in thread
From: Pedro Alves @ 2016-11-22 15:55 UTC (permalink / raw)
To: Ambrogino Modigliani, gdb-patches, ambrogino.modigliani, binutils
Hi!
(original thread here: https://sourceware.org/ml/gdb-patches/2016-11/msg00564.html)
On 11/20/2016 05:38 PM, Ambrogino Modigliani wrote:
> libiberty/ChangeLog:
>
> * libiberty/configure: Fix spelling in comments.
> * libiberty/configure.ac: Fix spelling in comments.
This is maintained by gcc. Could you send it to the gcc-patches list?
> diff --git a/bfd/configure b/bfd/configure
> index 68db12f..ab239fe 100755
> --- a/bfd/configure
> +++ b/bfd/configure
> @@ -12291,7 +12291,7 @@ fi
> rm -f conftest*
>
>
> -# Verify CC_FOR_BUILD to be compatible with waring flags
> +# Verify CC_FOR_BUILD to be compatible with warning flags
This a generated file. The typo is actually here:
bfd/warning.m4:# Verify CC_FOR_BUILD to be compatible with waring flags
I included that fix in the patch, and pushed it in for you, after
regenerating all touched configure's to make sure we're not
missing touching some other source file (that's how I found out
about warning.m4).
Below's what I pushed. Adding binutils@ as this touches
files maintained by binutils.
Thanks!
From 96fe45624e51f1bb747e36cf8bdaab216f31c5ec Mon Sep 17 00:00:00 2001
From: Ambrogino Modigliani <ambrogino.modigliani@gmail.com>
Date: Tue, 22 Nov 2016 15:43:03 +0000
Subject: [PATCH] Fix spelling mistakes in comments in configure scripts
All changes are limited to comments, and no run-time behavior is
affected.
bfd/ChangeLog:
2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com>
* warning.m4: Fix spelling in comments.
* configure.ac: Fix spelling in comments.
* configure: Regenerate.
binutils/ChangeLog:
2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com>
* configure: Regenerate.
gdb/ChangeLog:
2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com>
* configure.ac: Fix spelling in comments.
* configure: Regenerate.
gas/ChangeLog:
2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com>
* configure: Regenerate.
gold/ChangeLog:
2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com>
* configure: Regenerate.
gprof/ChangeLog:
2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com>
* configure: Regenerate.
ld/ChangeLog:
2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com>
* configure: Regenerate.
opcodes/ChangeLog:
2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com>
* configure: Regenerate.
---
bfd/ChangeLog | 6 ++++++
binutils/ChangeLog | 4 ++++
gas/ChangeLog | 4 ++++
gdb/ChangeLog | 5 +++++
gold/ChangeLog | 4 ++++
gprof/ChangeLog | 4 ++++
ld/ChangeLog | 4 ++++
opcodes/ChangeLog | 4 ++++
bfd/configure | 4 ++--
bfd/configure.ac | 2 +-
bfd/warning.m4 | 2 +-
binutils/configure | 2 +-
gas/configure | 2 +-
gdb/configure | 2 +-
gdb/configure.ac | 2 +-
gold/configure | 2 +-
gprof/configure | 2 +-
ld/configure | 2 +-
opcodes/configure | 2 +-
19 files changed, 47 insertions(+), 12 deletions(-)
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index ebf8279..93d39df 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,9 @@
+2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com>
+
+ * warning.m4: Fix spelling in comments.
+ * configure.ac: Fix spelling in comments.
+ * configure: Regenerate.
+
2016-11-22 Alan Modra <amodra@gmail.com>
PR 20744
diff --git a/binutils/ChangeLog b/binutils/ChangeLog
index ef923cb..0f3d167 100644
--- a/binutils/ChangeLog
+++ b/binutils/ChangeLog
@@ -1,3 +1,7 @@
+2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com>
+
+ * configure: Regenerate.
+
2016-11-22 Alan Modra <amodra@gmail.com>
PR 20744
diff --git a/gas/ChangeLog b/gas/ChangeLog
index b2f6040..33b59d0 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,7 @@
+2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com>
+
+ * configure: Regenerate.
+
2016-11-22 Jose E. Marchesi <jose.marchesi@oracle.com>
* config/tc-sparc.c: Move HWS_* and HWS2_* definitions to
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 9749031..3257bae 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,8 @@
+2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com>
+
+ * configure.ac: Fix spelling in comments.
+ * configure: Regenerate.
+
2016-11-22 Yao Qi <yao.qi@linaro.org>
* gdbarch.sh (software_single_step): Change parameter from frame_info
diff --git a/gold/ChangeLog b/gold/ChangeLog
index 63476cd..749ffdd 100644
--- a/gold/ChangeLog
+++ b/gold/ChangeLog
@@ -1,3 +1,7 @@
+2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com>
+
+ * configure: Regenerate.
+
2016-11-21 Cary Coutant <ccoutant@gmail.com>
PR gold/20693
diff --git a/gprof/ChangeLog b/gprof/ChangeLog
index 52637ec..9079a4b 100644
--- a/gprof/ChangeLog
+++ b/gprof/ChangeLog
@@ -1,3 +1,7 @@
+2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com>
+
+ * configure: Regenerate.
+
2016-10-06 Tom Tromey <tromey@sourceware.org>
PR gprof/20656
diff --git a/ld/ChangeLog b/ld/ChangeLog
index 00b7ca9..1f4814d 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,7 @@
+2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com>
+
+ * configure: Regenerate.
+
2016-11-22 Alan Modra <amodra@gmail.com>
PR 20744
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 834750f..a839a68 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com>
+
+ * configure: Regenerate.
+
2016-11-22 Jose E. Marchesi <jose.marchesi@oracle.com>
* sparc-opc.c (HWS_V8): Definition moved from
diff --git a/bfd/configure b/bfd/configure
index 68db12f..ab239fe 100755
--- a/bfd/configure
+++ b/bfd/configure
@@ -12291,7 +12291,7 @@ fi
rm -f conftest*
-# Verify CC_FOR_BUILD to be compatible with waring flags
+# Verify CC_FOR_BUILD to be compatible with warning flags
# Add -Wshadow if the compiler is a sufficiently recent version of GCC.
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
@@ -15805,7 +15805,7 @@ fi
-# Determine the host dependant file_ptr a.k.a. off_t type. In order
+# Determine the host dependent file_ptr a.k.a. off_t type. In order
# prefer: off64_t - if ftello64 and fseeko64, off_t - if ftello and
# fseeko, long. This assumes that sizeof off_t is .ge. sizeof long.
# Hopefully a reasonable assumption since fseeko et.al. should be
diff --git a/bfd/configure.ac b/bfd/configure.ac
index 6f11d29..3254dae 100644
--- a/bfd/configure.ac
+++ b/bfd/configure.ac
@@ -1156,7 +1156,7 @@ fi
AC_SUBST(supports_plugins)
AC_SUBST(lt_cv_dlopen_libs)
-# Determine the host dependant file_ptr a.k.a. off_t type. In order
+# Determine the host dependent file_ptr a.k.a. off_t type. In order
# prefer: off64_t - if ftello64 and fseeko64, off_t - if ftello and
# fseeko, long. This assumes that sizeof off_t is .ge. sizeof long.
# Hopefully a reasonable assumption since fseeko et.al. should be
diff --git a/bfd/warning.m4 b/bfd/warning.m4
index 3fe4340..1022364 100644
--- a/bfd/warning.m4
+++ b/bfd/warning.m4
@@ -56,7 +56,7 @@ AC_EGREP_CPP([^[0-4]$],[__GNUC__],,GCC_WARN_CFLAGS="$GCC_WARN_CFLAGS -Wstack-usa
WARN_WRITE_STRINGS=""
AC_EGREP_CPP([^[0-3]$],[__GNUC__],,WARN_WRITE_STRINGS="-Wwrite-strings")
-# Verify CC_FOR_BUILD to be compatible with waring flags
+# Verify CC_FOR_BUILD to be compatible with warning flags
# Add -Wshadow if the compiler is a sufficiently recent version of GCC.
AC_EGREP_CPP_FOR_BUILD([^[0-3]$],[__GNUC__],,GCC_WARN_CFLAGS_FOR_BUILD="$GCC_WARN_CFLAGS_FOR_BUILD -Wshadow")
diff --git a/binutils/configure b/binutils/configure
index 610d07e..fe314e4 100755
--- a/binutils/configure
+++ b/binutils/configure
@@ -11996,7 +11996,7 @@ fi
rm -f conftest*
-# Verify CC_FOR_BUILD to be compatible with waring flags
+# Verify CC_FOR_BUILD to be compatible with warning flags
# Add -Wshadow if the compiler is a sufficiently recent version of GCC.
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
diff --git a/gas/configure b/gas/configure
index dbd986a..98da0db 100755
--- a/gas/configure
+++ b/gas/configure
@@ -11803,7 +11803,7 @@ fi
rm -f conftest*
-# Verify CC_FOR_BUILD to be compatible with waring flags
+# Verify CC_FOR_BUILD to be compatible with warning flags
# Add -Wshadow if the compiler is a sufficiently recent version of GCC.
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
diff --git a/gdb/configure b/gdb/configure
index 2abfbff..6df88d9 100755
--- a/gdb/configure
+++ b/gdb/configure
@@ -8855,7 +8855,7 @@ fi
# Since GDB uses Readline, we need termcap functionality. In many
# cases this will be provided by the curses library, but some systems
-# have a seperate termcap library, or no curses library at all.
+# have a separate termcap library, or no curses library at all.
case $host_os in
cygwin*)
diff --git a/gdb/configure.ac b/gdb/configure.ac
index 585f147..4b931bf 100644
--- a/gdb/configure.ac
+++ b/gdb/configure.ac
@@ -597,7 +597,7 @@ fi
# Since GDB uses Readline, we need termcap functionality. In many
# cases this will be provided by the curses library, but some systems
-# have a seperate termcap library, or no curses library at all.
+# have a separate termcap library, or no curses library at all.
case $host_os in
cygwin*)
diff --git a/gold/configure b/gold/configure
index a3ed5c9..cb020be 100755
--- a/gold/configure
+++ b/gold/configure
@@ -6774,7 +6774,7 @@ fi
rm -f conftest*
-# Verify CC_FOR_BUILD to be compatible with waring flags
+# Verify CC_FOR_BUILD to be compatible with warning flags
# Add -Wshadow if the compiler is a sufficiently recent version of GCC.
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
diff --git a/gprof/configure b/gprof/configure
index 97363ee..0d5f8a2 100755
--- a/gprof/configure
+++ b/gprof/configure
@@ -12152,7 +12152,7 @@ fi
rm -f conftest*
-# Verify CC_FOR_BUILD to be compatible with waring flags
+# Verify CC_FOR_BUILD to be compatible with warning flags
# Add -Wshadow if the compiler is a sufficiently recent version of GCC.
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
diff --git a/ld/configure b/ld/configure
index 3f82f35..e6bed08 100755
--- a/ld/configure
+++ b/ld/configure
@@ -15609,7 +15609,7 @@ fi
rm -f conftest*
-# Verify CC_FOR_BUILD to be compatible with waring flags
+# Verify CC_FOR_BUILD to be compatible with warning flags
# Add -Wshadow if the compiler is a sufficiently recent version of GCC.
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
diff --git a/opcodes/configure b/opcodes/configure
index 6ef3844..0e1dd18 100755
--- a/opcodes/configure
+++ b/opcodes/configure
@@ -11559,7 +11559,7 @@ fi
rm -f conftest*
-# Verify CC_FOR_BUILD to be compatible with waring flags
+# Verify CC_FOR_BUILD to be compatible with warning flags
# Add -Wshadow if the compiler is a sufficiently recent version of GCC.
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
--
2.5.5
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH 07/23] Fix spelling mistakes in comments in shell scripts
2016-11-20 17:39 ` [PATCH 07/23] Fix spelling mistakes in comments in shell scripts Ambrogino Modigliani
@ 2016-11-22 16:07 ` Pedro Alves
0 siblings, 0 replies; 32+ messages in thread
From: Pedro Alves @ 2016-11-22 16:07 UTC (permalink / raw)
To: Ambrogino Modigliani, gdb-patches, ambrogino.modigliani
On 11/20/2016 05:38 PM, Ambrogino Modigliani wrote:
> gdb/ChangeLog:
>
> * gdb/contrib/expect-read1.sh: Fix spelling in comments.
> * gdb/gdb_buildall.sh: Fix spelling in comments.
> * gdb/gdb_mbuildw.sh: Fix spelling in comments.
Typo "gdb_mbuildw.sh" -> "gdb_mbuild.sh". :-)
>
> gdb/testsuite/ChangeLog:
>
> * gdb/testsuite/dg-extract-results.sh: Fix spelling in comments.
This file is a copy of gcc's contrib/dg-extract-results.sh. Could you
send the fix there?
>
> ld/ChangeLog:
>
> * ld/emulparams/elf32mcore.sh: Fix spelling in comments.
ld changes should go the the binutils list. See the top level
MAINTAINERS file.
> -# This tool excercise any incomplete reads handling in the testsuite by
> +# This tool exercise any incomplete reads handling in the testsuite by
"This tool exercises".
I pushed this fixed patch below.
From ca3cbe5cd7715d1559d55f8e71be1dd7340f13b1 Mon Sep 17 00:00:00 2001
From: Ambrogino Modigliani <ambrogino.modigliani@gmail.com>
Date: Tue, 22 Nov 2016 16:05:00 +0000
Subject: [PATCH] Fix spelling mistakes in comments in shell scripts
gdb/ChangeLog:
2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com>
* contrib/expect-read1.sh: Fix spelling in comments.
* gdb_buildall.sh: Fix spelling in comments.
* gdb_mbuild.sh: Fix spelling in comments.
---
gdb/ChangeLog | 6 ++++++
gdb/contrib/expect-read1.sh | 2 +-
gdb/gdb_buildall.sh | 2 +-
gdb/gdb_mbuild.sh | 4 ++--
4 files changed, 10 insertions(+), 4 deletions(-)
mode change 100644 => 100755 gdb/contrib/expect-read1.sh
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 3257bae..2849067 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,5 +1,11 @@
2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com>
+ * contrib/expect-read1.sh: Fix spelling in comments.
+ * gdb_buildall.sh: Fix spelling in comments.
+ * gdb_mbuild.sh: Fix spelling in comments.
+
+2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com>
+
* configure.ac: Fix spelling in comments.
* configure: Regenerate.
diff --git a/gdb/contrib/expect-read1.sh b/gdb/contrib/expect-read1.sh
old mode 100644
new mode 100755
index cc9d811..5eec0dd
--- a/gdb/contrib/expect-read1.sh
+++ b/gdb/contrib/expect-read1.sh
@@ -15,7 +15,7 @@
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
-# This tool excercise any incomplete reads handling in the testsuite by
+# This tool exercises any incomplete reads handling in the testsuite by
# simulating read always returns just 1 character.
# Testsuite incompatibilities are tracked as GDB PR testsuite/12649.
diff --git a/gdb/gdb_buildall.sh b/gdb/gdb_buildall.sh
index 1fc7b38..ed3ffb5 100644
--- a/gdb/gdb_buildall.sh
+++ b/gdb/gdb_buildall.sh
@@ -103,7 +103,7 @@ builddir=`cd $2 && /bin/pwd` || exit 1
make=${MAKE:-make}
MAKE=${make}
export MAKE
-# We dont want GDB do dump cores.
+# We don't want GDB do dump cores.
ulimit -c 0
# Just make sure we're in the right directory.
diff --git a/gdb/gdb_mbuild.sh b/gdb/gdb_mbuild.sh
index 08927f1..da0c19a 100755
--- a/gdb/gdb_mbuild.sh
+++ b/gdb/gdb_mbuild.sh
@@ -195,7 +195,7 @@ log ()
-# Warn the user of what is comming, print the list of targets
+# Warn the user of what is coming, print the list of targets
echo "$alltarg"
echo ""
@@ -273,7 +273,7 @@ do
then
# Iff the build fails remove the final build target so that
# the follow-on code knows things failed. Stops the follow-on
- # code thinking that a failed rebuild succedded (executable
+ # code thinking that a failed rebuild succeeded (executable
# left around from previous build).
echo ... ${make} ${keepgoing} ${makejobs} ${target}
( ${make} ${keepgoing} ${makejobs} all-gdb || rm -f gdb/gdb gdb/gdb.exe
--
2.5.5
--
Thanks,
Pedro Alves
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH 08/23] Fix spelling mistakes in comments in Ada source files
2016-11-20 17:39 ` [PATCH 08/23] Fix spelling mistakes in comments in Ada source files Ambrogino Modigliani
@ 2016-11-22 16:08 ` Pedro Alves
0 siblings, 0 replies; 32+ messages in thread
From: Pedro Alves @ 2016-11-22 16:08 UTC (permalink / raw)
To: Ambrogino Modigliani, gdb-patches, ambrogino.modigliani
On 11/20/2016 05:38 PM, Ambrogino Modigliani wrote:
> zlib/ChangeLog:
>
> * zlib/contrib/ada/zlib-streams.ads: Fix spelling in comments.
> * zlib/contrib/ada/zlib-thin.ads: Fix spelling in comments.
> * zlib/contrib/ada/zlib.ads: Fix spelling in comments.
zlib is an external 3rd project that we import into our tree.
Could you send the fixes upstream?
Thanks,
Pedro Alves
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH 09/23] Fix spelling mistakes in comments in Assembler files
2016-11-20 17:40 ` [PATCH 09/23] Fix spelling mistakes in comments in Assembler files Ambrogino Modigliani
@ 2016-11-22 16:10 ` Pedro Alves
0 siblings, 0 replies; 32+ messages in thread
From: Pedro Alves @ 2016-11-22 16:10 UTC (permalink / raw)
To: Ambrogino Modigliani, gdb-patches, ambrogino.modigliani
On 11/20/2016 05:38 PM, Ambrogino Modigliani wrote:
> gas/testsuite/ChangeLog:
> ld/testsuite/ChangeLog:
These two should go to binutils.
> sim/testsuite/ChangeLog:
>
You have the right list for this one, but I'd rather leave it
to Mike or one of the relevant arch maintainers to take a look.
> zlib`/ChangeLog:
>
> * zlib/contrib/inflate86/inffast.S: Fix spelling in comments.
This should go upstream instead.
Thanks,
Pedro Alves
^ permalink raw reply [flat|nested] 32+ messages in thread
end of thread, other threads:[~2016-11-22 16:10 UTC | newest]
Thread overview: 32+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-11-20 17:38 [PATCH 00/23] Fix spelling mistakes in comments Ambrogino Modigliani
2016-11-20 17:38 ` [PATCH 01/23] Fix spelling mistakes in comments in C source files (bfd) Ambrogino Modigliani
2016-11-20 17:39 ` [PATCH 08/23] Fix spelling mistakes in comments in Ada source files Ambrogino Modigliani
2016-11-22 16:08 ` Pedro Alves
2016-11-20 17:39 ` [PATCH 02/23] Fix spelling mistakes in comments in C source files (gdb) Ambrogino Modigliani
2016-11-21 15:43 ` Yao Qi
2016-11-22 15:21 ` Pedro Alves
2016-11-20 17:39 ` [PATCH 03/23] Fix spelling mistakes in comments in C source files (sim) Ambrogino Modigliani
2016-11-20 17:39 ` [PATCH 07/23] Fix spelling mistakes in comments in shell scripts Ambrogino Modigliani
2016-11-22 16:07 ` Pedro Alves
2016-11-20 17:39 ` [PATCH 04/23] Fix spelling mistakes in comments in C source files (rest of modules) Ambrogino Modigliani
2016-11-20 17:39 ` [PATCH 05/23] Fix spelling mistakes in comments in configure scripts Ambrogino Modigliani
2016-11-22 15:55 ` Pedro Alves
2016-11-20 17:39 ` [PATCH 06/23] Fix spelling mistakes in comments in makefiles Ambrogino Modigliani
2016-11-20 17:40 ` [PATCH 09/23] Fix spelling mistakes in comments in Assembler files Ambrogino Modigliani
2016-11-22 16:10 ` Pedro Alves
2016-11-20 17:41 ` [PATCH 17/23] Fix spelling mistakes in comments in .inc files Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 22/23] Fix spelling mistakes in comments in .tbl files Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 20/23] Fix spelling mistakes in comments in .opc files Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 16/23] Fix spelling mistakes in comments in .in files Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 15/23] Fix spelling mistakes in comments in .igen files Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 14/23] Fix spelling mistakes in comments in .em files Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 23/23] Fix spelling mistakes in comments in .y files Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 12/23] Fix spelling mistakes in comments in .cpu files Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 13/23] Fix spelling mistakes in comments in .def files Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 10/23] Fix spelling mistakes in comments in Expect scripts Ambrogino Modigliani
2016-11-21 22:23 ` Yao Qi
2016-11-20 17:41 ` [PATCH 11/23] Fix spelling mistakes in comments in XML files Ambrogino Modigliani
2016-11-21 20:41 ` Yao Qi
2016-11-20 17:41 ` [PATCH 19/23] Fix spelling mistakes in comments in .m4 files Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 21/23] Fix spelling mistakes in comments in .sc files Ambrogino Modigliani
2016-11-20 17:41 ` [PATCH 18/23] Fix spelling mistakes in comments in .l files Ambrogino Modigliani
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