From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 10667 invoked by alias); 30 Dec 2014 14:17:29 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 10648 invoked by uid 89); 30 Dec 2014 14:17:28 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.0 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 X-HELO: relay1.mentorg.com Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 30 Dec 2014 14:17:26 +0000 Received: from nat-ies.mentorg.com ([192.94.31.2] helo=SVR-IES-FEM-01.mgc.mentorg.com) by relay1.mentorg.com with esmtp id 1Y5xbv-0002ly-EY from Maciej_Rozycki@mentor.com for gdb-patches@sourceware.org; Tue, 30 Dec 2014 06:17:23 -0800 Received: from localhost (137.202.0.76) by SVR-IES-FEM-01.mgc.mentorg.com (137.202.0.104) with Microsoft SMTP Server (TLS) id 14.3.224.2; Tue, 30 Dec 2014 14:17:21 +0000 Date: Tue, 30 Dec 2014 14:17:00 -0000 From: "Maciej W. Rozycki" To: Yao Qi CC: Subject: Re: [PATCH] Recognize branch instruction on MIPS in gdb.trace/entry-values.exp In-Reply-To: <87zja5uxjk.fsf@codesourcery.com> Message-ID: References: <1419840861-10723-1-git-send-email-yao@codesourcery.com> <87zja5uxjk.fsf@codesourcery.com> User-Agent: Alpine 1.10 (DEB 962 2008-03-14) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" X-SW-Source: 2014-12/txt/msg00683.txt.bz2 On Tue, 30 Dec 2014, Yao Qi wrote: > > What's the semantics of the test case and the changes you're making? > > > > dwarf assembler is used to generate debug info with DW_TAG_GNU_call_site > and DW_TAG_GNU_call_site_parameter to exercise GDB. The change I am > making in this patch is to recognize branch instruction on MIPS, so that > we can compute the address returned from foo, and fill it in the > generated debug info. Ah, OK. > > I'm asking because the MIPS architecture has several instructions used to > > make procedure calls, depending on the ISA and ABI selected, and also > > compiler options. Besides JAL these instructions include JALS, JALX, > > JALR, JALRC, JALRS, BAL and BALS. It looks to me you need to modify the > > pattern here to take these into account; JALRC does not have a delay slot. > > > > I'll update the pattern to {jalrc|(?:jal|bal)[^\r\n]+\r\n} I think {jalrc|[jb]al[^\r\n]+\r\n} will be a little bit more efficient, but please make sure too that the right-hand side branch does not swallow `jalrc' with its following instruction by greedy matching: "An RE consisting of two or more branches connected by the | operator prefers longest match." (from the TCL Reference Manual) -- so I think you'll have to modify your regexp further yet. > >> All tests in entry-values.exp are PASS. > > > > Which target and ABI(s) did you ran your testing on? Please try at least > > these: o32/MIPS, o32/MIPS16, o32/microMIPS, n64 on a Linux and a > > bare-metal target each; testing o32/MIPS16 with the `-mflip-mips16' GCC > > option too will be appreciated. These combinations should trigger some > > (although not all) of the other possible instructions. > > To avoid of misunderstanding, let me map them to the following concrete gcc > options (I don't find -mabi=o32 nor -mabi=n64 in > https://gcc.gnu.org/onlinedocs/gcc/MIPS-Options.html), > > -mabi=32 > -mabi=32 -mips16 > -mabi=32 -mips16 -mflip-mips16 > -mabi=32 -mmicromips > -mabi=64 on both linux and bare-metal target > > are they what you want? Yes, except I meant both Linux and bare-metal across all the variations, not n64 only (missing comma after `n64' in my original sentence). Here n64 matters as it covers PIC calling sequences. Maciej