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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Nov 2022 18:06:48.2820 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9f44704b-fb13-4218-c012-08dabcfd02a4 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT009.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR08MB5709 X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 11/2/22 17:44, Simon Marchi wrote: > On 11/2/22 10:33, Luis Machado via Gdb-patches wrote: >> v2: Add try/catch block >> >> Investigating PR29272, it was mentioned a particular test used to work on >> GDB 10, but it started failing with GDB 11 onwards. I tracked it down to >> some displaced stepping improvements on commit >> 187b041e2514827b9d86190ed2471c4c7a352874. >> >> In particular, one of the corner cases using copy_insn_closure_by_addr got >> silently broken. It is hard to spot because it doesn't have any good tests >> for it, and the situation is quite specific to the Arm target. >> >> Essentially, the change from the displaced stepping improvements made it so >> we could still invoke copy_insn_closure_by_addr correctly to return the >> pointer to a copy_insn_closure, but it always returned nullptr due to >> the order of the statements in displaced_step_buffer::prepare. >> >> The way it is now, we first write the address of the displaced step buffer >> to PC and then save the copy_insn_closure pointer. >> >> The problem is that writing to PC for the Arm target requires figuring >> out if the new PC is thumb mode or not. >> >> With no copy_insn_closure data, the logic to determine the thumb mode >> during displaced stepping doesn't work, and gives random results that >> are difficult to track (SIGILL, SIGSEGV etc). >> >> Fix this by reordering the PC write in displaced_step_buffer::prepare >> and, for safety, add an assertion to >> displaced_step_buffer::copy_insn_closure_by_addr so GDB stops right >> when it sees this invalid situation. If this gets broken again in the >> future, it will be easier to spot. >> >> Guard the code in a try/catch block to handle the case where we can't >> write the PC, so as to not leave partial state in the displaced step >> machinery. >> >> Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=29272 >> --- >> gdb/displaced-stepping.c | 26 +++++++++++++++++++++++--- >> 1 file changed, 23 insertions(+), 3 deletions(-) >> >> diff --git a/gdb/displaced-stepping.c b/gdb/displaced-stepping.c >> index eac2c5dab94..3b5376cf31b 100644 >> --- a/gdb/displaced-stepping.c >> +++ b/gdb/displaced-stepping.c >> @@ -139,15 +139,31 @@ displaced_step_buffers::prepare (thread_info *thread, CORE_ADDR &displaced_pc) >> return DISPLACED_STEP_PREPARE_STATUS_CANT; >> } >> >> - /* Resume execution at the copy. */ >> - regcache_write_pc (regcache, buffer->addr); >> - >> /* This marks the buffer as being in use. */ >> buffer->current_thread = thread; >> >> /* Save this, now that we know everything went fine. */ >> buffer->copy_insn_closure = std::move (copy_insn_closure); >> >> + /* Adjust the PC so it points to the displaced step buffer address that will >> + be used. This needs to be done after we save the copy_insn_closure, as >> + some architectures (Arm, for one) need that information so they can adjust >> + other data as needed. In particular, Arm needs to know if the instruction >> + being executed in the displaced step buffer is thumb or not. Without that >> + information, things will be very wrong in a random way. */ >> + try >> + { >> + regcache_write_pc (regcache, buffer->addr); >> + } >> + catch (const gdb_exception_error &except) >> + { >> + /* Reset the displaced step buffer state if we failed to write PC. >> + Otherwise we will prevent this buffer from being used, as it will >> + always have a thread in buffer->current_thread. */ >> + buffer->current_thread = nullptr; >> + copy_insn_closure = std::move (buffer->copy_insn_closure); > > The intention would be clearer by just doing: > > buffer->copy_insn_closure.reset () > >> + return DISPLACED_STEP_PREPARE_STATUS_CANT; > > I think we should just let the exception escape, > DISPLACED_STEP_PREPARE_STATUS_CANT isn't meant to convey an error. Wouldn't letting it escape completely abort the single-stepping operation? I was expecting a return of DISPLACED_STEP_PREPARE_STATUS_CANT to have a fallback of stepping in-place. Isn't that the case? > Would this work, using make_scope_exit? Ah, possibly. Let me try that. Thanks for the suggestion. > > /* Reset the displaced step buffer state if we failed to write PC. > Otherwise we will prevent this buffer from being used, as it will > always have a thread in buffer->current_thread. */ > auto reset_buffer = make_scope_exit > ([buffer] () > { > buffer->current_thread = nullptr; > buffer->copy_insn_closure.reset (); > }); > > /* Adjust the PC so it points to the displaced step buffer address that will > be used. This needs to be done after we save the copy_insn_closure, as > some architectures (Arm, for one) need that information so they can adjust > other data as needed. In particular, Arm needs to know if the instruction > being executed in the displaced step buffer is thumb or not. Without that > information, things will be very wrong in a random way. */ > regcache_write_pc (regcache, buffer->addr); > > reset_buffer.release (); > > Simon