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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Jul 2023 11:38:18.4316 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 167c4392-d580-40b6-f0ad-08db91baa2ce X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT043.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB7324 X-Spam-Status: No, score=-3.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,KAM_DMARC_NONE,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE,UNPARSEABLE_RELAY autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 7/28/23 04:12, Thiago Jung Bauermann wrote: > > Luis Machado via Gdb-patches writes: > >> Due to the nature of the AArch64 SVE/SME extensions in GDB, each thread >> can potentially have distinct target descriptions/gdbarches. >> >> When loading a gcore-generated core file, at the moment GDB gives priority >> to the target description dumped to NT_GDB_TDESC. Though technically correct >> for most target, it doesn't work correctly for AArch64 with SVE or SME >> support. >> >> The correct approach for AArch64/Linux is to rely on the >> gdbarch_core_read_description hook, so it can figure out the proper target >> description for a given thread based on the various available register notes. >> >> I think this should work for other architectures as well. If not, we may >> need to adjust things so all architectures get the information that they >> need for discovering the target description of the core file. > > The code to load the target description from the core file was added in > commit 95ce627aeb9d "gdb: write target description into core file", by > Andrew Burgess. My understanding of that commit message is that it was > added before the gdbarch hook on purpose, and my reading of: > > “My primary motivation for adding this feature is that, in a future > commit, I will be adding support for bare metal core dumps on some > targets. For RISC-V specifically, I want to be able to dump all the > available control status registers. As different targets will present > different sets of register in their target description, including > registers that are possibly not otherwise known to GDB I wanted a way > to capture these registers in the core dump.” > > is that it doesn't work if reading from the target description comes > last, though I'm not sure about that. I copied him in this email to see > if he would like to chime in. > I think the risc-v case should still work as it doesn't provide a core_read_description hook. If one is added though, then gdb will give that hook preference. Usually the core_read_description hook is provided when the target runs hosted on an OS. So for bare metal we wouldn't have that hook implemented. Still, I agree we might want to make sure both of these features coexist. The assumption a tdesc is the same for all the threads of a process, and that this tdesc is exposed through a single note in the core file, doesn't hold true for AArch64 unfortunately. It would've been true if we had a sizeless vector type, in which case all the threads of a process for AArch64 would have the exact same tdesc.