From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr1-f42.google.com (mail-wr1-f42.google.com [209.85.221.42]) by sourceware.org (Postfix) with ESMTPS id 84B583858039 for ; Thu, 8 Jul 2021 09:44:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 84B583858039 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=palves.net Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-wr1-f42.google.com with SMTP id r11so1454066wro.9 for ; Thu, 08 Jul 2021 02:44:10 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:from:to:cc:references:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=Bz3pFNqBUB4Qr98AgXNDvXvZ+ugHeSQ/sNxPThEVMJE=; b=ly8tIk+WPxamm3NDLETc1kxwPbZp3gfINQZ0wP9VXU322vSjVEyUwqLkYwyyhSGSTZ I3P91s0gX2sRkybxE9aoXbNzYVTQq0upHPiDDCrzoJHVp7xQ1dryZWIim8IB042fkKxO ciZgKzvQ43YOU/AgHEl8FW/tV4j+VESD/CKo2Mu2wyvq7wp9qU0sqW/9eJRnGjmz7HRq QQjfVR4l1UCpa0kaupNOISLbqK0OzE7DB5X3bxjwQJvxijmT6CrFIi4Q8a+4HTs4GGJT Xm8BRLWp4U8SH6szA+laEHvvILchlrPst3R/Pht32YG0S+q/StMdLO2DOCh/YcihCAWB HZTQ== X-Gm-Message-State: AOAM532qxR2LGMMntPetc/yzRHw4hS10uBCjakUtsDAF7/Xp3rDQIkxA Sh5/iHA4E1eKKHXJvFDSFnMMiEpFYTDEdQ== X-Google-Smtp-Source: ABdhPJxQCNLycZtq4lotocKDaVKHwnUpF29GStbod9DDiei4yBerXLDfK8+Cc7X+tbec+xruB1Ul1Q== X-Received: by 2002:a05:6000:180f:: with SMTP id m15mr33663649wrh.388.1625737449023; Thu, 08 Jul 2021 02:44:09 -0700 (PDT) Received: from ?IPv6:2001:8a0:f932:6a00:46bc:d03b:7b3a:2227? ([2001:8a0:f932:6a00:46bc:d03b:7b3a:2227]) by smtp.gmail.com with ESMTPSA id 2sm1439893wmn.44.2021.07.08.02.44.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 08 Jul 2021 02:44:08 -0700 (PDT) Subject: Re: [PATCH v3 0/2] Fix gdb.base/sigstep.exp for riscv64-linux From: Pedro Alves To: Jim Wilson , Lancelot SIX Cc: gdb-patches@sourceware.org References: <20210707003043.447755-1-lsix@lancelotsix.com> Message-ID: Date: Thu, 8 Jul 2021 10:44:07 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3.9 required=5.0 tests=BAYES_00, FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, KAM_DMARC_STATUS, NICE_REPLY_A, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=no autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Jul 2021 09:44:11 -0000 Hi Jim, On 2021-07-07 10:01 p.m., Jim Wilson wrote: > On Tue, Jul 6, 2021 at 5:31 PM Lancelot SIX via Gdb-patches < > gdb-patches@sourceware.org> wrote: > >> This patch series fixes those errors. Patch #1 disables tests that >> cannot pass because the platform lacks support for hardware single >> stepping. Patch #2 implements stepping outside of signal handlers for >> riscv*-*-linux* platforms. >> > > FYI On the HiFive Unleashed, it isn't possible to implement hardware > breakpoints because the debug registers can only be accessed from debug > mode, i.e. via jtag. They can't be accessed by the linux kernel, so I only > implemented software breakpoints. The debug spec was later changed to > allow a few debug registers to be accessed from machine mode, and this is > implemented in the HiFive Unmatched. So in theory we can support hardware > breakpoints (and tracepoints) on the HiFive Unmatched and similar new > targets, like the BeagleV. This will require OpenSBI changes to add hooks > to access the new registers, linux kernel changes to make the registers > available, linux kernel changes to add new ptrace features to access them, > and gdb changes to test for them and use them when available. But > unfortunately there is no one actively working on RISC-V Linux gdb support > that I know of, so I have no idea when this work will be done. > > When we do have hardware breakpoint support these tests will have to be > re-enabled, though it will need to be conditional depending on whether the > target under test supports hardware breakpoints or not. > Note this is about hardware single-stepping, not hardware breakpoints. In Linux/ptrace, this would mean the kernel would support PTRACE_SINGLESTEP. The kernel would set some debug trace register flag on so that the CPU stops after executing one instruction, and then report a SIGTRAP stop.