From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 0477C3857359; Tue, 5 Sep 2023 09:09:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 0477C3857359 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=irq.a4lg.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=irq.a4lg.com Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 5E511300089; Tue, 5 Sep 2023 09:09:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irq.a4lg.com; s=2017s01; t=1693904947; bh=jlI6m0er38GZscTM8fcr/N21EDMxUlgYejM66hhfzfI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Mime-Version:Content-Transfer-Encoding; b=PDXNCuwfkGdtTWZyKSFR0aayWI03YbnTxOnptKUmsWemXqHEjRmy4R+bRyQpt2yxV CRgLTXKAH/3taPhF1hy2jQO0+9pImID9XCSahZKm73AlhEtZUGqlYauv69SGsfMsxD ruCzoYN4InaVu9SkjIt7RkRTiWuSUiYKw/PQhZe0= From: Tsukasa OI To: Tsukasa OI , Palmer Dabbelt , Andrew Waterman , Jim Wilson , Nelson Chu , Kito Cheng Cc: binutils@sourceware.org, gdb-patches@sourceware.org Subject: [PATCH v3 2/3] RISC-V: Add "lp64e" ABI support Date: Tue, 5 Sep 2023 09:08:36 +0000 Message-ID: In-Reply-To: References: Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,GIT_PATCH_0,KAM_MANYTO,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: From: Tsukasa OI Since RV32E and RV64E are now ratified, this commit prepares the ABI support for LP64E (LP64 with reduced GPRs). gas/ChangeLog: * config/tc-riscv.c (riscv_set_abi_by_arch): Update the error message. (md_parse_option): Accept "lp64e". * doc/c-riscv.texi: Update the documentation to allow "lp64e". * testsuite/gas/riscv/mabi-fail-rv32e-lp64f.l: Change error message. * testsuite/gas/riscv/mabi-fail-rv32e-lp64d.l: Likewise. * testsuite/gas/riscv/mabi-fail-rv32e-lp64q.l: Likewise. --- gas/config/tc-riscv.c | 4 +++- gas/doc/c-riscv.texi | 5 ++--- gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64d.l | 2 +- gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64f.l | 2 +- gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64q.l | 2 +- 5 files changed, 8 insertions(+), 7 deletions(-) diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c index e3bcf8b280eb..f2a031735eb4 100644 --- a/gas/config/tc-riscv.c +++ b/gas/config/tc-riscv.c @@ -386,7 +386,7 @@ riscv_set_abi_by_arch (void) as_bad ("%d-bit ABI not yet supported on %d-bit ISA", abi_xlen, xlen); if (riscv_subset_supports (&riscv_rps_as, "e") && !rve_abi) - as_bad ("only the ilp32e ABI is supported for e extension"); + as_bad ("only ilp32e/lp64e ABI are supported for e extension"); if (float_abi == FLOAT_ABI_SINGLE && !riscv_subset_supports (&riscv_rps_as, "f")) @@ -3871,6 +3871,8 @@ md_parse_option (int c, const char *arg) riscv_set_abi (32, FLOAT_ABI_QUAD, false); else if (strcmp (arg, "lp64") == 0) riscv_set_abi (64, FLOAT_ABI_SOFT, false); + else if (strcmp (arg, "lp64e") == 0) + riscv_set_abi (64, FLOAT_ABI_SOFT, true); else if (strcmp (arg, "lp64f") == 0) riscv_set_abi (64, FLOAT_ABI_SINGLE, false); else if (strcmp (arg, "lp64d") == 0) diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi index b175ba0a7293..e7fdbfa22afb 100644 --- a/gas/doc/c-riscv.texi +++ b/gas/doc/c-riscv.texi @@ -65,9 +65,8 @@ aren't set, then assembler will check the default configure setting @item -mabi=ABI Selects the ABI, which is either "ilp32" or "lp64", optionally followed by "f", "d", or "q" to indicate single-precision, double-precision, or -quad-precision floating-point calling convention, or none to indicate -the soft-float calling convention. Also, "ilp32" can optionally be followed -by "e" to indicate the RVE ABI, which is always soft-float. +quad-precision floating-point calling convention, or none or "e" to indicate +the soft-float calling convention ("e" indicates a soft-float RVE ABI). @cindex @samp{-mrelax} option, RISC-V @item -mrelax diff --git a/gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64d.l b/gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64d.l index f7306cb24d20..419a01d5d53a 100644 --- a/gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64d.l +++ b/gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64d.l @@ -1,4 +1,4 @@ .*Assembler messages: .*Error: can't have 64-bit ABI on 32-bit ISA -.*Error: only the ilp32e ABI is supported for e extension +.*Error: only ilp32e/lp64e ABI are supported for e extension .*Error: ilp32d/lp64d ABI can't be used when d extension isn't supported diff --git a/gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64f.l b/gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64f.l index 706690ac9c64..7b2fcda8d685 100644 --- a/gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64f.l +++ b/gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64f.l @@ -1,4 +1,4 @@ .*Assembler messages: .*Error: can't have 64-bit ABI on 32-bit ISA -.*Error: only the ilp32e ABI is supported for e extension +.*Error: only ilp32e/lp64e ABI are supported for e extension .*Error: ilp32f/lp64f ABI can't be used when f extension isn't supported diff --git a/gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64q.l b/gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64q.l index ab64b1546f63..a06e9ea1aa93 100644 --- a/gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64q.l +++ b/gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64q.l @@ -1,4 +1,4 @@ .*Assembler messages: .*Error: can't have 64-bit ABI on 32-bit ISA -.*Error: only the ilp32e ABI is supported for e extension +.*Error: only ilp32e/lp64e ABI are supported for e extension .*Error: ilp32q/lp64q ABI can't be used when q extension isn't supported -- 2.42.0