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* [PATCH 3/3] gdb/riscv: Remove partial target description support
  2018-03-06 19:30 [PUSHED] [PATCH 0/3] riscv cleanups Andrew Burgess
  2018-03-06 19:30 ` [PATCH 1/3] gdb/riscv: Remove use of pseudo registers Andrew Burgess
  2018-03-06 19:30 ` [PATCH 2/3] gdb/riscv: Remove 'Contributed by....' comments Andrew Burgess
@ 2018-03-06 19:30 ` Andrew Burgess
  2 siblings, 0 replies; 4+ messages in thread
From: Andrew Burgess @ 2018-03-06 19:30 UTC (permalink / raw)
  To: gdb-patches; +Cc: Yao Qi, Andrew Burgess

Some parts of the target description support were committed with the
initial riscv patch.  As target descriptions are not currently supported
on riscv this commit removes the two pieces for code that relate to
target description support.

It is expected that target description support will be added in the
future, at which point this, or similar code will be added back.

gdb/ChangeLog:

	* riscv-tdep.c (riscv_register_name): Remove target description
	support.
	(riscv_gdbarch_init): Remove target description check.
---
 gdb/ChangeLog    |  6 ++++++
 gdb/riscv-tdep.c | 37 -------------------------------------
 2 files changed, 6 insertions(+), 37 deletions(-)

diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
index bc25edfa9f2..11b12279321 100644
--- a/gdb/riscv-tdep.c
+++ b/gdb/riscv-tdep.c
@@ -464,9 +464,6 @@ value_of_riscv_user_reg (struct frame_info *frame, const void *baton)
 static const char *
 riscv_register_name (struct gdbarch *gdbarch, int regnum)
 {
-  if (tdesc_has_registers (gdbarch_target_desc (gdbarch)))
-    return tdesc_register_name (gdbarch, regnum);
-
   /* Prefer to use the alias. */
   if (regnum >= RISCV_ZERO_REGNUM && regnum <= RISCV_LAST_REGNUM)
     {
@@ -2565,40 +2562,6 @@ riscv_gdbarch_init (struct gdbarch_info info,
   dwarf2_append_unwinders (gdbarch);
   frame_unwind_append_unwinder (gdbarch, &riscv_frame_unwind);
 
-  /* Check any target description for validity.  */
-  if (tdesc_has_registers (info.target_desc))
-    {
-      const struct tdesc_feature *feature;
-      struct tdesc_arch_data *tdesc_data;
-      int valid_p;
-
-      feature = tdesc_find_feature (info.target_desc, "org.gnu.gdb.riscv.cpu");
-      if (feature == NULL)
-	goto no_tdata;
-
-      tdesc_data = tdesc_data_alloc ();
-
-      valid_p = 1;
-      for (i = RISCV_ZERO_REGNUM; i <= RISCV_LAST_FP_REGNUM; ++i)
-        valid_p &= tdesc_numbered_register (feature, tdesc_data, i,
-                                            riscv_gdb_reg_names[i]);
-      for (i = RISCV_FIRST_CSR_REGNUM; i <= RISCV_LAST_CSR_REGNUM; ++i)
-        {
-          char buf[20];
-
-          sprintf (buf, "csr%d", i - RISCV_FIRST_CSR_REGNUM);
-          valid_p &= tdesc_numbered_register (feature, tdesc_data, i, buf);
-        }
-
-      valid_p &= tdesc_numbered_register (feature, tdesc_data, i++, "priv");
-
-      if (!valid_p)
-	tdesc_data_cleanup (tdesc_data);
-      else
-	tdesc_use_registers (gdbarch, info.target_desc, tdesc_data);
-    }
- no_tdata:
-
   for (i = 0; i < ARRAY_SIZE (riscv_register_aliases); ++i)
     user_reg_add (gdbarch, riscv_register_aliases[i].name,
 		  value_of_riscv_user_reg, &riscv_register_aliases[i].regnum);
-- 
2.14.3

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH 1/3] gdb/riscv: Remove use of pseudo registers
  2018-03-06 19:30 [PUSHED] [PATCH 0/3] riscv cleanups Andrew Burgess
@ 2018-03-06 19:30 ` Andrew Burgess
  2018-03-06 19:30 ` [PATCH 2/3] gdb/riscv: Remove 'Contributed by....' comments Andrew Burgess
  2018-03-06 19:30 ` [PATCH 3/3] gdb/riscv: Remove partial target description support Andrew Burgess
  2 siblings, 0 replies; 4+ messages in thread
From: Andrew Burgess @ 2018-03-06 19:30 UTC (permalink / raw)
  To: gdb-patches; +Cc: Yao Qi, Andrew Burgess

The code making use of pseudo registers was initially intended to
support running 32-bit ABI files on 64-bit riscv targets.  However, the
implementation was incomplete, and broken.

For now I've removed all reference to pseudo registers from the riscv
target, we've not lost any functionality, and this cleans up failures in
the selftests.

Once the riscv target has matured a little we'll probably end up
bringing back some of the use of pseudo registers in order to better
support running 32-bit executables on a 64-bit target.

gdb/ChangeLog:

	* riscv-tdep.c (riscv_pseudo_register_read): Delete.
	(riscv_pseudo_register_write): Delete.
	(riscv_gdbarch_init): Remove all use of pseudo registers.
---
 gdb/ChangeLog    |  6 ++++++
 gdb/riscv-tdep.c | 25 -------------------------
 2 files changed, 6 insertions(+), 25 deletions(-)

diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
index 3e1ad99c673..ce148067216 100644
--- a/gdb/riscv-tdep.c
+++ b/gdb/riscv-tdep.c
@@ -499,28 +499,6 @@ riscv_register_name (struct gdbarch *gdbarch, int regnum)
   return NULL;
 }
 
-/* Implement the pseudo_register_read gdbarch method.  */
-
-static enum register_status
-riscv_pseudo_register_read (struct gdbarch *gdbarch,
-			    readable_regcache *regcache,
-			    int regnum,
-			    gdb_byte *buf)
-{
-  return regcache->raw_read (regnum, buf);
-}
-
-/* Implement the pseudo_register_write gdbarch method.  */
-
-static void
-riscv_pseudo_register_write (struct gdbarch *gdbarch,
-			     struct regcache *regcache,
-			     int cookednum,
-			     const gdb_byte *buf)
-{
-  regcache_raw_write (regcache, cookednum, buf);
-}
-
 /* Implement the register_type gdbarch method.  */
 
 static struct type *
@@ -2559,10 +2537,7 @@ riscv_gdbarch_init (struct gdbarch_info info,
   set_gdbarch_sw_breakpoint_from_kind (gdbarch, riscv_sw_breakpoint_from_kind);
 
   /* Register architecture.  */
-  set_gdbarch_pseudo_register_read (gdbarch, riscv_pseudo_register_read);
-  set_gdbarch_pseudo_register_write (gdbarch, riscv_pseudo_register_write);
   set_gdbarch_num_regs (gdbarch, RISCV_LAST_REGNUM + 1);
-  set_gdbarch_num_pseudo_regs (gdbarch, RISCV_LAST_REGNUM + 1);
   set_gdbarch_sp_regnum (gdbarch, RISCV_SP_REGNUM);
   set_gdbarch_pc_regnum (gdbarch, RISCV_PC_REGNUM);
   set_gdbarch_ps_regnum (gdbarch, RISCV_FP_REGNUM);
-- 
2.14.3

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PUSHED] [PATCH 0/3] riscv cleanups
@ 2018-03-06 19:30 Andrew Burgess
  2018-03-06 19:30 ` [PATCH 1/3] gdb/riscv: Remove use of pseudo registers Andrew Burgess
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Andrew Burgess @ 2018-03-06 19:30 UTC (permalink / raw)
  To: gdb-patches; +Cc: Yao Qi, Andrew Burgess

This series addresses some of the comments from Yao in this mail:

   https://sourceware.org/ml/gdb-patches/2018-03/msg00133.html

I've gone ahead and pushed this series as I am only removing code that
was unused (patches #2 and #3) or just causing bugs, but adding no
benefit (patch #1).  All the changes are in the riscv-tdep.* files.

Not all of Yao's comments are addressed in this series, I'll have more
follow up later in the week.

Thanks,
Andrew

---

Andrew Burgess (3):
  gdb/riscv: Remove use of pseudo registers
  gdb/riscv: Remove 'Contributed by....' comments
  gdb/riscv: Remove partial target description support

 gdb/ChangeLog    | 18 +++++++++++++++
 gdb/riscv-tdep.c | 67 --------------------------------------------------------
 gdb/riscv-tdep.h |  5 -----
 3 files changed, 18 insertions(+), 72 deletions(-)

-- 
2.14.3

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH 2/3] gdb/riscv: Remove 'Contributed by....' comments
  2018-03-06 19:30 [PUSHED] [PATCH 0/3] riscv cleanups Andrew Burgess
  2018-03-06 19:30 ` [PATCH 1/3] gdb/riscv: Remove use of pseudo registers Andrew Burgess
@ 2018-03-06 19:30 ` Andrew Burgess
  2018-03-06 19:30 ` [PATCH 3/3] gdb/riscv: Remove partial target description support Andrew Burgess
  2 siblings, 0 replies; 4+ messages in thread
From: Andrew Burgess @ 2018-03-06 19:30 UTC (permalink / raw)
  To: gdb-patches; +Cc: Yao Qi, Andrew Burgess

The GDB coding standard states these lines should never have been
added.

gdb/ChangeLog:

	* riscv-tdep.c: Remove 'Contributed by ...' lines from header
	comment.
	* riscv-tdep.h: Likewise.
---
 gdb/ChangeLog    | 6 ++++++
 gdb/riscv-tdep.c | 5 -----
 gdb/riscv-tdep.h | 5 -----
 3 files changed, 6 insertions(+), 10 deletions(-)

diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
index ce148067216..bc25edfa9f2 100644
--- a/gdb/riscv-tdep.c
+++ b/gdb/riscv-tdep.c
@@ -2,11 +2,6 @@
 
    Copyright (C) 2018 Free Software Foundation, Inc.
 
-   Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
-   and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin
-   and by Todd Snyder <todd@bluespec.com>
-   and by Mike Frysinger <vapier@gentoo.org>.
-
    This file is part of GDB.
 
    This program is free software; you can redistribute it and/or modify
diff --git a/gdb/riscv-tdep.h b/gdb/riscv-tdep.h
index 3c033dcc77d..ab5e278759c 100644
--- a/gdb/riscv-tdep.h
+++ b/gdb/riscv-tdep.h
@@ -2,11 +2,6 @@
 
    Copyright (C) 2018 Free Software Foundation, Inc.
 
-   Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
-   and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin
-   and by Todd Snyder <todd@bluespec.com>
-   and by Mike Frysinger <vapier@gentoo.org>.
-
    This file is part of GDB.
 
    This program is free software; you can redistribute it and/or modify
-- 
2.14.3

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2018-03-06 19:30 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2018-03-06 19:30 [PUSHED] [PATCH 0/3] riscv cleanups Andrew Burgess
2018-03-06 19:30 ` [PATCH 1/3] gdb/riscv: Remove use of pseudo registers Andrew Burgess
2018-03-06 19:30 ` [PATCH 2/3] gdb/riscv: Remove 'Contributed by....' comments Andrew Burgess
2018-03-06 19:30 ` [PATCH 3/3] gdb/riscv: Remove partial target description support Andrew Burgess

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