From: Andrew Burgess <aburgess@redhat.com>
To: gdb-patches@sourceware.org, binutils@sourceware.org
Cc: Simon Cook <simon.cook@embecosm.com>,
Nelson Chu <nelson.chu@sifive.com>,
Andrew Burgess <aburgess@redhat.com>
Subject: [PATCH 0/2] RISC-V Disassembler Options Support
Date: Thu, 25 Nov 2021 17:40:51 +0000 [thread overview]
Message-ID: <cover.1637861733.git.aburgess@redhat.com> (raw)
This series is a refresh of this patch that was never merged:
https://sourceware.org/pipermail/binutils/2021-January/114944.html
I actually created this series from scratch, copying code from the
MIPS implementation, and it was only when I was reviewing the change
prior to posting that it all seemed very familiar, and I remembered
Simon's earlier work.
I believe I've addressed the review feedback from the earlier thread,
except that I have retained the help text that lists the valid
priv-spec values - not printing the valid values seems like a really
bad idea to me, so I'd prefer we kept that in.
All feedback welcome.
Thanks,
Andrew
---
Andrew Burgess (2):
opcodes/riscv: add disassembler options support to libopcodes
gdb: add risc-v disassembler options support
gdb/riscv-tdep.c | 8 +++
include/ChangeLog | 5 ++
include/dis-asm.h | 1 +
opcodes/ChangeLog | 9 +++
opcodes/riscv-dis.c | 147 +++++++++++++++++++++++++++++++++++++++++---
5 files changed, 161 insertions(+), 9 deletions(-)
--
2.25.4
next reply other threads:[~2021-11-25 17:41 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-25 17:40 Andrew Burgess [this message]
2021-11-25 17:40 ` [PATCH 1/2] opcodes/riscv: add disassembler options support to libopcodes Andrew Burgess
2021-11-25 17:40 ` [PATCH 2/2] gdb: add risc-v disassembler options support Andrew Burgess
2021-11-26 7:48 ` [PATCH 0/2] RISC-V Disassembler Options Support Nelson Chu
2021-11-26 10:22 ` Andrew Burgess
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