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From: Tsukasa OI <research_trasio@irq.a4lg.com>
To: Tsukasa OI <research_trasio@irq.a4lg.com>,
 Nelson Chu <nelson@rivosinc.com>, Kito Cheng <kito.cheng@sifive.com>,
 Palmer Dabbelt <palmer@dabbelt.com>, Andrew Burgess <aburgess@redhat.com>,
 Jan Beulich <jbeulich@suse.com>, Andreas Schwab <schwab@suse.de>
Cc: binutils@sourceware.org,
	gdb-patches@sourceware.org
Subject: [PATCH v3 0/2] RISC-V: Fix buffer overflow after 176-bit instruction
 support
Date: Tue,  4 Oct 2022 11:25:55 +0000
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Hello,

This is the PATCH v3 for quick stack buffer overflow fix.

[Changes: v2 -> v3]
-   PATCH 1/2: Define RISCV_MAX_INSN_LEN in riscv_insn_length function
    (idea by Jan Beulich)
-   PATCH 2/2: Fix comment and commit message

[Changes: v1 -> v2]
-   Fix assertion failure on riscv_insn::decode
-   Use new constant RISCV_MAX_INSN_LEN for buffer size

PATCH 1: Binutils
PATCH 2: GDB (v2/3: depends on PATCH 1)

Thanks,
Tsukasa




Tsukasa OI (2):
  RISC-V: Fix buffer overflow on print_insn_riscv
  gdb/riscv: Partial support for instructions up to 176-bit

 gdb/riscv-tdep.c       | 9 +++++----
 include/opcode/riscv.h | 2 ++
 opcodes/riscv-dis.c    | 2 +-
 3 files changed, 8 insertions(+), 5 deletions(-)


base-commit: d71eca64e70c31e0d32396a0b6c60e3ea9eb420b
-- 
2.34.1