From: Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
To: "gdb-patches@sourceware.org" <gdb-patches@sourceware.org>,
Aditya Kamath1 <Aditya.Kamath1@ibm.com>,
"simark@simark.ca" <simark@simark.ca>
Cc: Sangamesh Mallayya <sangamesh.swamy@in.ibm.com>
Subject: Re: [PATCH] Enable vector instruction debugging for AIX
Date: Tue, 7 Mar 2023 12:55:56 +0000 [thread overview]
Message-ID: <d0c95edc7b32f09f5d8bdb8303e6c8339f9c8e56.camel@de.ibm.com> (raw)
In-Reply-To: <CH2PR15MB3544EF0FEAEF71B1CC83B1A3D6B79@CH2PR15MB3544.namprd15.prod.outlook.com>
Aditya Kamath1 <Aditya.Kamath1@ibm.com> wrote:
>Kindly push this patch if there are no changes.
This one issue still isn't addressed:
>>+ /* VSX registers. */
>>+ if (tdep->ppc_vsr0_upper_regnum != -1 && (regno == -1
>>+ || (regno >=tdep->ppc_vsr0_upper_regnum)))
>
>You've now removed the upper limit completely. I think this needs an
> && regno < tdep->ppc_vsr0_upper_regnum + ppc_num_vshrs
Otherwise, everything looks good to me now.
Bye,
Ulrich
next prev parent reply other threads:[~2023-03-07 12:55 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-13 10:52 Aditya Kamath1
2022-10-13 10:52 ` Aditya Kamath1
2022-10-14 12:41 ` Ulrich Weigand
2022-10-28 10:35 ` Aditya Kamath1
2022-10-28 12:39 ` Ulrich Weigand
2022-11-14 16:26 ` Aditya Kamath1
2022-11-15 19:03 ` Ulrich Weigand
2023-02-23 12:49 ` Aditya Kamath1
2023-02-24 15:26 ` Ulrich Weigand
2023-03-01 12:34 ` Aditya Kamath1
2023-03-03 14:59 ` Ulrich Weigand
2023-03-06 13:45 ` Aditya Kamath1
2023-03-07 10:25 ` Ulrich Weigand
2023-03-07 12:13 ` Aditya Kamath1
2023-03-07 12:55 ` Ulrich Weigand [this message]
2023-03-07 13:24 ` Aditya Kamath1
2023-03-07 15:53 ` Ulrich Weigand
2023-03-09 2:21 ` Aditya Kamath1
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