From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 72956 invoked by alias); 25 Oct 2018 17:55:45 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 72907 invoked by uid 89); 25 Oct 2018 17:55:45 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-25.1 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,SPF_HELO_PASS,SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy=baldwin, Baldwin X-HELO: mail.baldwin.cx Received: from bigwig.baldwin.cx (HELO mail.baldwin.cx) (96.47.65.170) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 25 Oct 2018 17:55:44 +0000 Received: from John-Baldwins-MacBook-Pro-2.local (ralph.baldwin.cx [66.234.199.215]) by mail.baldwin.cx (Postfix) with ESMTPSA id F026110B709; Thu, 25 Oct 2018 13:55:41 -0400 (EDT) Subject: Re: [PATCH 4/5] RISC-V: Add native linux support. To: Andrew Burgess , Andreas Schwab References: <20180808233908.8149-1-jimw@sifive.com> <20181025110946.GN2929@embecosm.com> Cc: Jim Wilson , gdb-patches@sourceware.org From: John Baldwin Message-ID: Date: Thu, 25 Oct 2018 17:55:00 -0000 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.12; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <20181025110946.GN2929@embecosm.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-IsSubscribed: yes X-SW-Source: 2018-10/txt/msg00587.txt.bz2 On 10/25/18 4:09 AM, Andrew Burgess wrote: > diff --git a/gdb/riscv-linux-nat.c b/gdb/riscv-linux-nat.c > index 7dbfe651f2c..c09121d052b 100644 > --- a/gdb/riscv-linux-nat.c > +++ b/gdb/riscv-linux-nat.c > @@ -201,10 +201,8 @@ riscv_linux_nat_target::fetch_registers (struct regcache *regcache, int regnum) > > if ((regnum == RISCV_CSR_MISA_REGNUM) > || (regnum == -1)) > - { > - /* TODO: Need to add a ptrace call for this. */ > - regcache->raw_supply_zeroed (regnum); > - } > + /* TODO: Need to add a ptrace call for this. */ > + regcache->raw_supply_zeroed (RISCV_CSR_MISA_REGNUM); > > /* Access to other CSRs has potential security issues, don't support them for > now. */ Oops, I just replied to Andrew directly on the commit, but probably better to reply on the list: Now that the MISA defaults to 0 if not present, would it better to just remove this and not set it to 0 explicitly? The FreeBSD native target for RISC-V doesn't set MISA to anything at all. -- John Baldwin