From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id 21B9D385481A for ; Tue, 16 Mar 2021 21:48:58 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 21B9D385481A Received: from pps.filterd (m0098413.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 12GLY5UW132803 for ; Tue, 16 Mar 2021 17:48:57 -0400 Received: from ppma03dal.us.ibm.com (b.bd.3ea9.ip4.static.sl-reverse.com [169.62.189.11]) by mx0b-001b2d01.pphosted.com with ESMTP id 37b0qnpsw5-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 16 Mar 2021 17:48:57 -0400 Received: from pps.filterd (ppma03dal.us.ibm.com [127.0.0.1]) by ppma03dal.us.ibm.com (8.16.0.43/8.16.0.43) with SMTP id 12GLln7m011986 for ; Tue, 16 Mar 2021 21:48:57 GMT Received: from b03cxnp08027.gho.boulder.ibm.com (b03cxnp08027.gho.boulder.ibm.com [9.17.130.19]) by ppma03dal.us.ibm.com with ESMTP id 378n198w6n-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 16 Mar 2021 21:48:57 +0000 Received: from b03ledav001.gho.boulder.ibm.com (b03ledav001.gho.boulder.ibm.com [9.17.130.232]) by b03cxnp08027.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 12GLms0v10420886 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 16 Mar 2021 21:48:54 GMT Received: from b03ledav001.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 46E1A6E053; Tue, 16 Mar 2021 21:48:54 +0000 (GMT) Received: from b03ledav001.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 052796E04E; Tue, 16 Mar 2021 21:48:53 +0000 (GMT) Received: from lexx (unknown [9.163.21.144]) by b03ledav001.gho.boulder.ibm.com (Postfix) with ESMTP; Tue, 16 Mar 2021 21:48:53 +0000 (GMT) Message-ID: Subject: Re: [PATCH] gdb-power10-single-step From: will schmidt To: Ulrich Weigand Cc: gdb-patches@sourceware.org Date: Tue, 16 Mar 2021 16:48:53 -0500 In-Reply-To: <20210310175015.GA4142@oc3748833570.ibm.com> References: <983294f95974a6a3572d31b077f0ca66de554655.camel@vnet.ibm.com> <20210310175015.GA4142@oc3748833570.ibm.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5 (3.28.5-10.el7) Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-03-16_08:2021-03-16, 2021-03-16 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 mlxscore=0 priorityscore=1501 malwarescore=0 mlxlogscore=664 spamscore=0 clxscore=1015 bulkscore=0 adultscore=0 impostorscore=0 lowpriorityscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2103160137 X-Spam-Status: No, score=-5.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 16 Mar 2021 21:48:59 -0000 On Wed, 2021-03-10 at 18:50 +0100, Ulrich Weigand wrote: > Will Schmidt wrote: > > > This is a patch written by Alan Modra. With his permission > > I'm submitting this for review and helping get this upstream. > > > > Powerpc / Power10 ISA 3.1 adds prefixed instructions, which > > are 8 bytes in length. This is in contrast to powerpc previously > > always having 4 byte instruction length. This patch implements > > changes to allow GDB to better detect prefixed instructions, and > > handle single stepping across the 8 byte instructions. > > There's a few issues I see here: > > - The patch now *forces* software single-stepping for all 8-byte > instructions. I'm not sure why this is necessary; I thought > that hardware single-stepping was supported for 8-byte instructions > as well? That would certainly be preferable. Sounds reasonable. I shall add to the queue to investigate. > > - However, the inner loop of ppc_deal_with_atomic_sequence should > probably be updated to correctly skip 8-byte instructions; e.g. > to avoid mistakenly recognizing the second word of an 8-byte > instructions for a branch or store conditional. (Also, the > count of up to "16 instructions" is wrong if 8-byte instructions > are not handled specifically.) Noted. > > - In ppc_displaced_step_fixup 8-byte instructions are now recognized, > and this is good as far as it goes. However, there are some 8-byte > instruction that have PC-relative semantics, and those will need > an additional fixup. (Note that this same fixup is already missing > for the Power9 addpcis instruction, see bug 27525). I have a separate patch in the works to address 27525, specifically for the addpcis/lnia instructions. It does not handle 8-byte instructions as-is, but I've tried to write it with the idea that i'll be updating or supplementing it with subsequent patches to support 8-byte instructions. I'll be sending that along shortly to get some feedback. Thanks for the review. -Will > > Bye, > Ulrich >