From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 76097 invoked by alias); 8 Nov 2018 18:33:06 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 76058 invoked by uid 89); 8 Nov 2018 18:33:02 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-2.7 required=5.0 tests=AWL,BAYES_00,SPF_HELO_PASS,SPF_SOFTFAIL autolearn=no version=3.3.2 spammy=HContent-Transfer-Encoding:8bit X-HELO: mail.baldwin.cx Received: from bigwig.baldwin.cx (HELO mail.baldwin.cx) (96.47.65.170) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 08 Nov 2018 18:33:00 +0000 Received: from John-Baldwins-MacBook-Pro-2.local (ralph.baldwin.cx [66.234.199.215]) by mail.baldwin.cx (Postfix) with ESMTPSA id 820AF10A87D; Thu, 8 Nov 2018 13:32:58 -0500 (EST) Subject: Re: [RFC] gdb/riscv: Add target description support To: Andrew Burgess , gdb-patches@sourceware.org References: <20181108160745.24600-1-andrew.burgess@embecosm.com> Cc: jimw@sifive.com, palmer@sifive.com From: John Baldwin Openpgp: preference=signencrypt Message-ID: Date: Thu, 08 Nov 2018 18:33:00 -0000 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.12; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <20181108160745.24600-1-andrew.burgess@embecosm.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-IsSubscribed: yes X-SW-Source: 2018-11/txt/msg00127.txt.bz2 On 11/8/18 8:07 AM, Andrew Burgess wrote: > This commit adds target description support for riscv. > > I've used the split feature approach for specifying the architectural > features, and the CSR feature is auto-generated from the riscv-opc.h > header file. In general this looks fine to me (as far as I am familiar with the target descriptions). The only possible question/comment I have is if you considered describing fields of specific registers such as the FP status registers or MSTATUS, etc. as fields in the XML to replace the current special cases in riscv_print_one_register_info(). I think the XML can't handle enum values as riscv_print_one_register_info() uses for some cases, but I think it would be able to handle many of the special cases in that function. Some related-ish questions (though not about this patch): I wonder if we can do things with pseudo registers to automatically derive FFLAGS and FRM if a target provides FCSR. One more note: AFAIU, 1.10 of the privilege spec removed hypervisor mode with the intention of implementing virtualization support differently. We might want to remove the references to hypervisor mode from riscv-tdep.c as a result? -- John Baldwin                                                                            Â