RE: [Patch, microblaze]: Add slr and shr regs

[Ajit Kumar Agarwal <ajit.kumar.agarwal@xilinx.com>]

-----Original Message-----
From: Pedro Alves [mailto:palves@redhat.com] 
Sent: Monday, June 09, 2014 11:27 PM
To: Ajit Kumar Agarwal; Michael Eager; gdb-patches@sourceware.org; Yao Qi
Cc: Joel Brobecker; Vinod Kathail; Vidhumouli Hunsigida; Nagaraju Mekala
Subject: Re: [Patch, microblaze]: Add slr and shr regs

On 06/09/2014 06:26 PM, Ajit Kumar Agarwal wrote:
> The slr(stack low register) and shr(stack high registers) are 
> implemented based on C_USE_STACK_PROTECTION is set 0/1. Microblaze 
> being the reconfigurable architecture the design can be selected with 
> and without these registers. Its hard to identify in gdb whether these 
> registers is being implemented for the design or not. In XMD where the 
> gdb client connects to the local host we always display the shr and 
> shl registers irrespective of  C_USE_STACK_PROTECTION is set or not. In the case where the design is not implemented with these register we always display the content to be 0 or ? to the user.
> gdb will also display these registers when the C_USE_STACK_PROTECTION is set 0/1.

This is exactly what target descriptions are supposed to solve.  With those, you can have the target tell GDB about any random register, and GDB will know about it, without having to change GDB.  If the register in question are an important group that GDB needs to be aware of them (seems to be the case here), then target descriptions have this concept of "target features"
to address it.  Grep for tdesc_find_feature in the source tree for numerous examples, and see the "Target Description" and "Standard Target Features" in the manual.

Ajit: Thanks Pedro!! We would surely like to implement this feature in gdb for Microblaze.

--
Pedro Alves