From: Pedro Alves <palves@redhat.com>
To: Ulrich Weigand <uweigand@de.ibm.com>
Cc: Tom Tromey <tom@tromey.com>, gdb-patches@sourceware.org
Subject: [PATCH] Fix Cell debugging regression (Re: [PATCH] Use thread_info and inferior pointers more throughout)
Date: Wed, 27 Jun 2018 12:43:00 -0000 [thread overview]
Message-ID: <e823724c-9f29-d2f8-af84-7a8e08a75649@redhat.com> (raw)
In-Reply-To: <20180627113347.04B6ED801C0@oc3748833570.ibm.com>
On 06/27/2018 12:33 PM, Ulrich Weigand wrote:
> Pedro Alves wrote:
>
>> ps_err_e
>> ps_lgetregs (struct ps_prochandle *ph, lwpid_t lwpid, prgregset_t gregset)
>> {
>> - ptid_t ptid = ptid_build (ptid_get_pid (ph->ptid), lwpid, 0);
>> - struct regcache *regcache
>> - = get_thread_arch_regcache (ptid, target_gdbarch ());
>> + struct regcache *regcache = get_thread_regcache (ph->thread);
>
> This change (and the related ones in the following routines
> completely break Cell multi-arch debugging. The point of using
> get_thread_arch_regcache with target_gdbarch() instead of just
> plain get_thread_regcache is that the proc-service routines
> must always operated on the "main" (in this case PowerPC)
> architecture, because that's the register set libthread_db
> expects to be using.
> The change above switches the behavior to use the SPU architecture
> if GDB happens to interrupt SPU code. This is wrong and causes
> internal GDB errors pretty much instantly when starting an SPU ...
Sorry, missed that. Some comments here would be helpful.
I think this should fix it. WDYT?
From d4b27737d93f466955a34c89a3f304bf4d3579d2 Mon Sep 17 00:00:00 2001
From: Pedro Alves <palves@redhat.com>
Date: Wed, 27 Jun 2018 12:54:50 +0100
Subject: [PATCH] Fix Cell debugging regression
Commit 00431a78b28f ("Use thread_info and inferior pointers more
throughout") broke Cell multi-arch debugging, because it made the
proc-service routines (ps_lgetregs etc.) access registers using the
SPU architecture if GDB happens to interrupt SPU code. The
proc-service routines must always operate on the "main" (in this case
PowerPC) architecture, because that's the register set libthread_db
expects to be using.
Restore the previous behavior, but wrapped in a new
get_thread_main_regcache function with a describing comment hinting at
multi-arch scenarios.
gdb/ChangeLog:
2018-06-27 Pedro Alves <palves@redhat.com>
* proc-service.c (ps_lgetregs, ps_lsetregs, ps_lgetfpregs)
(ps_lsetfpregs): Use get_thread_main_regcache.
* regcache.c (get_thread_main_regcache): Define.
* regcache.h (get_thread_main_regcache): Declare.
---
gdb/proc-service.c | 14 ++++++++++----
gdb/regcache.c | 8 ++++++++
gdb/regcache.h | 8 ++++++++
3 files changed, 26 insertions(+), 4 deletions(-)
diff --git a/gdb/proc-service.c b/gdb/proc-service.c
index 04867d227b..d96a689490 100644
--- a/gdb/proc-service.c
+++ b/gdb/proc-service.c
@@ -126,13 +126,19 @@ ps_pdwrite (struct ps_prochandle *ph, psaddr_t addr,
return ps_xfer_memory (ph, addr, (gdb_byte *) buf, size, 1);
}
+/* The following register-related routines use
+ get_thread_main_regcache instead of get_thread_regcache because in
+ Cell debugging, the proc-service routines must always operate on
+ the "main" (in this case PowerPC) architecture, because that's the
+ register set libthread_db expects to be using. */
+
/* Get the general registers of LWP LWPID within the target process PH
and store them in GREGSET. */
ps_err_e
ps_lgetregs (struct ps_prochandle *ph, lwpid_t lwpid, prgregset_t gregset)
{
- struct regcache *regcache = get_thread_regcache (ph->thread);
+ struct regcache *regcache = get_thread_main_regcache (ph->thread);
target_fetch_registers (regcache, -1);
fill_gregset (regcache, (gdb_gregset_t *) gregset, -1);
@@ -146,7 +152,7 @@ ps_lgetregs (struct ps_prochandle *ph, lwpid_t lwpid, prgregset_t gregset)
ps_err_e
ps_lsetregs (struct ps_prochandle *ph, lwpid_t lwpid, const prgregset_t gregset)
{
- struct regcache *regcache = get_thread_regcache (ph->thread);
+ struct regcache *regcache = get_thread_main_regcache (ph->thread);
supply_gregset (regcache, (const gdb_gregset_t *) gregset);
target_store_registers (regcache, -1);
@@ -160,7 +166,7 @@ ps_lsetregs (struct ps_prochandle *ph, lwpid_t lwpid, const prgregset_t gregset)
ps_err_e
ps_lgetfpregs (struct ps_prochandle *ph, lwpid_t lwpid, gdb_prfpregset_t *fpregset)
{
- struct regcache *regcache = get_thread_regcache (ph->thread);
+ struct regcache *regcache = get_thread_main_regcache (ph->thread);
target_fetch_registers (regcache, -1);
fill_fpregset (regcache, (gdb_fpregset_t *) fpregset, -1);
@@ -175,7 +181,7 @@ ps_err_e
ps_lsetfpregs (struct ps_prochandle *ph, lwpid_t lwpid,
const gdb_prfpregset_t *fpregset)
{
- struct regcache *regcache = get_thread_regcache (ph->thread);
+ struct regcache *regcache = get_thread_main_regcache (ph->thread);
supply_fpregset (regcache, (const gdb_fpregset_t *) fpregset);
target_store_registers (regcache, -1);
diff --git a/gdb/regcache.c b/gdb/regcache.c
index 1bc4f0de88..6380f3cbea 100644
--- a/gdb/regcache.c
+++ b/gdb/regcache.c
@@ -399,6 +399,14 @@ get_thread_regcache (thread_info *thread)
return get_thread_regcache (thread->ptid);
}
+/* See regcache.h. */
+
+struct regcache *
+get_thread_main_regcache (thread_info *thread)
+{
+ return get_thread_arch_regcache (thread->ptid, thread->inf->gdbarch);
+}
+
struct regcache *
get_current_regcache (void)
{
diff --git a/gdb/regcache.h b/gdb/regcache.h
index 983137f6ad..efeb29c1bd 100644
--- a/gdb/regcache.h
+++ b/gdb/regcache.h
@@ -34,6 +34,14 @@ extern struct regcache *get_thread_regcache (ptid_t ptid);
/* Get the regcache of THREAD. */
extern struct regcache *get_thread_regcache (thread_info *thread);
+/* Get the thread's regcache using its inferior's "main" architecture.
+ In multi-arch debugging scenarios, the thread's architecture may
+ differ from the inferior's "main" architecture. E.g., in the Cell
+ combined debugger, if GDB happens to interrupt SPU code, the
+ thread's architecture is SPU, and the main architecture is
+ PowerPC. */
+extern struct regcache *get_thread_main_regcache (thread_info *thread);
+
extern struct regcache *get_thread_arch_regcache (ptid_t, struct gdbarch *);
extern struct regcache *get_thread_arch_aspace_regcache (ptid_t,
struct gdbarch *,
--
2.14.4
next prev parent reply other threads:[~2018-06-27 12:43 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-07 18:07 [PATCH] Use thread_info and inferior pointers more throughout Pedro Alves
2018-06-07 18:28 ` Tom Tromey
2018-06-21 15:57 ` Pedro Alves
2018-06-21 16:21 ` Pedro Alves
2018-06-25 10:18 ` Ulrich Weigand
2018-06-25 10:23 ` Pedro Alves
2018-06-27 11:34 ` Ulrich Weigand
2018-06-27 12:43 ` Pedro Alves [this message]
2018-06-27 13:12 ` [PATCH] Fix Cell debugging regression (Re: [PATCH] Use thread_info and inferior pointers more throughout) Ulrich Weigand
2018-06-27 13:17 ` Pedro Alves
2018-06-27 15:30 ` [PATCH v2] " Pedro Alves
2018-06-27 16:05 ` Ulrich Weigand
2018-06-27 16:25 ` Pedro Alves
2019-02-14 15:45 ` [PATCH] Use thread_info and inferior pointers more throughout Thomas Schwinge
2018-06-27 18:16 ` Possible regression on gdb.multi/multi-arch-exec.exp (was: Re: [PATCH] Use thread_info and inferior pointers more throughout) Sergio Durigan Junior
2018-06-27 18:39 ` Keith Seitz
2018-06-28 12:09 ` Possible regression on gdb.multi/multi-arch-exec.exp Pedro Alves
2018-06-28 16:02 ` [pushed] Fix follow-exec regression / crash (Re: Possible regression on gdb.multi/multi-arch-exec.exp) Pedro Alves
2018-06-28 16:37 ` Sergio Durigan Junior
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