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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Mar 2023 17:26:18.3704 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f7eeca31-7890-451a-7a82-08db270cb80f X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT038.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR08MB7843 X-Spam-Status: No, score=-6.5 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,KAM_DMARC_NONE,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 3/17/23 17:15, Simon Marchi wrote: >> ... despite the call to switch_to_no_thread in switch_to_inferior_no_thread from do_target_wait_1 >> in the backtrace above, the call to ps_xfer_memory sets inferior_ptid momentarily before reading >> memory: >> >> >> static ps_err_e >> ps_xfer_memory (const struct ps_prochandle *ph, psaddr_t addr, >> gdb_byte *buf, size_t len, int write) >> { >> scoped_restore_current_inferior restore_inferior; >> set_current_inferior (ph->thread->inf); >> >> scoped_restore_current_program_space restore_current_progspace; >> set_current_program_space (ph->thread->inf->pspace); >> >> scoped_restore save_inferior_ptid = make_scoped_restore (&inferior_ptid); >> inferior_ptid = ph->thread->ptid; >> >> CORE_ADDR core_addr = ps_addr_to_core_addr (addr); >> >> int ret; >> if (write) >> ret = target_write_memory (core_addr, buf, len); >> else >> ret = target_read_memory (core_addr, buf, len); >> return (ret == 0 ? PS_OK : PS_ERR); >> } >> >> >> Maybe this shouldn't happen, or maybe it is just an unfortunate state to be in. But this >> prevents the use of target_has_registers to guard against the lack of registers, since, >> although current_thread_ is still nullptr, inferior_ptid is valid and is not null_ptid. > It's needed to set inferior_ptid here because it's how we communicate to > the targets which inferior / thread we want to read or write memory > from. And we can't set current_thread_ to the the correponding > thread_info *, because it does not exist at this point (we are in the > process of creating it). And the problem is that > aarch64_remove_non_address_bits assumes there is a current_thread_. Can > we change aarch64_remove_non_address_bits to get the regcache using the > ptid? > > get_thread_regcache (current_inferior ()->process_target (), inferior_ptid); What would be the outcome of this call when there is no active register cache because the inferior has been killed? I think it would assert in find_inferior_pid with a null_ptid. aarch64_remove_non_address_bits gets called for any memory access, so we may be in a state where we have a valid stopped thread, a valid running thread, core file, no inferiors (just reading symbols/bfd) and so on. Or were you considering doing a check for inferior_ptid == null_ptid before calling get_thread_regcache? > > Simon >