* [PATCH 0/2] Add AVX512-FP16 support.
@ 2021-07-29 8:38 Felix Willgerodt
2021-07-29 8:38 ` [PATCH 1/2] Add half support for AVX512 register view Felix Willgerodt
2021-07-29 8:38 ` [PATCH 2/2] gdb: Enable finish command and inferior calls for _Float16 on amd64 and i386 Felix Willgerodt
0 siblings, 2 replies; 11+ messages in thread
From: Felix Willgerodt @ 2021-07-29 8:38 UTC (permalink / raw)
To: gdb-patches
New CPUs will add support for the FP16 data type in AVX512:
https://software.intel.com/content/www/us/en/develop/download/intel-avx512-fp16-architecture-specification.html
This comes with ABI changes that allow _Float16 and _Float16 _Complex as
function arguments and return values.
This series adds support for the register view and ABI changes.
Regards,
Felix
Felix Willgerodt (2):
Add half support for AVX512 register view.
gdb: Enable finish command and inferior calls for _Float16 on amd64
and i386.
gdb/amd64-tdep.c | 12 +-
gdb/features/i386/32bit-sse.c | 5 +
gdb/features/i386/32bit-sse.xml | 2 +
gdb/features/i386/64bit-avx512.c | 5 +
gdb/features/i386/64bit-avx512.xml | 2 +
gdb/features/i386/64bit-sse.c | 5 +
gdb/features/i386/64bit-sse.xml | 2 +
gdb/i386-tdep.c | 15 +-
gdb/testsuite/gdb.arch/x86-avx512fp16-abi.c | 38 ++++
gdb/testsuite/gdb.arch/x86-avx512fp16-abi.exp | 63 +++++++
gdb/testsuite/gdb.arch/x86-avx512fp16.c | 164 ++++++++++++++++++
gdb/testsuite/gdb.arch/x86-avx512fp16.exp | 68 ++++++++
gdb/testsuite/lib/gdb.exp | 51 ++++++
13 files changed, 425 insertions(+), 7 deletions(-)
create mode 100644 gdb/testsuite/gdb.arch/x86-avx512fp16-abi.c
create mode 100644 gdb/testsuite/gdb.arch/x86-avx512fp16-abi.exp
create mode 100644 gdb/testsuite/gdb.arch/x86-avx512fp16.c
create mode 100644 gdb/testsuite/gdb.arch/x86-avx512fp16.exp
--
2.25.4
Intel Deutschland GmbH
Registered Address: Am Campeon 10, 85579 Neubiberg, Germany
Tel: +49 89 99 8853-0, www.intel.de <http://www.intel.de>
Managing Directors: Christin Eisenschmid, Sharon Heck, Tiffany Doon Silva
Chairperson of the Supervisory Board: Nicole Lau
Registered Office: Munich
Commercial Register: Amtsgericht Muenchen HRB 186928
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 1/2] Add half support for AVX512 register view. 2021-07-29 8:38 [PATCH 0/2] Add AVX512-FP16 support Felix Willgerodt @ 2021-07-29 8:38 ` Felix Willgerodt 2021-09-03 12:30 ` Simon Marchi 2021-07-29 8:38 ` [PATCH 2/2] gdb: Enable finish command and inferior calls for _Float16 on amd64 and i386 Felix Willgerodt 1 sibling, 1 reply; 11+ messages in thread From: Felix Willgerodt @ 2021-07-29 8:38 UTC (permalink / raw) To: gdb-patches This adds support for the half datatype, FP16, to the AVX512 register printing. gdb/ChangeLog: 2020-07-21 Felix Willgerodt <Felix.Willgerodt@intel.com> * i386-tdep.c (i386_zmm_type) <v32_half>: New field. (i386_ymm_type) <v16_half>: New field. (i386_gdbarch_init): Add set_gdbarch_half_format. * features/i386/64bit-avx512.xml: Add half type. * features/i386/64bit-avx512.c: Regenerated. * features/i386/64bit-sse.xml: Add half type. * features/i386/64bit-sse.c: Regenerated. gdb/testsuite/ChangeLog: 2021-07-21 Felix Willgerodt <Felix.Willgerodt@intel.com> * gdb.arch/x86-avx512fp16.c: New file. * gdb.arch/x86-avx512fp16.exp: New file. * lib/gdb.exp (skip_avx512fp16_tests): New function. --- gdb/features/i386/32bit-sse.c | 5 + gdb/features/i386/32bit-sse.xml | 2 + gdb/features/i386/64bit-avx512.c | 5 + gdb/features/i386/64bit-avx512.xml | 2 + gdb/features/i386/64bit-sse.c | 5 + gdb/features/i386/64bit-sse.xml | 2 + gdb/i386-tdep.c | 6 + gdb/testsuite/gdb.arch/x86-avx512fp16.c | 164 ++++++++++++++++++++++ gdb/testsuite/gdb.arch/x86-avx512fp16.exp | 68 +++++++++ gdb/testsuite/lib/gdb.exp | 51 +++++++ 10 files changed, 310 insertions(+) create mode 100644 gdb/testsuite/gdb.arch/x86-avx512fp16.c create mode 100644 gdb/testsuite/gdb.arch/x86-avx512fp16.exp diff --git a/gdb/features/i386/32bit-sse.c b/gdb/features/i386/32bit-sse.c index e5eaf8feb59..5554849a6ca 100644 --- a/gdb/features/i386/32bit-sse.c +++ b/gdb/features/i386/32bit-sse.c @@ -10,6 +10,9 @@ create_feature_i386_32bit_sse (struct target_desc *result, long regnum) feature = tdesc_create_feature (result, "org.gnu.gdb.i386.sse"); tdesc_type *element_type; + element_type = tdesc_named_type (feature, "ieee_half"); + tdesc_create_vector (feature, "v8h", element_type, 8); + element_type = tdesc_named_type (feature, "ieee_single"); tdesc_create_vector (feature, "v4f", element_type, 4); @@ -31,6 +34,8 @@ create_feature_i386_32bit_sse (struct target_desc *result, long regnum) tdesc_type_with_fields *type_with_fields; type_with_fields = tdesc_create_union (feature, "vec128"); tdesc_type *field_type; + field_type = tdesc_named_type (feature, "v8h"); + tdesc_add_field (type_with_fields, "v8_half", field_type); field_type = tdesc_named_type (feature, "v4f"); tdesc_add_field (type_with_fields, "v4_float", field_type); field_type = tdesc_named_type (feature, "v2d"); diff --git a/gdb/features/i386/32bit-sse.xml b/gdb/features/i386/32bit-sse.xml index 7bf3e0f3828..78adc04786b 100644 --- a/gdb/features/i386/32bit-sse.xml +++ b/gdb/features/i386/32bit-sse.xml @@ -7,6 +7,7 @@ <!DOCTYPE feature SYSTEM "gdb-target.dtd"> <feature name="org.gnu.gdb.i386.sse"> + <vector id="v8h" type="ieee_half" count="8"/> <vector id="v4f" type="ieee_single" count="4"/> <vector id="v2d" type="ieee_double" count="2"/> <vector id="v16i8" type="int8" count="16"/> @@ -14,6 +15,7 @@ <vector id="v4i32" type="int32" count="4"/> <vector id="v2i64" type="int64" count="2"/> <union id="vec128"> + <field name="v8_half" type="v8h"/> <field name="v4_float" type="v4f"/> <field name="v2_double" type="v2d"/> <field name="v16_int8" type="v16i8"/> diff --git a/gdb/features/i386/64bit-avx512.c b/gdb/features/i386/64bit-avx512.c index 1bd49dcd9d5..9ceadd89cda 100644 --- a/gdb/features/i386/64bit-avx512.c +++ b/gdb/features/i386/64bit-avx512.c @@ -13,6 +13,9 @@ create_feature_i386_64bit_avx512 (struct target_desc *result, long regnum) element_type = tdesc_named_type (feature, "bfloat16"); tdesc_create_vector (feature, "v8bf16", element_type, 8); + element_type = tdesc_named_type (feature, "ieee_half"); + tdesc_create_vector (feature, "v8h", element_type, 8); + element_type = tdesc_named_type (feature, "ieee_single"); tdesc_create_vector (feature, "v4f", element_type, 4); @@ -36,6 +39,8 @@ create_feature_i386_64bit_avx512 (struct target_desc *result, long regnum) tdesc_type *field_type; field_type = tdesc_named_type (feature, "v8bf16"); tdesc_add_field (type_with_fields, "v8_bfloat16", field_type); + field_type = tdesc_named_type (feature, "v8h"); + tdesc_add_field (type_with_fields, "v8_half", field_type); field_type = tdesc_named_type (feature, "v4f"); tdesc_add_field (type_with_fields, "v4_float", field_type); field_type = tdesc_named_type (feature, "v2d"); diff --git a/gdb/features/i386/64bit-avx512.xml b/gdb/features/i386/64bit-avx512.xml index a4c7f02d6d8..b7fe4d5015b 100644 --- a/gdb/features/i386/64bit-avx512.xml +++ b/gdb/features/i386/64bit-avx512.xml @@ -8,6 +8,7 @@ <!DOCTYPE feature SYSTEM "gdb-target.dtd"> <feature name="org.gnu.gdb.i386.avx512"> <vector id="v8bf16" type="bfloat16" count="8"/> + <vector id="v8h" type="ieee_half" count="8"/> <vector id="v4f" type="ieee_single" count="4"/> <vector id="v2d" type="ieee_double" count="2"/> <vector id="v16i8" type="int8" count="16"/> @@ -16,6 +17,7 @@ <vector id="v2i64" type="int64" count="2"/> <union id="vec128"> <field name="v8_bfloat16" type="v8bf16"/> + <field name="v8_half" type="v8h"/> <field name="v4_float" type="v4f"/> <field name="v2_double" type="v2d"/> <field name="v16_int8" type="v16i8"/> diff --git a/gdb/features/i386/64bit-sse.c b/gdb/features/i386/64bit-sse.c index 645e3141337..ffb7a45ec1a 100644 --- a/gdb/features/i386/64bit-sse.c +++ b/gdb/features/i386/64bit-sse.c @@ -13,6 +13,9 @@ create_feature_i386_64bit_sse (struct target_desc *result, long regnum) element_type = tdesc_named_type (feature, "bfloat16"); tdesc_create_vector (feature, "v8bf16", element_type, 8); + element_type = tdesc_named_type (feature, "ieee_half"); + tdesc_create_vector (feature, "v8h", element_type, 8); + element_type = tdesc_named_type (feature, "ieee_single"); tdesc_create_vector (feature, "v4f", element_type, 4); @@ -36,6 +39,8 @@ create_feature_i386_64bit_sse (struct target_desc *result, long regnum) tdesc_type *field_type; field_type = tdesc_named_type (feature, "v8bf16"); tdesc_add_field (type_with_fields, "v8_bfloat16", field_type); + field_type = tdesc_named_type (feature, "v8h"); + tdesc_add_field (type_with_fields, "v8_half", field_type); field_type = tdesc_named_type (feature, "v4f"); tdesc_add_field (type_with_fields, "v4_float", field_type); field_type = tdesc_named_type (feature, "v2d"); diff --git a/gdb/features/i386/64bit-sse.xml b/gdb/features/i386/64bit-sse.xml index f23d4d5cb4e..9ae2310af33 100644 --- a/gdb/features/i386/64bit-sse.xml +++ b/gdb/features/i386/64bit-sse.xml @@ -8,6 +8,7 @@ <!DOCTYPE feature SYSTEM "gdb-target.dtd"> <feature name="org.gnu.gdb.i386.sse"> <vector id="v8bf16" type="bfloat16" count="8"/> + <vector id="v8h" type="ieee_half" count="8"/> <vector id="v4f" type="ieee_single" count="4"/> <vector id="v2d" type="ieee_double" count="2"/> <vector id="v16i8" type="int8" count="16"/> @@ -16,6 +17,7 @@ <vector id="v2i64" type="int64" count="2"/> <union id="vec128"> <field name="v8_bfloat16" type="v8bf16"/> + <field name="v8_half" type="v8h"/> <field name="v4_float" type="v4f"/> <field name="v2_double" type="v2d"/> <field name="v16_int8" type="v16i8"/> diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c index e436437c683..c2835a2458d 100644 --- a/gdb/i386-tdep.c +++ b/gdb/i386-tdep.c @@ -3117,6 +3117,7 @@ i386_zmm_type (struct gdbarch *gdbarch) int8_t v64_int8[64]; double v8_double[8]; float v16_float[16]; + float16_t v32_half[32]; bfloat16_t v32_bfloat16[32]; }; #endif @@ -3127,6 +3128,8 @@ i386_zmm_type (struct gdbarch *gdbarch) "__gdb_builtin_type_vec512i", TYPE_CODE_UNION); append_composite_type_field (t, "v32_bfloat16", init_vector_type (bt->builtin_bfloat16, 32)); + append_composite_type_field (t, "v32_half", + init_vector_type (bt->builtin_half, 32)); append_composite_type_field (t, "v16_float", init_vector_type (bt->builtin_float, 16)); append_composite_type_field (t, "v8_double", @@ -3173,6 +3176,7 @@ i386_ymm_type (struct gdbarch *gdbarch) int8_t v32_int8[32]; double v4_double[4]; float v8_float[8]; + float16_t v16_half[16]; bfloat16_t v16_bfloat16[16]; }; #endif @@ -3183,6 +3187,8 @@ i386_ymm_type (struct gdbarch *gdbarch) "__gdb_builtin_type_vec256i", TYPE_CODE_UNION); append_composite_type_field (t, "v16_bfloat16", init_vector_type (bt->builtin_bfloat16, 16)); + append_composite_type_field (t, "v16_half", + init_vector_type (bt->builtin_half, 16)); append_composite_type_field (t, "v8_float", init_vector_type (bt->builtin_float, 8)); append_composite_type_field (t, "v4_double", diff --git a/gdb/testsuite/gdb.arch/x86-avx512fp16.c b/gdb/testsuite/gdb.arch/x86-avx512fp16.c new file mode 100644 index 00000000000..ebc72957bb3 --- /dev/null +++ b/gdb/testsuite/gdb.arch/x86-avx512fp16.c @@ -0,0 +1,164 @@ +/* Test program for bfloat16 of AVX 512 registers. + + Copyright 2021 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see <http://www.gnu.org/licenses/>. */ + +typedef struct +{ + float f[4]; +} v4sd_t; + +typedef struct +{ + float f[8]; +} v8sd_t; + +typedef struct +{ + float f[16]; +} v16sd_t; + +v4sd_t xmm_data[] = +{ + { { 0.0, 0.125, 0.25, 0.375 } }, + { { 0.5, 0.625, 0.75, 0.875 } }, + { { 1.0, 1.125, 1.25, 1.375 } }, + { { 1.5, 1.625, 1.75, 1.875 } }, + { { 2.0, 2.125, 2.25, 2.375 } }, + { { 2.5, 2.625, 2.75, 2.875 } }, + { { 3.0, 3.125, 3.25, 3.375 } }, + { { 3.5, 3.625, 3.75, 3.875 } }, +}; + +v8sd_t ymm_data[] = +{ + { { 8.0, 8.25, 8.5, 8.75, 9.0, 9.25, 9.5, 9.75 } }, + { { 10.0, 10.25, 10.5, 10.75, 11.0, 11.25, 11.5, 11.75 } }, + { { 12.0, 12.25, 12.5, 12.75, 13.0, 13.25, 13.5, 13.75 } }, + { { 14.0, 14.25, 14.5, 14.75, 15.0, 15.25, 15.5, 15.75 } }, + { { 16.0, 16.25, 16.5, 16.75, 17.0, 17.25, 17.5, 17.75 } }, + { { 18.0, 18.25, 18.5, 18.75, 19.0, 19.25, 19.5, 19.75 } }, + { { 20.0, 20.25, 20.5, 20.75, 21.0, 21.25, 21.5, 21.75 } }, + { { 22.0, 22.25, 22.5, 22.75, 23.0, 23.25, 23.5, 23.75 } }, +}; + +v16sd_t zmm_data[] = +{ + { { 20.0, 20.5, 21.0, 21.5, 22.0, 22.5, 23.0, 23.5, 24.0, 24.5, + 25.0, 25.5, 26.0, 26.5, 27.0, 27.5 } }, + { { 28.0, 28.5, 29.0, 29.5, 30.0, 30.5, 31.0, 31.5, 32.0, 32.5, + 33.0, 33.5, 34.0, 34.5, 35.0, 35.5 } }, + { { 36.0, 36.5, 37.0, 37.5, 38.0, 38.5, 39.0, 39.5, 40.0, 40.5, + 41.0, 41.5, 42.0, 42.5, 43.0, 43.5 } }, + { { 44.0, 44.5, 45.0, 45.5, 46.0, 46.5, 47.0, 47.5, 48.0, 48.5, + 49.0, 49.5, 50.0, 50.5, 51.0, 51.5 } }, + { { 52.0, 52.5, 53.0, 53.5, 54.0, 54.5, 55.0, 55.5, 56.0, 56.5, + 57.0, 57.5, 58.0, 58.5, 59.0, 59.5 } }, + { { 60.0, 60.5, 61.0, 61.5, 62.0, 62.5, 63.0, 63.5, 64.0, 64.5, + 65.0, 65.5, 66.0, 66.5, 67.0, 67.5 } }, + { { 68.0, 68.5, 69.0, 69.5, 70.0, 70.5, 71.0, 71.5, 72.0, 72.5, + 73.0, 73.5, 74.0, 74.5, 75.0, 75.5 } }, + { { 76.0, 76.5, 77.0, 77.5, 78.0, 78.5, 79.0, 79.5, 80.0, 80.5, + 81.0, 81.5, 82.0, 82.5, 83.0, 83.5 } }, +}; + +void +move_data_to_xmm_reg (void) +{ + asm ("vmovups 0(%0), %%xmm0 \n\t" + "vmovups 16(%0), %%xmm1 \n\t" + "vmovups 32(%0), %%xmm2 \n\t" + "vmovups 48(%0), %%xmm3 \n\t" + "vmovups 64(%0), %%xmm4 \n\t" + "vmovups 80(%0), %%xmm5 \n\t" + "vmovups 96(%0), %%xmm6 \n\t" + "vmovups 112(%0), %%xmm7 \n\t" + : /* no output operands */ + : "r" (xmm_data)); +} + +void +move_data_to_ymm_reg (void) +{ + asm ("vmovups 0(%0), %%ymm0 \n\t" + "vmovups 32(%0), %%ymm1 \n\t" + "vmovups 64(%0), %%ymm2 \n\t" + "vmovups 96(%0), %%ymm3 \n\t" + "vmovups 128(%0), %%ymm4 \n\t" + "vmovups 160(%0), %%ymm5 \n\t" + "vmovups 192(%0), %%ymm6 \n\t" + "vmovups 224(%0), %%ymm7 \n\t" + : /* no output operands */ + : "r" (ymm_data)); +} + +void +move_data_to_zmm_reg (void) +{ + asm ("vmovups 0(%0), %%zmm0 \n\t" + "vmovups 64(%0), %%zmm1 \n\t" + "vmovups 128(%0), %%zmm2 \n\t" + "vmovups 192(%0), %%zmm3 \n\t" + "vmovups 256(%0), %%zmm4 \n\t" + "vmovups 320(%0), %%zmm5 \n\t" + "vmovups 384(%0), %%zmm6 \n\t" + "vmovups 448(%0), %%zmm7 \n\t" + : /* no output operands */ + : "r" (zmm_data)); +} + +void +convert_xmm_from_float_to_half (void) +{ + asm("vcvtps2phx %xmm1, %xmm0"); + asm("vcvtps2phx %xmm7, %xmm6"); +} + +void +convert_ymm_from_float_to_half (void) +{ + asm("vcvtps2phx %ymm1, %xmm0"); + asm("vcvtps2phx %ymm7, %xmm6"); +} + +void +convert_zmm_from_float_to_half (void) +{ + asm("vcvtps2phx %zmm1, %ymm0"); + asm("vcvtps2phx %zmm7, %ymm6"); +} + +int +main () +{ + /* Move initial values from array to registers and read from XMM regs. */ + move_data_to_xmm_reg (); + convert_xmm_from_float_to_half (); + asm ("nop"); /* first breakpoint here */ + + /* Move initial values from array to registers and read from YMM regs. */ + move_data_to_ymm_reg (); + convert_ymm_from_float_to_half (); + asm ("nop"); /* second breakpoint here */ + + /* Move initial values from array to registers and read from ZMM regs. */ + move_data_to_zmm_reg (); + convert_zmm_from_float_to_half (); + asm ("nop"); /* third breakpoint here */ + + return 0; +} diff --git a/gdb/testsuite/gdb.arch/x86-avx512fp16.exp b/gdb/testsuite/gdb.arch/x86-avx512fp16.exp new file mode 100644 index 00000000000..22575cc2fe8 --- /dev/null +++ b/gdb/testsuite/gdb.arch/x86-avx512fp16.exp @@ -0,0 +1,68 @@ +# Copyright 2021 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. + +# Test fp16 support in AVX512 registers. + +if { [skip_avx512fp16_tests] } { + unsupported "target does not support AVX512fp16" + return -1 +} + +standard_testfile + +if { [prepare_for_testing "failed to prepare" ${testfile} ${srcfile}] } { + return -1 +} + +if { ![runto_main] } { + unsupported "could not run to main" + return -1 +} + +# Test xmm. +set line1 [gdb_get_line_number "first breakpoint here"] +gdb_breakpoint $line1 +gdb_continue_to_breakpoint "line1" ".*$srcfile:$line1.*" + +gdb_test "print \$xmm0.v8_half" \ + "= \\{0.5, 0.625, 0.75, 0.875, 0, 0, 0, 0\\}" + +gdb_test "print \$xmm6.v8_half" \ + "= \\{3.5, 3.625, 3.75, 3.875, 0, 0, 0, 0\\}" + +# Test ymm. +set line2 [gdb_get_line_number "second breakpoint here"] +gdb_breakpoint $line2 +gdb_continue_to_breakpoint "line2" ".*$srcfile:$line2.*" + +gdb_test "print \$ymm0.v16_half\[1\]" "= 10.25" +gdb_test "print \$ymm6.v16_half\[1\]" "= 22.25" + +# Test zmm. +set line3 [gdb_get_line_number "third breakpoint here"] +gdb_breakpoint $line3 +gdb_continue_to_breakpoint "line3" ".*$srcfile:$line3.*" + +gdb_test "print \$zmm0.v32_half\[1\]" "= 28.5" +gdb_test "print \$zmm6.v32_half\[1\]" "= 76.5" + +# Test setting of half values. +gdb_test_no_output "set var \$xmm0.v8_half\[0\] = 32.25" +gdb_test_no_output "set var \$ymm3.v16_half\[1\] = 33.5" +gdb_test_no_output "set var \$zmm7.v32_half\[2\] = 22.75" + +gdb_test "p \$xmm0.v8_half\[0\]" "= 32.25" +gdb_test "p \$ymm3.v16_half\[1\]" "= 33.5" +gdb_test "p \$zmm7.v32_half\[2\]" "= 22.75" diff --git a/gdb/testsuite/lib/gdb.exp b/gdb/testsuite/lib/gdb.exp index 2f95989440a..b38603aaded 100644 --- a/gdb/testsuite/lib/gdb.exp +++ b/gdb/testsuite/lib/gdb.exp @@ -3384,6 +3384,57 @@ gdb_caching_proc skip_avx512bf16_tests { return $skip_avx512bf16_tests } +# Run a test on the target to see if it supports avx512fp16. Return 0 if so, +# 1 if it does not. Based on 'check_vmx_hw_available' from the GCC testsuite. + +gdb_caching_proc skip_avx512fp16_tests { + global srcdir subdir gdb_prompt inferior_exited_re + + set me "skip_avx512fp16_tests" + if { ![istarget "i?86-*-*"] && ![istarget "x86_64-*-*"] } { + verbose "$me: target does not support avx512fp16, returning 1" 2 + return 1 + } + + # Compile a test program. + set src { + int main() { + asm volatile ("vcvtps2phx %xmm1, %xmm0"); + return 0; + } + } + if {![gdb_simple_compile $me $src executable]} { + return 1 + } + + # No error message, compilation succeeded so now run it via gdb. + + gdb_exit + gdb_start + gdb_reinitialize_dir $srcdir/$subdir + gdb_load "$obj" + gdb_run_cmd + gdb_expect { + -re ".*Illegal instruction.*${gdb_prompt} $" { + verbose -log "$me: avx512fp16 hardware not detected." + set skip_avx512fp16_tests 1 + } + -re ".*$inferior_exited_re normally.*${gdb_prompt} $" { + verbose -log "$me: avx512fp16 hardware detected." + set skip_avx512fp16_tests 0 + } + default { + warning "\n$me: default case taken." + set skip_avx512fp16_tests 1 + } + } + gdb_exit + remote_file build delete $obj + + verbose "$me: returning $skip_avx512fp16_tests" 2 + return $skip_avx512fp16_tests +} + # Run a test on the target to see if it supports btrace hardware. Return 0 if so, # 1 if it does not. Based on 'check_vmx_hw_available' from the GCC testsuite. -- 2.25.4 Intel Deutschland GmbH Registered Address: Am Campeon 10, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de <http://www.intel.de> Managing Directors: Christin Eisenschmid, Sharon Heck, Tiffany Doon Silva Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928 ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/2] Add half support for AVX512 register view. 2021-07-29 8:38 ` [PATCH 1/2] Add half support for AVX512 register view Felix Willgerodt @ 2021-09-03 12:30 ` Simon Marchi 2021-09-03 12:55 ` Willgerodt, Felix 0 siblings, 1 reply; 11+ messages in thread From: Simon Marchi @ 2021-09-03 12:30 UTC (permalink / raw) To: Felix Willgerodt, gdb-patches > diff --git a/gdb/features/i386/32bit-sse.c b/gdb/features/i386/32bit-sse.c > index e5eaf8feb59..5554849a6ca 100644 > --- a/gdb/features/i386/32bit-sse.c > +++ b/gdb/features/i386/32bit-sse.c > @@ -10,6 +10,9 @@ create_feature_i386_32bit_sse (struct target_desc *result, long regnum) > > feature = tdesc_create_feature (result, "org.gnu.gdb.i386.sse"); > tdesc_type *element_type; > + element_type = tdesc_named_type (feature, "ieee_half"); ieee_half isn't listed on this page: https://sourceware.org/gdb/current/onlinedocs/gdb/Predefined-Target-Types.html Should it? Otherwise, LGTM. Simon ^ permalink raw reply [flat|nested] 11+ messages in thread
* RE: [PATCH 1/2] Add half support for AVX512 register view. 2021-09-03 12:30 ` Simon Marchi @ 2021-09-03 12:55 ` Willgerodt, Felix 2021-09-03 12:59 ` Simon Marchi 0 siblings, 1 reply; 11+ messages in thread From: Willgerodt, Felix @ 2021-09-03 12:55 UTC (permalink / raw) To: Simon Marchi, gdb-patches > ieee_half isn't listed on this page: > > https://sourceware.org/gdb/current/onlinedocs/gdb/Predefined-Target- > Types.html > > Should it? It probably should. It already existed before my patches though, for both ARM and x86. Is it ok if I post a separate patch to add it (and bfloat16 as well I guess)? Thanks, Felix Intel Deutschland GmbH Registered Address: Am Campeon 10, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de <http://www.intel.de> Managing Directors: Christin Eisenschmid, Sharon Heck, Tiffany Doon Silva Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928 ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/2] Add half support for AVX512 register view. 2021-09-03 12:55 ` Willgerodt, Felix @ 2021-09-03 12:59 ` Simon Marchi 0 siblings, 0 replies; 11+ messages in thread From: Simon Marchi @ 2021-09-03 12:59 UTC (permalink / raw) To: Willgerodt, Felix, gdb-patches On 2021-09-03 8:55 a.m., Willgerodt, Felix wrote: >> ieee_half isn't listed on this page: >> >> https://sourceware.org/gdb/current/onlinedocs/gdb/Predefined-Target- >> Types.html >> >> Should it? > > It probably should. It already existed before my patches though, for both ARM and > x86. Is it ok if I post a separate patch to add it (and bfloat16 as well I guess)? Yes, no problem, thanks in advance! Simon ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 2/2] gdb: Enable finish command and inferior calls for _Float16 on amd64 and i386. 2021-07-29 8:38 [PATCH 0/2] Add AVX512-FP16 support Felix Willgerodt 2021-07-29 8:38 ` [PATCH 1/2] Add half support for AVX512 register view Felix Willgerodt @ 2021-07-29 8:38 ` Felix Willgerodt 2021-07-29 16:03 ` Luis Machado 1 sibling, 1 reply; 11+ messages in thread From: Felix Willgerodt @ 2021-07-29 8:38 UTC (permalink / raw) To: gdb-patches Values of type _Float16 and _Float16 _Complex can now be used on CPUs with AVX512-FP16 support. Return values of those types are located in XMM0. Compiler support for gcc and clang is in progress, see e.g.: https://gcc.gnu.org/pipermail/gcc-patches/2021-July/574117.html gdb/ChangeLog: 2021-07-21 Felix Willgerodt <Felix.Willgerodt@intel.com> * amd64-tdep.c (amd64_classify): Classify _Float16 and _Float16 _Complex as AMD64_SSE. * i386-tdep.c (i386_extract_return_value): Read _Float16 and _Float16 _Complex from xmm0. gdb/testsuite/ChangeLog: 2021-07-21 Felix Willgerodt <Felix.Willgerodt@intel.com> * gdb.arch/x86-avx512fp16-abi.c: New file. * gdb.arch/x86-avx512fp16-abi.exp: New file. --- gdb/amd64-tdep.c | 12 ++-- gdb/i386-tdep.c | 9 ++- gdb/testsuite/gdb.arch/x86-avx512fp16-abi.c | 38 +++++++++++ gdb/testsuite/gdb.arch/x86-avx512fp16-abi.exp | 63 +++++++++++++++++++ 4 files changed, 115 insertions(+), 7 deletions(-) create mode 100644 gdb/testsuite/gdb.arch/x86-avx512fp16-abi.c create mode 100644 gdb/testsuite/gdb.arch/x86-avx512fp16-abi.exp diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c index c028e1bd0f6..129f07e598d 100644 --- a/gdb/amd64-tdep.c +++ b/gdb/amd64-tdep.c @@ -728,10 +728,10 @@ amd64_classify (struct type *type, enum amd64_reg_class theclass[2]) && (len == 1 || len == 2 || len == 4 || len == 8)) theclass[0] = AMD64_INTEGER; - /* Arguments of types float, double, _Decimal32, _Decimal64 and __m64 - are in class SSE. */ + /* Arguments of types _Float16, float, double, _Decimal32, _Decimal64 and + __m64 are in class SSE. */ else if ((code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT) - && (len == 4 || len == 8)) + && (len == 2 || len == 4 || len == 8)) /* FIXME: __m64 . */ theclass[0] = AMD64_SSE; @@ -749,8 +749,8 @@ amd64_classify (struct type *type, enum amd64_reg_class theclass[2]) /* Class X87 and X87UP. */ theclass[0] = AMD64_X87, theclass[1] = AMD64_X87UP; - /* Arguments of complex T where T is one of the types float or - double get treated as if they are implemented as: + /* Arguments of complex T - where T is one of the types _Float16, float or + double - get treated as if they are implemented as: struct complexT { T real; @@ -758,7 +758,7 @@ amd64_classify (struct type *type, enum amd64_reg_class theclass[2]) }; */ - else if (code == TYPE_CODE_COMPLEX && len == 8) + else if (code == TYPE_CODE_COMPLEX && (len == 8 || len == 4)) theclass[0] = AMD64_SSE; else if (code == TYPE_CODE_COMPLEX && len == 16) theclass[0] = theclass[1] = AMD64_SSE; diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c index c2835a2458d..6c7f7f7592d 100644 --- a/gdb/i386-tdep.c +++ b/gdb/i386-tdep.c @@ -2818,7 +2818,14 @@ i386_extract_return_value (struct gdbarch *gdbarch, struct type *type, int len = TYPE_LENGTH (type); gdb_byte buf[I386_MAX_REGISTER_SIZE]; - if (type->code () == TYPE_CODE_FLT) + /* _FLoat16 and _Float16 _Complex values are returned via xmm0. */ + if (((type->code () == TYPE_CODE_FLT) && len == 2) + || ((type->code () == TYPE_CODE_COMPLEX) && len == 4)) + { + regcache->raw_read (I387_XMM0_REGNUM (tdep), valbuf); + return; + } + else if (type->code () == TYPE_CODE_FLT) { if (tdep->st0_regnum < 0) { diff --git a/gdb/testsuite/gdb.arch/x86-avx512fp16-abi.c b/gdb/testsuite/gdb.arch/x86-avx512fp16-abi.c new file mode 100644 index 00000000000..c5b188ea546 --- /dev/null +++ b/gdb/testsuite/gdb.arch/x86-avx512fp16-abi.c @@ -0,0 +1,38 @@ +/* Test program for bfloat16 of AVX 512 registers. + + Copyright 2021 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see <http://www.gnu.org/licenses/>. */ +#include <complex.h> + +_Float16 +square (_Float16 num) { + return num * num; /* BP1. */ +} + +_Float16 _Complex +plus (_Float16 _Complex num) { + return num + (2.5 + 0.5I); /* BP2. */ +} + +int +main () +{ + _Float16 a = square (1.25); + _Float16 _Complex b = 6.25 + I; + _Float16 _Complex ret = plus (b); /* BP3. */ + return 0; +} diff --git a/gdb/testsuite/gdb.arch/x86-avx512fp16-abi.exp b/gdb/testsuite/gdb.arch/x86-avx512fp16-abi.exp new file mode 100644 index 00000000000..61cd189a3dd --- /dev/null +++ b/gdb/testsuite/gdb.arch/x86-avx512fp16-abi.exp @@ -0,0 +1,63 @@ +# Copyright 2021 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. + +# Test support for _Float16 parameters and return values. + +if { [skip_avx512fp16_tests] } { + unsupported "target does not support AVX512fp16" + return -1 +} + +standard_testfile + +if { [prepare_for_testing "failed to prepare" ${testfile} ${srcfile} \ + {debug additional_flags="-mavx512fp16"}] } { + return -1 +} + +if { ![runto_main] } { + unsupported "could not run to main" + return -1 +} + +gdb_test "p square(2.2)" "= 4\\.8359" + +set line1 [gdb_get_line_number "BP1"] +set line2 [gdb_get_line_number "BP2"] +set line3 [gdb_get_line_number "BP3"] +gdb_breakpoint $line1 +gdb_breakpoint $line3 + +gdb_continue_to_breakpoint "line1" ".*$srcfile:$line1.*" + +with_test_prefix "real" { + gdb_test "p num" "= 1\\.25" + gdb_test "ptype num" "type = _Float16" + gdb_test "finish" "Value returned is.*= 1\\.5625" +} + +gdb_continue_to_breakpoint "line3" ".*$srcfile:$line3.*" +gdb_test "p plus(b)" "= 8\\.75 \\+ 1\\.5i" + +gdb_breakpoint $line2 +gdb_continue_to_breakpoint "line2" ".*$srcfile:$line2.*" + +with_test_prefix "complex" { + gdb_test "p num" "= 6\\.25 \\+ 1i" + gdb_test "ptype num" "type = complex _Float16" + gdb_test "finish" "Value returned is.*= 8\\.75 \\+ 1\\.5i" +} + +gdb_continue_to_end -- 2.25.4 Intel Deutschland GmbH Registered Address: Am Campeon 10, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de <http://www.intel.de> Managing Directors: Christin Eisenschmid, Sharon Heck, Tiffany Doon Silva Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928 ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 2/2] gdb: Enable finish command and inferior calls for _Float16 on amd64 and i386. 2021-07-29 8:38 ` [PATCH 2/2] gdb: Enable finish command and inferior calls for _Float16 on amd64 and i386 Felix Willgerodt @ 2021-07-29 16:03 ` Luis Machado 2021-07-30 7:52 ` Willgerodt, Felix 0 siblings, 1 reply; 11+ messages in thread From: Luis Machado @ 2021-07-29 16:03 UTC (permalink / raw) To: Felix Willgerodt, gdb-patches Hi, On 7/29/21 5:38 AM, Felix Willgerodt via Gdb-patches wrote: > Values of type _Float16 and _Float16 _Complex can now be used on CPUs with > AVX512-FP16 support. Return values of those types are located in XMM0. > Compiler support for gcc and clang is in progress, see e.g.: > https://gcc.gnu.org/pipermail/gcc-patches/2021-July/574117.html Is _Float16 equivalent to fp16? If so, the presence of yet another name for a fp16 type is a bit unfortunate. > > gdb/ChangeLog: > 2021-07-21 Felix Willgerodt <Felix.Willgerodt@intel.com> > > * amd64-tdep.c (amd64_classify): Classify _Float16 and > _Float16 _Complex as AMD64_SSE. > * i386-tdep.c (i386_extract_return_value): Read _Float16 and > _Float16 _Complex from xmm0. > > gdb/testsuite/ChangeLog: > 2021-07-21 Felix Willgerodt <Felix.Willgerodt@intel.com> > > * gdb.arch/x86-avx512fp16-abi.c: New file. > * gdb.arch/x86-avx512fp16-abi.exp: New file. > --- > gdb/amd64-tdep.c | 12 ++-- > gdb/i386-tdep.c | 9 ++- > gdb/testsuite/gdb.arch/x86-avx512fp16-abi.c | 38 +++++++++++ > gdb/testsuite/gdb.arch/x86-avx512fp16-abi.exp | 63 +++++++++++++++++++ > 4 files changed, 115 insertions(+), 7 deletions(-) > create mode 100644 gdb/testsuite/gdb.arch/x86-avx512fp16-abi.c > create mode 100644 gdb/testsuite/gdb.arch/x86-avx512fp16-abi.exp > > diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c > index c028e1bd0f6..129f07e598d 100644 > --- a/gdb/amd64-tdep.c > +++ b/gdb/amd64-tdep.c > @@ -728,10 +728,10 @@ amd64_classify (struct type *type, enum amd64_reg_class theclass[2]) > && (len == 1 || len == 2 || len == 4 || len == 8)) > theclass[0] = AMD64_INTEGER; > > - /* Arguments of types float, double, _Decimal32, _Decimal64 and __m64 > - are in class SSE. */ > + /* Arguments of types _Float16, float, double, _Decimal32, _Decimal64 and > + __m64 are in class SSE. */ > else if ((code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT) > - && (len == 4 || len == 8)) > + && (len == 2 || len == 4 || len == 8)) > /* FIXME: __m64 . */ > theclass[0] = AMD64_SSE; > > @@ -749,8 +749,8 @@ amd64_classify (struct type *type, enum amd64_reg_class theclass[2]) > /* Class X87 and X87UP. */ > theclass[0] = AMD64_X87, theclass[1] = AMD64_X87UP; > > - /* Arguments of complex T where T is one of the types float or > - double get treated as if they are implemented as: > + /* Arguments of complex T - where T is one of the types _Float16, float or > + double - get treated as if they are implemented as: > > struct complexT { > T real; > @@ -758,7 +758,7 @@ amd64_classify (struct type *type, enum amd64_reg_class theclass[2]) > }; > > */ > - else if (code == TYPE_CODE_COMPLEX && len == 8) > + else if (code == TYPE_CODE_COMPLEX && (len == 8 || len == 4)) > theclass[0] = AMD64_SSE; > else if (code == TYPE_CODE_COMPLEX && len == 16) > theclass[0] = theclass[1] = AMD64_SSE; > diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c > index c2835a2458d..6c7f7f7592d 100644 > --- a/gdb/i386-tdep.c > +++ b/gdb/i386-tdep.c > @@ -2818,7 +2818,14 @@ i386_extract_return_value (struct gdbarch *gdbarch, struct type *type, > int len = TYPE_LENGTH (type); > gdb_byte buf[I386_MAX_REGISTER_SIZE]; > > - if (type->code () == TYPE_CODE_FLT) > + /* _FLoat16 and _Float16 _Complex values are returned via xmm0. */ _Float16 > + if (((type->code () == TYPE_CODE_FLT) && len == 2) > + || ((type->code () == TYPE_CODE_COMPLEX) && len == 4)) > + { > + regcache->raw_read (I387_XMM0_REGNUM (tdep), valbuf); > + return; > + } > + else if (type->code () == TYPE_CODE_FLT) > { > if (tdep->st0_regnum < 0) > { > diff --git a/gdb/testsuite/gdb.arch/x86-avx512fp16-abi.c b/gdb/testsuite/gdb.arch/x86-avx512fp16-abi.c > new file mode 100644 > index 00000000000..c5b188ea546 > --- /dev/null > +++ b/gdb/testsuite/gdb.arch/x86-avx512fp16-abi.c > @@ -0,0 +1,38 @@ > +/* Test program for bfloat16 of AVX 512 registers. float16 and not bfloat16, right? > + > + Copyright 2021 Free Software Foundation, Inc. > + > + This file is part of GDB. > + > + This program is free software; you can redistribute it and/or modify > + it under the terms of the GNU General Public License as published by > + the Free Software Foundation; either version 3 of the License, or > + (at your option) any later version. > + > + This program is distributed in the hope that it will be useful, > + but WITHOUT ANY WARRANTY; without even the implied warranty of > + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + GNU General Public License for more details. > + > + You should have received a copy of the GNU General Public License > + along with this program. If not, see <http://www.gnu.org/licenses/>. */ > +#include <complex.h> > + > +_Float16 > +square (_Float16 num) { > + return num * num; /* BP1. */ > +} > + > +_Float16 _Complex > +plus (_Float16 _Complex num) { > + return num + (2.5 + 0.5I); /* BP2. */ > +} > + > +int > +main () > +{ > + _Float16 a = square (1.25); > + _Float16 _Complex b = 6.25 + I; > + _Float16 _Complex ret = plus (b); /* BP3. */ > + return 0; > +} > diff --git a/gdb/testsuite/gdb.arch/x86-avx512fp16-abi.exp b/gdb/testsuite/gdb.arch/x86-avx512fp16-abi.exp > new file mode 100644 > index 00000000000..61cd189a3dd > --- /dev/null > +++ b/gdb/testsuite/gdb.arch/x86-avx512fp16-abi.exp > @@ -0,0 +1,63 @@ > +# Copyright 2021 Free Software Foundation, Inc. > + > +# This program is free software; you can redistribute it and/or modify > +# it under the terms of the GNU General Public License as published by > +# the Free Software Foundation; either version 3 of the License, or > +# (at your option) any later version. > +# > +# This program is distributed in the hope that it will be useful, > +# but WITHOUT ANY WARRANTY; without even the implied warranty of > +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > +# GNU General Public License for more details. > +# > +# You should have received a copy of the GNU General Public License > +# along with this program. If not, see <http://www.gnu.org/licenses/>. > + > +# Test support for _Float16 parameters and return values. > + > +if { [skip_avx512fp16_tests] } { > + unsupported "target does not support AVX512fp16" > + return -1 > +} > + > +standard_testfile > + > +if { [prepare_for_testing "failed to prepare" ${testfile} ${srcfile} \ > + {debug additional_flags="-mavx512fp16"}] } { > + return -1 > +} > + > +if { ![runto_main] } { > + unsupported "could not run to main" > + return -1 > +} > + > +gdb_test "p square(2.2)" "= 4\\.8359" > + > +set line1 [gdb_get_line_number "BP1"] > +set line2 [gdb_get_line_number "BP2"] > +set line3 [gdb_get_line_number "BP3"] > +gdb_breakpoint $line1 > +gdb_breakpoint $line3 > + > +gdb_continue_to_breakpoint "line1" ".*$srcfile:$line1.*" > + > +with_test_prefix "real" { > + gdb_test "p num" "= 1\\.25" > + gdb_test "ptype num" "type = _Float16" > + gdb_test "finish" "Value returned is.*= 1\\.5625" > +} > + > +gdb_continue_to_breakpoint "line3" ".*$srcfile:$line3.*" > +gdb_test "p plus(b)" "= 8\\.75 \\+ 1\\.5i" > + > +gdb_breakpoint $line2 > +gdb_continue_to_breakpoint "line2" ".*$srcfile:$line2.*" > + > +with_test_prefix "complex" { > + gdb_test "p num" "= 6\\.25 \\+ 1i" > + gdb_test "ptype num" "type = complex _Float16" > + gdb_test "finish" "Value returned is.*= 8\\.75 \\+ 1\\.5i" > +} > + > +gdb_continue_to_end > ^ permalink raw reply [flat|nested] 11+ messages in thread
* RE: [PATCH 2/2] gdb: Enable finish command and inferior calls for _Float16 on amd64 and i386. 2021-07-29 16:03 ` Luis Machado @ 2021-07-30 7:52 ` Willgerodt, Felix 2021-07-30 12:04 ` Luis Machado 0 siblings, 1 reply; 11+ messages in thread From: Willgerodt, Felix @ 2021-07-30 7:52 UTC (permalink / raw) To: Luis Machado, gdb-patches > Is _Float16 equivalent to fp16? If so, the presence of yet another name for a > fp16 type is a bit unfortunate. > They are the same usually, but on ARM the story is apparently a bit more complex: https://gcc.gnu.org/onlinedocs/gcc/Half-Precision.html But to cite the link: " The __fp16 type may only be used as an argument to intrinsics defined in <arm_fp16.h>, or as a storage format." And: "It is recommended that portable code use the _Float16 type defined by ISO/IEC TS 18661-3:2015." Therefore I don't think it is that unfortunate and not really negotiable by now. Both GCC and clang know about both already. > > - if (type->code () == TYPE_CODE_FLT) > > + /* _FLoat16 and _Float16 _Complex values are returned via xmm0. */ > > _Float16 > Thanks for spotting this. I fixed it locally. > > +/* Test program for bfloat16 of AVX 512 registers. > > float16 and not bfloat16, right? > Thanks. I reworded it to say: "Test program for _Float16 parameters and return values." Regards, Felix Intel Deutschland GmbH Registered Address: Am Campeon 10, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de <http://www.intel.de> Managing Directors: Christin Eisenschmid, Sharon Heck, Tiffany Doon Silva Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928 ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 2/2] gdb: Enable finish command and inferior calls for _Float16 on amd64 and i386. 2021-07-30 7:52 ` Willgerodt, Felix @ 2021-07-30 12:04 ` Luis Machado 2021-09-03 12:37 ` Simon Marchi 0 siblings, 1 reply; 11+ messages in thread From: Luis Machado @ 2021-07-30 12:04 UTC (permalink / raw) To: Willgerodt, Felix, gdb-patches On 7/30/21 4:52 AM, Willgerodt, Felix wrote: >> Is _Float16 equivalent to fp16? If so, the presence of yet another name for a >> fp16 type is a bit unfortunate. >> > > They are the same usually, but on ARM the story is apparently a bit more complex: > https://gcc.gnu.org/onlinedocs/gcc/Half-Precision.html It is. :-) > > But to cite the link: > " The __fp16 type may only be used as an argument to intrinsics defined in > <arm_fp16.h>, or as a storage format." > > And: > "It is recommended that portable code use the _Float16 type defined by > ISO/IEC TS 18661-3:2015." > > Therefore I don't think it is that unfortunate and not really negotiable by now. > Both GCC and clang know about both already. The unfortunate bit is the lack of enough DWARF information to make the distinction between different float formats of the same size. If the compilers are OK with the naming and already support it, it's not a big deal then. > >>> - if (type->code () == TYPE_CODE_FLT) >>> + /* _FLoat16 and _Float16 _Complex values are returned via xmm0. */ >> >> _Float16 >> > > Thanks for spotting this. I fixed it locally. > >>> +/* Test program for bfloat16 of AVX 512 registers. >> >> float16 and not bfloat16, right? >> > > Thanks. I reworded it to say: > "Test program for _Float16 parameters and return values." > > Regards, > Felix > Intel Deutschland GmbH > Registered Address: Am Campeon 10, 85579 Neubiberg, Germany > Tel: +49 89 99 8853-0, www.intel.de <http://www.intel.de> > Managing Directors: Christin Eisenschmid, Sharon Heck, Tiffany Doon Silva > Chairperson of the Supervisory Board: Nicole Lau > Registered Office: Munich > Commercial Register: Amtsgericht Muenchen HRB 186928 > ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 2/2] gdb: Enable finish command and inferior calls for _Float16 on amd64 and i386. 2021-07-30 12:04 ` Luis Machado @ 2021-09-03 12:37 ` Simon Marchi 2021-09-03 14:00 ` Willgerodt, Felix 0 siblings, 1 reply; 11+ messages in thread From: Simon Marchi @ 2021-09-03 12:37 UTC (permalink / raw) To: Luis Machado, Willgerodt, Felix, gdb-patches On 2021-07-30 8:04 a.m., Luis Machado via Gdb-patches wrote: > On 7/30/21 4:52 AM, Willgerodt, Felix wrote: >>> Is _Float16 equivalent to fp16? If so, the presence of yet another name for a >>> fp16 type is a bit unfortunate. >>> >> >> They are the same usually, but on ARM the story is apparently a bit more complex: >> https://gcc.gnu.org/onlinedocs/gcc/Half-Precision.html > > It is. :-) > >> >> But to cite the link: >> " The __fp16 type may only be used as an argument to intrinsics defined in >> <arm_fp16.h>, or as a storage format." >> >> And: >> "It is recommended that portable code use the _Float16 type defined by >> ISO/IEC TS 18661-3:2015." >> >> Therefore I don't think it is that unfortunate and not really negotiable by now. >> Both GCC and clang know about both already. > > The unfortunate bit is the lack of enough DWARF information to make the distinction between different float formats of the same size. If the compilers are OK with the naming and already support it, it's not a big deal then. I didn't find anything else to change in addition to what Luis already reported, so the patch is OK what that fixed. Simon ^ permalink raw reply [flat|nested] 11+ messages in thread
* RE: [PATCH 2/2] gdb: Enable finish command and inferior calls for _Float16 on amd64 and i386. 2021-09-03 12:37 ` Simon Marchi @ 2021-09-03 14:00 ` Willgerodt, Felix 0 siblings, 0 replies; 11+ messages in thread From: Willgerodt, Felix @ 2021-09-03 14:00 UTC (permalink / raw) To: Simon Marchi, Luis Machado, gdb-patches > -----Original Message----- > From: Simon Marchi <simon.marchi@polymtl.ca> > Sent: Freitag, 3. September 2021 14:37 > To: Luis Machado <luis.machado@linaro.org>; Willgerodt, Felix > <felix.willgerodt@intel.com>; gdb-patches@sourceware.org > Subject: Re: [PATCH 2/2] gdb: Enable finish command and inferior calls for > _Float16 on amd64 and i386. > > On 2021-07-30 8:04 a.m., Luis Machado via Gdb-patches wrote: > > On 7/30/21 4:52 AM, Willgerodt, Felix wrote: > >>> Is _Float16 equivalent to fp16? If so, the presence of yet another name for a > >>> fp16 type is a bit unfortunate. > >>> > >> > >> They are the same usually, but on ARM the story is apparently a bit more > complex: > >> https://gcc.gnu.org/onlinedocs/gcc/Half-Precision.html > > > > It is. :-) > > > >> > >> But to cite the link: > >> " The __fp16 type may only be used as an argument to intrinsics defined in > >> <arm_fp16.h>, or as a storage format." > >> > >> And: > >> "It is recommended that portable code use the _Float16 type defined by > >> ISO/IEC TS 18661-3:2015." > >> > >> Therefore I don't think it is that unfortunate and not really negotiable by > now. > >> Both GCC and clang know about both already. > > > > The unfortunate bit is the lack of enough DWARF information to make the > distinction between different float formats of the same size. If the compilers are > OK with the naming and already support it, it's not a big deal then. > > I didn't find anything else to change in addition to what Luis already > reported, so the patch is OK what that fixed. > > Simon Thanks! I pushed both patches. I will try to post the documentation patch (comment from patch 1) hopefully later today or next week. Regards, Felix Intel Deutschland GmbH Registered Address: Am Campeon 10, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de <http://www.intel.de> Managing Directors: Christin Eisenschmid, Sharon Heck, Tiffany Doon Silva Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928 ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2021-09-03 14:00 UTC | newest] Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-07-29 8:38 [PATCH 0/2] Add AVX512-FP16 support Felix Willgerodt 2021-07-29 8:38 ` [PATCH 1/2] Add half support for AVX512 register view Felix Willgerodt 2021-09-03 12:30 ` Simon Marchi 2021-09-03 12:55 ` Willgerodt, Felix 2021-09-03 12:59 ` Simon Marchi 2021-07-29 8:38 ` [PATCH 2/2] gdb: Enable finish command and inferior calls for _Float16 on amd64 and i386 Felix Willgerodt 2021-07-29 16:03 ` Luis Machado 2021-07-30 7:52 ` Willgerodt, Felix 2021-07-30 12:04 ` Luis Machado 2021-09-03 12:37 ` Simon Marchi 2021-09-03 14:00 ` Willgerodt, Felix
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).