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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Oct 2022 09:53:45.3222 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 878ee613-be07-4517-07e0-08dab8ca4db9 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT059.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB4PR08MB9142 X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi, On 10/28/22 03:42, Simon Marchi wrote: > > > On 10/26/22 04:41, Luis Machado via Gdb-patches wrote: >> Investigating PR29727, it was mentioned a particular test used to work on > > Typo, 727 <-> 272 Fixed. > >> GDB 10, but it started failing with GDB 11 onwards. I tracked it down to >> some displaced stepping improvements on commit >> 187b041e2514827b9d86190ed2471c4c7a352874. >> >> In particular, one of the corner cases using copy_insn_closure_by_addr got >> silently broken. It is hard to spot because it doesn't have any good tests >> for it, and the situation is quite specific to the Arm target. >> >> Essentially, the change from the displaced stepping improvements made it so >> we could still invoke copy_insn_closure_by_addr correctly to return the >> pointer to a copy_insn_closure, but it always returned nullptr due to >> the order of the statements in displaced_step_buffer::prepare. >> >> The way it is now, we first write the address of the displaced step buffer >> to PC and then save the copy_insn_closure pointer. >> >> The problem is that writing to PC for the Arm target requires figuring >> out if the new PC is thumb mode or not. >> >> With no copy_insn_closure data, the logic to determine the thumb mode >> during displaced stepping doesn't work, and gives random results that >> are difficult to track (SIGILL, SIGSEGV etc). >> >> Fix this by reordering the PC write in displaced_step_buffer::prepare >> and, for safety, add an assertion to >> displaced_step_buffer::copy_insn_closure_by_addr so GDB stops right >> when it sees this invalid situation. If this gets broken again in the >> future, it will be easier to spot. >> >> Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=29272 >> --- >> gdb/displaced-stepping.c | 15 ++++++++++++--- >> 1 file changed, 12 insertions(+), 3 deletions(-) >> >> diff --git a/gdb/displaced-stepping.c b/gdb/displaced-stepping.c >> index eac2c5dab94..19e4df33085 100644 >> --- a/gdb/displaced-stepping.c >> +++ b/gdb/displaced-stepping.c >> @@ -139,15 +139,20 @@ displaced_step_buffers::prepare (thread_info *thread, CORE_ADDR &displaced_pc) >> return DISPLACED_STEP_PREPARE_STATUS_CANT; >> } >> >> - /* Resume execution at the copy. */ >> - regcache_write_pc (regcache, buffer->addr); >> - >> /* This marks the buffer as being in use. */ >> buffer->current_thread = thread; >> >> /* Save this, now that we know everything went fine. */ >> buffer->copy_insn_closure = std::move (copy_insn_closure); >> >> + /* Adjust the PC so it points to the displaced step buffer address that will >> + be used. This needs to be done after we save the copy_insn_closure, as >> + some architectures (Arm, for one) need that information so they can adjust >> + other data as needed. In particular, Arm needs to know if the instruction >> + being executed in the displaced step buffer is thumb or not. Without that >> + information, things will be very wrong in a random way. */ >> + regcache_write_pc (regcache, buffer->addr); > > If the implementation under regcache_write_pc needs to look at the > displaced step buffers (like ARM does), it indeed seems like a good idea > for current_thread and copy_insn_closure to be set, so the buffer > information is complete at that point. However, my worry would be that > if regcache_write_pc throws, for some reason, current_thread stays set > and the buffer will forever stay marked as busy. Now, when writing the > PC fails, things don't look so good for the debug session, but still it > would be nice to leave the displaced stepping buffer information in good > shape to not make things worse. If all the displaced step buffers (and > there's just one on ARM) are busy, threads waiting for a displaced step > will be stuck forever. > > So, perhaps use a try / catch to clear those fields if an exception is > thrown (or maybe you can find a cleaner solution). Would a scoped restore be cleaner here? > > Simon