Re: [PATCH] Modify Aarch64 prologue analyzer to accept 128-bit registers

[Luis Machado <luis.machado@linaro.org>]

On 11/14/2017 11:41 AM, Paul Carroll wrote:
> (Sending again, due to problems with the mailing list not liking my 
> previous post)
> 
> On 11/13/2017 12:32 PM, Andrew Pinski wrote:
>> Hmm,  The normal elf aarch64 ABI says only 64bits is saved.  Is there
>> another ABI which says 128bits of the SIMD register is saved?
> 
> Thanks for the comment, Andrew.
> In this case, the code in question is an interrupt routine.
> As such, it is not following the ABI, except when making calls itself.
> When gdb processes the start of the interrupt routine, it finds the 
> 'stp' with the 128-bit register references and asserts.
> That is a problem for debugging embedded applications, and is what this 
> patch is trying to avoid.
> 

I take it this is RTOS-specific?

If so, I can see a couple alternatives. One way would be to patch it in 
the RTOS-specific file in GDB, keeping the fix contained in the right 
context instead of in general code that will likely not benefit from it.

The second alternative is to augment the code with CFI information so 
GDB doesn't have to use the prologue analyzers. There will always be a 
particular combination of instructions GDB won't recognize, especially 
for custom code that doesn't follow the ABI.

The plus side of fixing this on the RTOS code itself is that GDB doesn't 
have to be patched every time an unknown prologue sequence is 
encountered. But attempting to debug binaries stripped of symbols and 
debug information will required GDB to be patched.