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From: "slandden at gmail dot com" <sourceware-bugzilla@sourceware.org>
To: gdb-prs@sourceware.org
Subject: [Bug gdb/24530] doesn't understand vector double calling conventions on ppc64el
Date: Wed, 26 May 2021 21:04:57 +0000 [thread overview]
Message-ID: <bug-24530-4717-zRS1GM1F4X@http.sourceware.org/bugzilla/> (raw)
In-Reply-To: <bug-24530-4717@http.sourceware.org/bugzilla/>
https://sourceware.org/bugzilla/show_bug.cgi?id=24530
Shawn Landden <slandden at gmail dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |RESOLVED
Resolution|--- |WONTFIX
--- Comment #8 from Shawn Landden <slandden at gmail dot com> ---
I am very impressed by your thouroughness!
While I have been interested in DWARF, and have heard good things about it, I
did not know that.
DWARF cannot describe registers. And this is something I was complaining about
a few years ago, when it seemed so silly that, while writing the Zig compiler
we were avoiding SSA form specifically to make debugging work, and then letting
LLVM (specifically -mem2reg) optimize it back to SSA form.
--
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next prev parent reply other threads:[~2021-05-26 21:04 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <bug-24530-4717@http.sourceware.org/bugzilla/>
2021-05-19 20:59 ` cel at us dot ibm.com
2021-05-22 5:11 ` slandden at gmail dot com
2021-05-22 5:43 ` slandden at gmail dot com
2021-05-24 22:28 ` cel at us dot ibm.com
2021-05-25 5:22 ` slandden at gmail dot com
2021-05-25 16:09 ` cel at us dot ibm.com
2021-05-26 20:40 ` cel at us dot ibm.com
2021-05-26 21:04 ` slandden at gmail dot com [this message]
2021-05-26 23:01 ` slandden at gmail dot com
2021-05-26 23:32 ` cel at us dot ibm.com
2021-05-26 23:59 ` slandden at gmail dot com
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