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From: "luis.machado at arm dot com" <sourceware-bugzilla@sourceware.org>
To: gdb-prs@sourceware.org
Subject: [Bug gdb/29471] gdb 12.1 'i r' command doesn't recognise register NZCV under target aarch64-none-elf
Date: Fri, 21 Oct 2022 10:06:41 +0000 [thread overview]
Message-ID: <bug-29471-4717-xjRMVKDz6b@http.sourceware.org/bugzilla/> (raw)
In-Reply-To: <bug-29471-4717@http.sourceware.org/bugzilla/>
https://sourceware.org/bugzilla/show_bug.cgi?id=29471
Luis Machado <luis.machado at arm dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Ever confirmed|0 |1
CC| |luis.machado at arm dot com
Last reconfirmed| |2022-10-21
Status|UNCONFIRMED |WAITING
--- Comment #1 from Luis Machado <luis.machado at arm dot com> ---
Hi Pete,
When dealing with bare metal, GDB gets its register set from the target. For
example, QEMU might not expose the Process State bits separately. It may be the
case that it packs everything into a synthetic CPSR register, as is shown in
your first post.
What debugging stub are you using for aarch64-none-elf? QEMU, openOCD etc?
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next prev parent reply other threads:[~2022-10-21 10:06 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-11 12:10 [Bug gdb/29471] New: gdb 12.1 'i r' command doesn't recognise register NZCV under target aarch64 petemoore at gmx dot net
2022-08-11 15:07 ` [Bug gdb/29471] gdb 12.1 'i r' command doesn't recognise register NZCV under target aarch64-none-elf petemoore at gmx dot net
2022-10-21 10:06 ` luis.machado at arm dot com [this message]
2022-10-21 12:42 ` petemoore at gmx dot net
2022-10-21 14:30 ` luis.machado at arm dot com
2022-11-03 9:22 ` cvs-commit at gcc dot gnu.org
2022-12-05 15:37 ` luis.machado at arm dot com
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