From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 25063385840B; Fri, 4 Nov 2022 15:36:08 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 25063385840B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1667576168; bh=25ds112dvefjebh0xYLhrOMReoJPUh6ZxncHuGkrLvQ=; h=From:To:Subject:Date:In-Reply-To:References:From; b=BZl9I6Aic7in24UcL7swzDAuL40RsL0TfdGdnkc4584rSDAUGRyH57p94MbyjA5dJ x/4Sr+6i3FwKO6lxnL5HCFaWZ6OCERadFXqrNXaO9u12/7KQCO5DH4k28FdRIiMJJ+ SRBhMuL1wN/cedJY8TSjvuQ9FxMJ9e49uXVlF4c4= From: "torbjorn.svensson at st dot com" To: gdb-prs@sourceware.org Subject: [Bug tdep/29716] Arm v8 M-profile FNC_RETURN unwinder uses wrong stack Date: Fri, 04 Nov 2022 15:36:01 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gdb X-Bugzilla-Component: tdep X-Bugzilla-Version: HEAD X-Bugzilla-Keywords: X-Bugzilla-Severity: minor X-Bugzilla-Who: torbjorn.svensson at st dot com X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P2 X-Bugzilla-Assigned-To: unassigned at sourceware dot org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: cc Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://sourceware.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://sourceware.org/bugzilla/show_bug.cgi?id=3D29716 Torbj=C3=B6rn SVENSSON changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |torbjorn.svensson at st do= t com --- Comment #3 from Torbj=C3=B6rn SVENSSON --- (In reply to tomas.vanek from comment #0) > Discovered on STM32L552 with Cortex-M33, should be same for all ARMv8-M > devices with the security extension. >=20 > A secure code runs in thread mode and uses MSP_S because CONTROL_S bit SP= SEL > =3D 0 > A non-secure function is called from secure code. > Command 'backtrace' does not show the correct stack frames: >=20 > (gdb) bt > #0 NonSecureFc () > #1 > #2 0x00000000 in ?? () > Backtrace stopped: previous frame identical to this frame (corrupt stack= ?) >=20 > The problem is in arm-tdep.c:3394, function arm_m_exception_cache (), > block if (fnc_return): >=20 > ULONGEST xpsr =3D get_frame_register_unsigned (this_frame, ARM_PS_REGNU= M); > if ((xpsr & 0xff) !=3D 0) > /* Handler mode: This is the mode that exceptions are handled in. */ > arm_cache_switch_prev_sp (cache, tdep, tdep->m_profile_msp_s_regnum); > else > /* Thread mode: This is the normal mode that programs run in. */ > arm_cache_switch_prev_sp (cache, tdep, tdep->m_profile_psp_s_regnum); >=20 > This code does not comply > Arm=C2=AEv8-M Architecture Reference Manual > B3.8 Stack pointer > IDMLS "In Thread mode, CONTROL.SPSEL determines whether the PE uses the m= ain > or process stack" >=20 > and uses process stack regardless of SPSEL. >=20 > The test should check SPSEL bit of CONTROL_S register. > Unfortunately the current arm-tdep is not aware of this register, we need= to > look up the register number in arm_gdbarch_init(). >=20 > Moreover stack unwinders probably do not keep track of CONTROL_S updates. > Even if we neglect usually very seldom updates of SPSEL and use the value > from the innermost frame we have better chance to see correct stack frame= s. I have not been able to reproduce this issue after applying below patch ser= ies. Maybe they are still there, maybe they are indirectly fixed. https://sourceware.org/pipermail/gdb-patches/2022-November/193391.html @Tomas, can you take a look at them and see if it resolves the issues you've seen? Regarding the use of CONTROL.SPSEL instead of the xspr value; you can't use CONTROL as it's not stacked on EXC_RETURN/FNC_RETURN and to my knowledge, i= t's not part of the DWARF2 info either. --=20 You are receiving this mail because: You are on the CC list for the bug.=