From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 13508 invoked by alias); 26 Jan 2006 17:22:55 -0000 Received: (qmail 13499 invoked by uid 22791); 26 Jan 2006 17:22:55 -0000 X-Spam-Check-By: sourceware.org Received: from sadr.equallogic.com (HELO sadr.equallogic.com) (66.155.203.134) by sourceware.org (qpsmtpd/0.31) with ESMTP; Thu, 26 Jan 2006 17:22:53 +0000 Received: from sadr.equallogic.com (localhost.localdomain [127.0.0.1]) by sadr.equallogic.com (8.12.8/8.12.8) with ESMTP id k0QHMopE010413 for ; Thu, 26 Jan 2006 12:22:50 -0500 Received: from M31.equallogic.com (M31.equallogic.com [172.16.1.31]) by sadr.equallogic.com (8.12.8/8.12.8) with SMTP id k0QHMoih010403; Thu, 26 Jan 2006 12:22:50 -0500 Received: from pkoning.equallogic.com ([172.16.1.169]) by M31.equallogic.com with Microsoft SMTPSVC(6.0.3790.211); Thu, 26 Jan 2006 12:22:54 -0500 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Message-ID: <17369.1383.76521.791703@gargle.gargle.HOWL> Date: Thu, 26 Jan 2006 17:34:00 -0000 From: Paul Koning To: drow@false.org Cc: gdb@sourceware.org Subject: Re: Using XML in GDB? References: <20060126055744.GA29647@nevyn.them.org> <43D8BB89.4090900@st.com> <20060126134124.GA3107@nevyn.them.org> <43D8E573.1060004@st.com> <20060126163832.GA7113@nevyn.them.org> X-IsSubscribed: yes Mailing-List: contact gdb-help@sourceware.org; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sourceware.org X-SW-Source: 2006-01/txt/msg00269.txt.bz2 >>>>> "Daniel" == Daniel Jacobowitz writes: Daniel> On Thu, Jan 26, 2006 at 03:06:27PM +0000, Andrew STUBBS Daniel> wrote: >> That sounds good. We have been considering doing something with >> memory mapped registers (devices, exception/interrupt reason >> codes, etc.), and this might be the answer. Daniel> Would you expose them as registers, or as memory mapped I/O, Daniel> from the stub? I would very much like to have access to device registers. But I doubt that treating them as memory or as CPU GP registers would work. Device registers tend to have side effects. Neither memory nor GPU general registers do. So machinery like the register cache can't be involved if you are playing with device registers; you want to apply "volatile" rules to them. So each UI action has to correspond with exactly one operation on a device register, not more, not less. And you want to make sure that there are ways to do just a write, or just a read -- a store can't be turned into a load/store pair. paul