From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 14661 invoked by alias); 16 Jun 2003 18:51:00 -0000 Mailing-List: contact gdb-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sources.redhat.com Received: (qmail 14614 invoked from network); 16 Jun 2003 18:50:59 -0000 Received: from unknown (HELO crack.them.org) (146.82.138.56) by sources.redhat.com with SMTP; 16 Jun 2003 18:50:59 -0000 Received: from dsl093-172-017.pit1.dsl.speakeasy.net ([66.93.172.17] helo=nevyn.them.org ident=mail) by crack.them.org with asmtp (Exim 3.12 #1 (Debian)) id 19Rz50-0003Mw-00; Mon, 16 Jun 2003 13:51:46 -0500 Received: from drow by nevyn.them.org with local (Exim 3.36 #1 (Debian)) id 19Rz4A-0008C8-00; Mon, 16 Jun 2003 14:50:54 -0400 Date: Mon, 16 Jun 2003 18:51:00 -0000 From: Daniel Jacobowitz To: Andrew Cagney Cc: gdb@sources.redhat.com Subject: Re: MIPS o32 ABI spec, $fp1 valid? Message-ID: <20030616185054.GA30776@nevyn.them.org> Mail-Followup-To: Andrew Cagney , gdb@sources.redhat.com References: <3EEE0E2D.8050805@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <3EEE0E2D.8050805@redhat.com> User-Agent: Mutt/1.5.1i X-SW-Source: 2003-06/txt/msg00321.txt.bz2 On Mon, Jun 16, 2003 at 02:36:29PM -0400, Andrew Cagney wrote: > Hello, > > KevinB and I were discussing MIPS cleanups for better handling things > like o32 ABI. One question was can the o32 ABI use odd floating point > registers? The MIPS certainly has them, and instructions can certainly > access them. However, according to the o32 ABI, can they be used? > > (alternativly, does anyone have a MIPS o32 ABI spec, and even the > original ABI spec that went with the MIPS 1). Hum, here's what the SysV ABI Supplement for MIPS (1996?) has to say: Co-processor 1 adds 32 32-bit floating-point general registers and a 32-bit control/status register. Each even/odd pair of the 32 floating-point general registers can be used as either a 32-bit single-precision floating-point register or as a 64-bit double-precision floating-point register. For single-precision values, the even-numbered floating-point register holds the value. For double-precision values, the even-numbered floating-point register holds the least significant 32 bits of the value and the odd-numbered floating-point register holds the most significant 32 bits of the value. This is always true, regardless of the byte ordering conventions in use ( big endian or little endian). Which is actually pretty ambiguous, but GCC goes out of its way not to put floats in odd-numbered FP registers (unless -msingle-float), so I'm guessing that the ABI spec says they may _not_ be used. -- Daniel Jacobowitz MontaVista Software Debian GNU/Linux Developer