From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp.gentoo.org (woodpecker.gentoo.org [IPv6:2001:470:ea4a:1:5054:ff:fec7:86e4]) by sourceware.org (Postfix) with ESMTP id ADC3A386F47D for ; Wed, 13 Jan 2021 11:08:59 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org ADC3A386F47D Received: from vapier (localhost [127.0.0.1]) by smtp.gentoo.org (Postfix) with SMTP id B4E4E335DCC; Wed, 13 Jan 2021 11:08:58 +0000 (UTC) Date: Wed, 13 Jan 2021 06:08:58 -0500 From: Mike Frysinger To: Andrew Burgess , William Tambe , gdb@sourceware.org Subject: Re: Is it possible to support gdb command hbreak with target sim ? Message-ID: <20210113110858.GD6938@vapier> Mail-Followup-To: Andrew Burgess , William Tambe , gdb@sourceware.org References: <20200929084653.GB1540867@embecosm.com> <20210113054649.GC6938@vapier> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="ZJcv+A0YCCLh2VIg" Content-Disposition: inline In-Reply-To: <20210113054649.GC6938@vapier> X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gdb@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 13 Jan 2021 11:09:03 -0000 --ZJcv+A0YCCLh2VIg Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On 13 Jan 2021 00:46, Mike Frysinger via Gdb wrote: > On 29 Sep 2020 09:46, Andrew Burgess wrote: > > * William Tambe via Gdb [2020-09-28 21:29:26 -0500= ]: > > > Is it possible to support gdb command hbreak with target sim ? > >=20 > > There's currently no support for hardware breakpoints in the simulator > > target, instead only software breakpoints are supported where GDB > > takes responsibility for reading and backing up the old memory > > contents before writing in a software breakpoint instruction. > >=20 > > This doesn't mean that hardware breakpoint support couldn't be added. >=20 > this is a bit inaccurate. i guess "hardware breakpoints" are a bit > confusing when talking about simulators. and depending on who you > talk to, they might call them "watchpoints" rather than "breakpoints". >=20 > there is a sim-watch module that some sim's support. looks like: > avr bfin frv iq2000 m32r mips mn10300 moxie v850 >=20 > so if you're using one of those, it'd be something like: > $ gdb > (gdb) target sim --watch-pc-int 0x1234 > (gdb) load > (gdb) run >=20 > that said, it appears to have a few bugs. i'm not sure how well it's > tested :). g'luck! i've posted some fixes so things should work much better for gdb-11. but to your original question, i don't think the sim target integrates with gdb's "hbreak" command. i haven't looked at those codepaths in quite sometime though tbh, and gdb has changed drastically since. maybe Andrew would know offhand. -mike --ZJcv+A0YCCLh2VIg Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature -----BEGIN PGP SIGNATURE----- iQIzBAEBCAAdFiEEuQK1JxMl+JKsJRrUQWM7n+g39YEFAl/+1MoACgkQQWM7n+g3 9YFIaQ//ekgL7YQ8cN2bidhTU9Wh4NGJ4OQBP1YQCQqfaJJDbrXnK6+NvSzTsndk E4oFmD9okpn20gxyqZYvzMV7YeUMVqSV5TNpQKFaoYFT8fddDklsJOSbqsftXvhk O1oYcqxkYDQ0Q6+fUe1zvjfzabdAUTxWsrEL1XQBzzE7sTpuO69CFZ3cQKvjBmFb rmnszu6jBkJQyur26Hyo9ESyCFksnZ6V1JgMcapqUA6/kJclMXWqXJnZ+OY+JUE3 YSfqzl3iNv4PVQLOjitQ2IwRub5P4W1JhM5kscqnYhibJ20XixqFV3pghou8RXig cuMkOCPfBaduS1zkK4CXzPM9sayQa7HTIl6dllKFLIBjKEMOPS9XDnqV42tqmtXy FaWQZP8UtRWBWvoSWNzWsHv7KtUu8pKdGkPa0R22X6wFyyO6fTrA3emNrtEQOqS5 XW6jfGEzdLqJgAIBC4FS9jdTX9Fs89WXwWLqxOOg750YHt0tGbZhhVdc/Bk5Sk6C pfDiLROAmRzMDLKBIl7BpQJ9d4LVkgAm2Edpde+OzWum4TOZysrD9jaZY9Cl/2O4 3KSeQeFPPqyCzsjA4iRieiYFjKJtaWSkIA/Vvv17FjP4+Giag9D3xaAJUtImfJWe /0uXTV+L0DLMASc40AykoZVltlcUWq8iE2lb4QUb0onMjIu3BrM= =Jqqs -----END PGP SIGNATURE----- --ZJcv+A0YCCLh2VIg--