From: Andrew Cagney <ac131313@redhat.com>
To: Michal Ludvig <mludvig@suse.cz>, rth@redhat.com
Cc: Daniel Jacobowitz <drow@mvista.com>, gdb <gdb@sources.redhat.com>
Subject: Re: [testsuite & dwarf2] How to handle store.exp failure on AMD64?
Date: Wed, 13 Aug 2003 03:54:00 -0000 [thread overview]
Message-ID: <3F39B678.70409@redhat.com> (raw)
In-Reply-To: <3F32C75D.2010007@suse.cz>
Ref: Dwarf unwinder problems with store.exp and preserved regs
http://sources.redhat.com/ml/gdb/2003-07/msg00026.html
> Andrew Cagney wrote:
> For this specific ABI and problem, did GCC put the value in a preserved regiter ...
>
> - GCC -O0 should should not eliminate variables, and should preserve all variables across function calls.
>
> Given that is compiled with -O0, I think GCC is failing on count #3 here.
>
> or a scratch register?
>
> Into the preserved register (%rbx).
> When I added the appropriate DW_CFA_same_value instruction to the .s file, the register was correctly unwound and the value of the variable in an upper frame shown.
Ok. Looking at the debug info (bet everyones compiler is different :-/)
I'm seeing a very non-descrptive CIEs vis:
00000018 00000014 ffffffff CIE
Version: 1
Augmentation: ""
Code alignment factor: 1
Data alignment factor: -8
Return address column: 16
DW_CFA_def_cfa: r7 ofs 8
DW_CFA_offset: r16 at cfa-8
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
I would have expected the CIE.INITIAL_INSTRUCTIONS to specify the
default state of all DWARF2 registers, and not just a select few. The
dwarf2 example, spells out the initial state of all registers vis:
cie 32 length
cie+4 0xffffffff CIE_id
cie+8 1 version
cie+9 0 augmentation
cie+10 4 code_alignment_fact
cie+11 -4 data_alignment_fact
cie+12 8 R8 is the return ad
cie+13 DW_CFA_def_cfa (7, 0) CFA = [R7]+0
cie+16 DW_CFA_same_value (0) R0 not modified (=0
cie+18 DW_CFA_undefined (1) R1 scratch
cie+20 DW_CFA_undefined (2) R2 scratch
cie+22 DW_CFA_undefined (3) R3 scratch
cie+24 DW_CFA_same_value (4) R4 preserve
cie+26 DW_CFA_same_value (5) R5 preserve
cie+28 DW_CFA_same_value (6) R6 preserve
cie+30 DW_CFA_same_value (7) R7 preserve
cie+32 DW_CFA_register (8, 1) R8 is in R1
cie+35 DW_CFA_nop padding
cie+36
and GCC put simply is not doing this.
Andrew
next prev parent reply other threads:[~2003-08-13 3:54 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-08-07 8:49 Michal Ludvig
2003-08-07 13:50 ` Daniel Jacobowitz
2003-08-07 14:58 ` Andrew Cagney
2003-08-07 15:02 ` Daniel Jacobowitz
2003-08-07 15:53 ` Andrew Cagney
2003-08-07 21:40 ` Michal Ludvig
2003-08-13 3:54 ` Andrew Cagney [this message]
2003-08-13 4:54 ` Richard Henderson
2003-08-13 14:39 ` Andrew Cagney
2003-08-13 16:50 ` Richard Henderson
2003-08-13 18:23 ` Andrew Cagney
2003-08-13 23:35 ` Richard Henderson
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