From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 3540 invoked by alias); 24 Aug 2004 20:33:23 -0000 Mailing-List: contact gdb-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sources.redhat.com Received: (qmail 3531 invoked from network); 24 Aug 2004 20:33:23 -0000 Received: from unknown (HELO mx1.redhat.com) (66.187.233.31) by sourceware.org with SMTP; 24 Aug 2004 20:33:23 -0000 Received: from int-mx1.corp.redhat.com (int-mx1.corp.redhat.com [172.16.52.254]) by mx1.redhat.com (8.12.10/8.12.10) with ESMTP id i7OKXCS2028440 for ; Tue, 24 Aug 2004 16:33:23 -0400 Received: from localhost.redhat.com (porkchop.devel.redhat.com [172.16.58.2]) by int-mx1.corp.redhat.com (8.11.6/8.11.6) with ESMTP id i7OKXCa26873; Tue, 24 Aug 2004 16:33:12 -0400 Received: from gnu.org (localhost [127.0.0.1]) by localhost.redhat.com (Postfix) with ESMTP id E33EF2B9D; Tue, 24 Aug 2004 16:32:03 -0400 (EDT) Message-ID: <412BA5C3.9020102@gnu.org> Date: Tue, 24 Aug 2004 20:33:00 -0000 From: Andrew Cagney User-Agent: Mozilla/5.0 (X11; U; NetBSD macppc; en-GB; rv:1.4.1) Gecko/20040801 MIME-Version: 1.0 To: Mark Kettenis Cc: gdb@sources.redhat.com Subject: Re: non-decr_pc_after_break i386 targets References: <200408141934.i7EJY4mc001084@elgar.kettenis.dyndns.org> In-Reply-To: <200408141934.i7EJY4mc001084@elgar.kettenis.dyndns.org> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit X-SW-Source: 2004-08/txt/msg00350.txt.bz2 > While reading the Solaris proc(4) man page I noticed the PR_BPTADJ > flag. If this flag is set, Solaris x86 "will adjust the program > counter back to location of the breakpointed instructions when the lwp > stops on a breakpoint". The man page explicitly says that on SPARC > this is a no-op. Using this flag makes it possible to turn > i386-*-solaris2* into an architecture where decr_pc_after_break is > zero. This would have remove some of the problems with breakpoints in > signal trampolines on Solaris x86. So I think we should do that. > > However, this also reveals a flaw in the way we handle > decr_pc_after_break. Currently it's part of the architecture vector, > which essentially means that we consider it part of the ISA. However, > the above shows that it also depends on the target interface. So it > seems we should make it possible for the target vector to override the > default set by the architecture vector. > > To people agree with this analysis? The same problem pattern occures with software_single_step - the archititecture is incorrectly dictating the presence/absence of hardware single-step. Both of these cases are used in infrun.c. I think, in both cases, the logic should read something like: if (!target_has__p ()) gdb_assert (gdbarch__p()) use gdbarch_feature_workaround Andrew