From: Pedro Alves <palves@redhat.com>
To: Michal Lesniewski <m.lesniewski@samsung.com>
Cc: gdb@sourceware.org
Subject: Re: Implementation of different software breakpoint kinds in gdb server
Date: Thu, 18 Oct 2012 10:08:00 -0000 [thread overview]
Message-ID: <507FD526.5080604@redhat.com> (raw)
In-Reply-To: <000001cdad12$1e2b1950$5a814bf0$%lesniewski@samsung.com>
On 10/18/2012 10:22 AM, Michal Lesniewski wrote:
>
> I was wondering if anybody was already considering to extend the code in
> mem-break.c to add support for different kinds of breakpoints.
Extending mem-break.c is not the big problem, IMO. The RSP already supports
this, with the mode encoded in the "size" field of the z0 packet.
Offhand, the main issues with tracepoints on ARM are:
#1 - gdbserver needs to know how to step over the tracepoints, without gdb's intervention.
#2 - ARM can't hw single-step, so that needs to be done the hard way, with breakpoints
(a.k.a., software single-step).
All the logic to do that is in gdb. This conflicts with #1.
So we'd need to teach gdbserver to software single-step. Maybe it's possible
to tell offline all the possible destinations of an instruction, so we could still
leave that logic in gdb, but I suspect not.
I don't know whether the current kernel can already do all that for us? (perf,
uprobes, etc?)
--
Pedro Alves
next prev parent reply other threads:[~2012-10-18 10:08 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-18 9:23 Michal Lesniewski
2012-10-18 10:08 ` Pedro Alves [this message]
2012-10-18 10:28 ` Yao Qi
2012-10-18 10:42 ` Pedro Alves
2012-10-18 11:44 ` Michal Lesniewski
2012-10-18 12:01 ` Pedro Alves
2012-10-19 0:31 ` John Gilmore
2012-10-19 8:51 ` Michal Lesniewski
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