From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 27925 invoked by alias); 18 Oct 2012 10:08:55 -0000 Received: (qmail 27917 invoked by uid 22791); 18 Oct 2012 10:08:54 -0000 X-SWARE-Spam-Status: No, hits=-7.8 required=5.0 tests=AWL,BAYES_00,KHOP_RCVD_UNTRUST,KHOP_THREADED,RCVD_IN_DNSWL_HI,RCVD_IN_HOSTKARMA_W,RP_MATCHES_RCVD,SPF_HELO_PASS X-Spam-Check-By: sourceware.org Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 18 Oct 2012 10:08:43 +0000 Received: from int-mx12.intmail.prod.int.phx2.redhat.com (int-mx12.intmail.prod.int.phx2.redhat.com [10.5.11.25]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id q9IA8ePU015932 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Thu, 18 Oct 2012 06:08:40 -0400 Received: from [127.0.0.1] (ovpn01.gateway.prod.ext.ams2.redhat.com [10.39.146.11]) by int-mx12.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id q9IA8dIr001298; Thu, 18 Oct 2012 06:08:40 -0400 Message-ID: <507FD526.5080604@redhat.com> Date: Thu, 18 Oct 2012 10:08:00 -0000 From: Pedro Alves User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:16.0) Gecko/20121009 Thunderbird/16.0 MIME-Version: 1.0 To: Michal Lesniewski CC: gdb@sourceware.org Subject: Re: Implementation of different software breakpoint kinds in gdb server References: <000001cdad12$1e2b1950$5a814bf0$%lesniewski@samsung.com> In-Reply-To: <000001cdad12$1e2b1950$5a814bf0$%lesniewski@samsung.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Mailing-List: contact gdb-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sourceware.org X-SW-Source: 2012-10/txt/msg00079.txt.bz2 On 10/18/2012 10:22 AM, Michal Lesniewski wrote: > > I was wondering if anybody was already considering to extend the code in > mem-break.c to add support for different kinds of breakpoints. Extending mem-break.c is not the big problem, IMO. The RSP already supports this, with the mode encoded in the "size" field of the z0 packet. Offhand, the main issues with tracepoints on ARM are: #1 - gdbserver needs to know how to step over the tracepoints, without gdb's intervention. #2 - ARM can't hw single-step, so that needs to be done the hard way, with breakpoints (a.k.a., software single-step). All the logic to do that is in gdb. This conflicts with #1. So we'd need to teach gdbserver to software single-step. Maybe it's possible to tell offline all the possible destinations of an instruction, so we could still leave that logic in gdb, but I suspect not. I don't know whether the current kernel can already do all that for us? (perf, uprobes, etc?) -- Pedro Alves