Re: Implementation of different software breakpoint kinds in gdb server

[Pedro Alves <palves@redhat.com>]

On 10/18/2012 12:44 PM, Michal Lesniewski wrote:
> On 10/18/2012 12:09 PM, Pedro Alves wrote:
>> Extending mem-break.c is not the big problem, IMO.  
> 
> But we'd probably have to change its interface a bit. So there would be also
> changes needed in the architecture specific files like linux-*-low.c.
> However, these changes would probably trivial for most architectures because
> usually there is only one kind of trap instructions.

Right.

> 
>> The RSP already supports this, with the mode encoded in the "size" field
> of the z0 packet.
> 
> That's right, but the RSP does not support specifying kinds/sizes in the
> QTDP packets, which are used for adding tracepoints, but that's a different
> story. I added a enhancement request on bugzilla today, maybe there will be
> some feedback: http://sourceware.org/bugzilla/show_bug.cgi?id=14740

Ah, didn't see it.  Most of the people that would probably respond
there are already in CC here.  :-P

Right.  Although we've revamped the tracepoints support not that long
ago (making it actually useful), the tracepoint packets are quite old,
and that wasn't considered originally (even the encoding of mode/kind in the
size/length field of z0 is recent).  QTDP supports optional extensions, but
it probably best to take a look at all the packets that are affected before
deciding how to extended QTDP.

> 
>> So we'd need to teach gdbserver to software single-step.  Maybe it's
> possible to tell offline all the possible destinations of an instruction, so
> we could still leave that logic in gdb, but I suspect not.
> 
> It's generally not possible. Of course, some instructions can never cause a
> branch, so in these cases we could safely set the "reinsert-breakpoint" at
> the next instruction. But some branch instructions read the branch
> destination from a register. In this case we can only evaluate the next PC
> value when the breakpoint is hit. 
> 
> Teaching gdbserver to single-step shouldn't be too hard. As you mentioned,
> the logic is already there in gdb. I even found the code to do this in
> arm-tdep.c (e.g. arm_get_next_pc). We could use it as a base to implement it
> in gdbserver, but we would have some code duplication.

It's not the next_pc bits per se, but the run control stuff that always
gets tricky.  Well, every time I think touching run control stuff in either
gdb or gdbserver shouldn't be hard, I spend long whiles head banging.
Maybe it's just me.  :-)

It'd be nice to avoid the duplication, though that might not be easy.

>> I don't know whether the current kernel can already do all that for us?
> (perf, uprobes, etc?)
> 
> I tried uprobes, but it works in a different way. Instead of single
> stepping, uprobes simulates (or emulates) the instruction, which was
> replaced by the breakpoint. (It executes the instruction out-of-line and
> jumps back to the original code. If this is not possible, it just looks at
> the original instruction and modifies the registers and memory itself. This
> solution has the advantage that it doesn't need to stop other threads while
> one thread is single-stepping). Anyway, as far as I know uprobes does not
> work on ARM yet. 

Thanks.

Looking forward to all this.

-- 
Pedro Alves